microcode_ctl-2:2.1-73.20.el7_9>  HLk|ey $ƨԕ$HM:ex?U8s^]\JkFYD2_Vf\p{(RZ"Xp>Mm3PfW/ ! ~a&Ak# I͚zs ` j?xh˃i6iGHLπ1. hvxUtql@5v>KVD^G8e㞲" 6n9uf|v ]hImXxVGJrPTHrV}sq} -UAʖ^QZ` C}F`E86:Qa]QJ~03ma=us#G}fil,q[ߓ C-YQ[)2E Zo~"b?;$S >|ټڤ:Sy&mAyznFE  8 fG-/L f9oxYZxs%Ofe0c5dd4f32153b2acf2cd183e20c27099ff0ec5lt,ey $ƨ5=.ϰD$$1@:]H|__ghUVc;SjL6|Wj"/ri=9h+҄Un() hMGzCp[S,!X;RسB;İ|8;n{cnHl4l!$6ZHqh%@q 5:bwS2 n1$M9gyH5ۜ<0 ^E!36Sem .aRePM%&8llR_Yrn0` koLް RL& gԥ*پNJ~ ( abfj Hj₾Y:?,R,5zYn 4ր*HYJ:}9W(.oEIaZ=zX|c9*)c4FǮƴV&,9kF{ TٜWeZ* 2"K}φj+a&\>A$?$d  $ _ )IOV2  `  J] K8NRWW<Z H456}(6)6*7+7`,7h-7879:,:U@>}'?}/@}7D}?G}PHIX HY H\]^ bd_edfgli$$Cmicrocode_ctl2.173.20.el7_9Tool to transform and deploy CPU microcode update for x86.The microcode_ctl utility is a companion to the microcode driver written by Tigran Aivazian . The microcode update is volatile and needs to be uploaded on each system boot i.e. it doesn't reflash your cpu permanently, reboot and it reverts back to the old microcode.eq[x86-01.bsys.centos.orgȍCentOSGPLv2+ and Redistributable, no modification permittedCentOS BuildSystem System Environment/Basehttps://pagure.io/microcode_ctllinuxx86_64 if [ $1 -eq 1 ] ; then # Initial installation systemctl preset microcode.service >/dev/null 2>&1 || : fi /usr/libexec/microcode_ctl/update_ucode /usr/libexec/microcode_ctl/reload_microcode # send the message to syslog, so it gets recorded on /var/log if [ -e /usr/bin/logger ]; then /usr/libexec/microcode_ctl/check_caveats -m -d | /usr/bin/logger -p syslog.warning -t DISCLAIMER fi # also paste it over dmesg (some customers drop dmesg messages while # others keep them into /var/log for the later case, we'll have the # disclaimer recorded twice into system logs. /usr/libexec/microcode_ctl/check_caveats -m -d > /dev/kmsg exit 0 if [ $1 -eq 0 ] ; then # Package removal, not upgrade systemctl --no-reload disable microcode.service > /dev/null 2>&1 || : systemctl stop microcode.service > /dev/null 2>&1 || : fi # Storing ucode list before uninstall ls /usr/share/microcode_ctl/intel-ucode | sort > "/var/lib/rpm-state/microcode_ctl_un_intel-ucode" ls /usr/share/microcode_ctl/ucode_with_caveats | sort > "/var/lib/rpm-state/microcode_ctl_un_ucode_caveats" /usr/libexec/microcode_ctl/update_ucode --action list --skip-common | sort > "/var/lib/rpm-state/microcode_ctl_un_file_list" systemctl daemon-reload >/dev/null 2>&1 || : ls /usr/share/microcode_ctl/intel-ucode 2> /dev/null | sort > "/var/lib/rpm-state/microcode_ctl_un_intel-ucode_after" comm -23 \ "/var/lib/rpm-state/microcode_ctl_un_intel-ucode" \ "/var/lib/rpm-state/microcode_ctl_un_intel-ucode_after" \ > "/var/lib/rpm-state/microcode_ctl_un_intel-ucode_diff" if [ -e "/usr/libexec/microcode_ctl/update_ucode" ]; then ls /usr/share/microcode_ctl/ucode_with_caveats 2> /dev/null | sort > "/var/lib/rpm-state/microcode_ctl_un_ucode_caveats_after" comm -23 \ "/var/lib/rpm-state/microcode_ctl_un_ucode_caveats" \ "/var/lib/rpm-state/microcode_ctl_un_ucode_caveats_after" \ > "/var/lib/rpm-state/microcode_ctl_un_ucode_caveats_diff" /usr/libexec/microcode_ctl/update_ucode --action remove --cleanup \ "/var/lib/rpm-state/microcode_ctl_un_intel-ucode_diff" \ "/var/lib/rpm-state/microcode_ctl_un_ucode_caveats_diff" || : rm -f "/var/lib/rpm-state/microcode_ctl_un_ucode_caveats_after" rm -f "/var/lib/rpm-state/microcode_ctl_un_ucode_caveats_diff" else while read -r f; do [ -L "/lib/firmware/intel-ucode/$f" ] || continue rm -f "/lib/firmware/intel-ucode/$f" done < "/var/lib/rpm-state/microcode_ctl_un_intel-ucode_diff" rmdir "/lib/firmware/intel-ucode" 2>/dev/null || : # We presume that if we don't have update_ucode script, we can remove # all the caveats-related files. while read -r f; do if [ -L "$f" ] || [ "${f%readme-*}" != "$f" ]; then rm -f "$f" rmdir -p $(dirname "$f") 2>/dev/null || : fi done < "/var/lib/rpm-state/microcode_ctl_un_file_list" fi rm -f "/var/lib/rpm-state/microcode_ctl_un_intel-ucode" rm -f "/var/lib/rpm-state/microcode_ctl_un_intel-ucode_after" rm -f "/var/lib/rpm-state/microcode_ctl_un_intel-ucode_diff" rm -f "/var/lib/rpm-state/microcode_ctl_un_ucode_caveats" rm -f "/var/lib/rpm-state/microcode_ctl_un_file_list" exit 0k=M,h p%!O7 + {lJ : |WPL cW{r!le`JPbr :R (( 0 p00P`80<P$$(0,HL$88\L@,D\Xd8 Lxpl\<D@,TTp(,<Pdd\(P||||x8LLdd ( $  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tel-ucode/06-ba-03)firmware(intel-ucode/06-be-00)firmware(intel-ucode/06-bf-02)firmware(intel-ucode/06-bf-05)firmware(intel-ucode/0f-00-07)firmware(intel-ucode/0f-00-07)firmware(intel-ucode/0f-00-0a)firmware(intel-ucode/0f-00-0a)firmware(intel-ucode/0f-00-0a)firmware(intel-ucode/0f-01-02)firmware(intel-ucode/0f-02-04)firmware(intel-ucode/0f-02-04)firmware(intel-ucode/0f-02-04)firmware(intel-ucode/0f-02-05)firmware(intel-ucode/0f-02-05)firmware(intel-ucode/0f-02-05)firmware(intel-ucode/0f-02-05)firmware(intel-ucode/0f-02-06)firmware(intel-ucode/0f-02-07)firmware(intel-ucode/0f-02-07)firmware(intel-ucode/0f-02-07)firmware(intel-ucode/0f-02-09)firmware(intel-ucode/0f-02-09)firmware(intel-ucode/0f-02-09)firmware(intel-ucode/0f-03-02)firmware(intel-ucode/0f-03-03)firmware(intel-ucode/0f-03-04)firmware(intel-ucode/0f-04-01)firmware(intel-ucode/0f-04-01)firmware(intel-ucode/0f-04-03)firmware(intel-ucode/0f-04-04)firmware(intel-ucode/0f-04-07)firmware(intel-ucode/0f-04-08)firmware(intel-ucode/0f-04-08)firmware(intel-ucode/0f-04-08)firmware(intel-ucode/0f-04-09)firmware(intel-ucode/0f-04-0a)firmware(intel-ucode/0f-04-0a)firmware(intel-ucode/0f-06-02)firmware(intel-ucode/0f-06-04)firmware(intel-ucode/0f-06-04)firmware(intel-ucode/0f-06-05)firmware(intel-ucode/0f-06-08)iucode_date(fname:intel/06-03-02;cpuid:00001632;pf_mask:0x0)iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x1)iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SEPP_[PII]";stepping:"A0";pf_model:0x1)iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x2)iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"A0";pf_model:0x2)iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x8)iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x8;segment:"Mobile";codename:"Deschutes_MMC1/MMC2_[PII]";stepping:"A0";pf_model:0x8)iucode_date(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1)iucode_date(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"A1";pf_model:0x1)iucode_date(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SEPP_[PII]";stepping:"A1";pf_model:0x1)iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x1)iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"B0";pf_model:0x1)iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x2)iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x4)iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x4;segment:"Server";codename:"Deschutes_SECC_[PII]";stepping:"B0";pf_model:0x4)iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x1)iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"B1";pf_model:0x1)iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x2)iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"B1";pf_model:0x2)iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x4)iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x4;segment:"Server";codename:"Deschutes_SECC_[PII]";stepping:"B1";pf_model:0x4)iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x8)iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x8;segment:"Mobile";codename:"Deschutes_MMC1/MMC2_[PII]";stepping:"B1";pf_model:0x8)iucode_date(fname:intel/06-06-00;cpuid:00000660;pf_mask:0x1)iucode_date(fname:intel/06-06-00;cpuid:00000660;pf_mask:0x1;segment:"Desktop";codename:"Mendocino_SEPP_[PII]";stepping:"A0";pf_model:0x1)iucode_date(fname:intel/06-06-05;cpuid:00000665;pf_mask:0x10)iucode_date(fname:intel/06-06-05;cpuid:00000665;pf_mask:0x10;segment:"Desktop";codename:"Mendocino_PPGA_[PII]";stepping:"B0";pf_model:0x10)iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x20)iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x20;segment:"Mobile";codename:"Dixon_Micro-PGA1_[PII]";stepping:"A1";pf_model:0x20)iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x2)iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x2;segment:"Mobile";codename:"Dixon_Mini-Cart_[PII]";stepping:"A1";pf_model:0x2)iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x8)iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x8;segment:"Mobile";codename:"Dixon_MMC1/MMC2_[PII]";stepping:"A1";pf_model:0x8)iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x20)iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x20;segment:"Mobile";codename:"Dixon_Micro-PGA1_[PII]";stepping:"A1";pf_model:0x20)iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x2)iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x2;segment:"Mobile";codename:"Dixon_Mini-Cart_[PII]";stepping:"A1";pf_model:0x2)iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x8)iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x8;segment:"Mobile";codename:"Dixon_MMC1/MMC2_[PII]";stepping:"A1";pf_model:0x8)iucode_date(fname:intel/06-07-01;cpuid:00000671;pf_mask:0x4)iucode_date(fname:intel/06-07-01;cpuid:00000671;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"B0";pf_model:0x4)iucode_date(fname:intel/06-07-02;cpuid:00000672;pf_mask:0x4)iucode_date(fname:intel/06-07-02;cpuid:00000672;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"B0";pf_model:0x4)iucode_date(fname:intel/06-07-03;cpuid:00000673;pf_mask:0x4)iucode_date(fname:intel/06-07-03;cpuid:00000673;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"C0";pf_model:0x4)iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x10)iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_FC-PGA_[PIII]";stepping:"A2";pf_model:0x10)iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x1)iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x1;segment:"Desktop";codename:"Coppermine_SECC/SECC2_[PIII]";stepping:"A2";pf_model:0x1)iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x20)iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x20;segment:"Mobile";codename:"Coppermine_Micro-PGA2_[PIII]";stepping:"A2";pf_model:0x20)iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x4)iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x4;segment:"Server";codename:"Cascades_SECC_[PIII]";stepping:"A2";pf_model:0x4)iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x8)iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x8;segment:"Mobile";codename:"Coppermine_MMC2_[PIII]";stepping:"A2";pf_model:0x8)iucode_date(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x20)iucode_date(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x20;segment:"Mobile";codename:"Coppermine_Micro-PGA2_[PIII]";stepping:"B0";pf_model:0x20)iucode_date(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x8)iucode_date(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x8;segment:"Mobile";codename:"Coppermine_MMC2_[PIII]";stepping:"B0";pf_model:0x8)iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x10)iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_FC-PGA_[PIII]";stepping:"C0";pf_model:0x10)iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x1)iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x1;segment:"Desktop";codename:"Coppermine_SECC/SECC2_[PIII]";stepping:"C0";pf_model:0x1)iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x2)iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x2;segment:"Mobile";codename:"Coppermine_[PIII]";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x4)iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x4;segment:"Server";codename:"Cascades_SECC_[PIII]";stepping:"C0";pf_model:0x4)iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x80)iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x80;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"C0";pf_model:0x80)iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x10)iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x20)iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x20;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x80)iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x80;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x10)iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x10;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x20)iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x20;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x80)iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x80;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)iucode_date(fname:intel/06-0a-00;cpuid:000006a0;pf_mask:0x4)iucode_date(fname:intel/06-0a-00;cpuid:000006a0;pf_mask:0x4;segment:"Server";codename:"Cascades_[PIII]";stepping:"A0";pf_model:0x4)iucode_date(fname:intel/06-0a-01;cpuid:000006a1;pf_mask:0x4)iucode_date(fname:intel/06-0a-01;cpuid:000006a1;pf_mask:0x4;segment:"Server";codename:"Cascades_[PIII]";stepping:"A1";pf_model:0x4)iucode_date(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x10)iucode_date(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x10;segment:"Desktop";codename:"Tualatin_FC-PGA2_[PIII]";stepping:"A1";pf_model:0x10)iucode_date(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x20)iucode_date(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x20;segment:"Mobile";codename:"Tualatin_Micro-PGA2_[PIII]";stepping:"A1";pf_model:0x20)iucode_date(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x10)iucode_date(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x10;segment:"Desktop";codename:"Tualatin_FC-PGA2_[PIII]";stepping:"B1";pf_model:0x10)iucode_date(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x20)iucode_date(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x20;segment:"Mobile";codename:"Tualatin_Micro-PGA2_[PIII]";stepping:"B1";pf_model:0x20)iucode_date(fname:intel/06-0d-06;cpuid:000006d6;pf_mask:0x20)iucode_date(fname:intel/06-0d-06;cpuid:000006d6;pf_mask:0x20;segment:"Mobile";codename:"Dothan_[P-M]";stepping:"B0";pf_model:0x20)iucode_date(fname:intel/06-0e-08;cpuid:000006e8;pf_mask:0x20)iucode_date(fname:intel/06-0e-08;cpuid:000006e8;pf_mask:0x20;segment:"Mobile";codename:"Yonah";stepping:"C0";pf_model:0x20)iucode_date(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x20)iucode_date(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x20;segment:"Mobile";codename:"Yonah";stepping:"E0";pf_model:0xa0)iucode_date(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x80)iucode_date(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x80;segment:"Mobile";codename:"Yonah";stepping:"E0";pf_model:0xa0)iucode_date(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1)iucode_date(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"L2";pf_model:0x1)iucode_date(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"L2";pf_model:0x1)iucode_date(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x20)iucode_date(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"L2";pf_model:0x20)iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1)iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"B2";pf_model:0x1)iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"B2";pf_model:0x1)iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x20)iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"B2";pf_model:0x20)iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x4)iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x4;segment:"Server";codename:"Woodcrest_[Merom]";stepping:"B2";pf_model:0x4)iucode_date(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10)iucode_date(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10;segment:"Desktop";codename:"Kentsfield_[Merom]";stepping:"B3";pf_model:0x10)iucode_date(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10;segment:"Server";codename:"Kentsfield_Xeon_[Merom]";stepping:"B3";pf_model:0x10)iucode_date(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x40)iucode_date(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x40;segment:"Server";codename:"Clovertown_[Merom]";stepping:"B3";pf_model:0x40)iucode_date(fname:intel/06-0f-0a;cpuid:000006fa;pf_mask:0x80)iucode_date(fname:intel/06-0f-0a;cpuid:000006fa;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"E1";pf_model:0x80)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10;segment:"Desktop";codename:"Kentsfield_[Merom]";stepping:"G0";pf_model:0x10)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10;segment:"Server";codename:"Kentsfield_Xeon_[Merom]";stepping:"G0";pf_model:0x10)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"G0";pf_model:0x1)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"G0";pf_model:0x1)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x20)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"G0";pf_model:0xa0)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x40)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x40;segment:"Server";codename:"Clovertown_[Merom]";stepping:"G0";pf_model:0x40)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x4)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x4;segment:"Server";codename:"Woodcrest_[Merom]";stepping:"G0";pf_model:0x4)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x80)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"G0";pf_model:0xa0)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x8)iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x8;segment:"Server";codename:"Tigerton_[Merom]";stepping:"G0";pf_model:0x8)iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x1)iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"M0";pf_model:0x1)iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x20)iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"M0";pf_model:0xa0)iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x80)iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"M0";pf_model:0xa0)iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x1)iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x1;segment:"Desktop";codename:"Conroe-L_[Merom]";stepping:"A1";pf_model:0x1)iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x2)iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x2;segment:"Mobile";codename:"Merom-L";stepping:"A1";pf_model:0x82)iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x80)iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x80;segment:"Mobile";codename:"Merom-L";stepping:"A1";pf_model:0x82)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x40)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x40;segment:"Server";codename:"Harpertown_[Penryn]";stepping:"C0";pf_model:0x40)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x4)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x4;segment:"Server";codename:"Wolfdale-DP_[Penryn]";stepping:"M0";pf_model:0x4)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_date(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10)iucode_date(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C1";pf_model:0x10)iucode_date(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"M1";pf_model:0x10)iucode_date(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C1";pf_model:0x10)iucode_date(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"M1";pf_model:0x10)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44;segment:"Server";codename:"Harpertown_[Penryn]";stepping:"E0";pf_model:0x44)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44;segment:"Server";codename:"Wolfdale-DP_[Penryn]";stepping:"E0";pf_model:0x44)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)iucode_date(fname:intel/06-1a-04;cpuid:000106a4;pf_mask:0x3)iucode_date(fname:intel/06-1a-04;cpuid:000106a4;pf_mask:0x3;segment:"Dekstop";codename:"Bloomfield_[Nehalem]";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3)iucode_date(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Dekstop";codename:"Bloomfield_[Nehalem]";stepping:"D0";pf_model:0x3)iucode_date(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]_EP";stepping:"D0";pf_model:0x3)iucode_date(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]";stepping:"D0";pf_model:0x3)iucode_date(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]_WS";stepping:"D0";pf_model:0x3)iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x1)iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x1;segment:"Mobile";codename:"Silverthorne_[Bonnell]";stepping:"C0";pf_model:0x1)iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4)iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4;segment:"Desktop";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x4)iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4;segment:"Mobile";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x4)iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x8)iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x8;segment:"Desktop";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x8)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)iucode_date(fname:intel/06-1d-01;cpuid:000106d1;pf_mask:0x8)iucode_date(fname:intel/06-1d-01;cpuid:000106d1;pf_mask:0x8;segment:"Server";codename:"Dunnington_[Penryn]";stepping:"A1";pf_model:0x8)iucode_date(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13)iucode_date(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Dekstop";codename:"Lynnfield_[Nehalem]";stepping:"B1";pf_model:0x13)iucode_date(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Mobile";codename:"Clarksfield_[Nehalem]";stepping:"B1";pf_model:0x13)iucode_date(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Server";codename:"Lynnfield_Xeon_[Nehalem]";stepping:"B1";pf_model:0x13)iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12)iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Desktop";codename:"Westmere";stepping:"C2";pf_model:0x12)iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Desktop";codename:"Westmere";stepping:"K0";pf_model:0x12)iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Mobile";codename:"Westmere";stepping:"C2";pf_model:0x12)iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Mobile";codename:"Westmere";stepping:"K0";pf_model:0x12)iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Server";codename:"Westmere";stepping:"C2";pf_model:0x12)iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Server";codename:"Westmere";stepping:"K0";pf_model:0x12)iucode_date(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92)iucode_date(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92;segment:"Desktop";codename:"Clarkdale_[Westmere]";stepping:"K0";pf_model:0x92)iucode_date(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92;segment:"Mobile";codename:"Arrandale_[Westmere]";stepping:"K0";pf_model:0x92)iucode_date(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x1)iucode_date(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x1;segment:"SOC";codename:"Lincroft_[Bonnell]";stepping:"C0";pf_model:0x1)iucode_date(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2)iucode_date(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2;segment:"SOC";codename:"Tunnell_Creek_[Bonnell]";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2;segment:"SOC";codename:"Tunnell_Creek_[Bonnell]";stepping:"B1";pf_model:0x2)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"J1";pf_model:0x12)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"J1";pf_model:0x12)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge_Xeon_E3";stepping:"D2";pf_model:0x12)iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge_Xeon_E3";stepping:"Q0";pf_model:0x12)iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3)iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Desktop";codename:"Gulftown_[Westmere]";stepping:"B1";pf_model:0x3)iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-EP_EP";stepping:"B1";pf_model:0x3)iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-EP";stepping:"B1";pf_model:0x3)iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-WS";stepping:"B1";pf_model:0x3)iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-WS_WS";stepping:"B1";pf_model:0x3)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C1";pf_model:0x6d)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M0";pf_model:0x6d)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C1";pf_model:0x6d)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M0";pf_model:0x6d)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C1";pf_model:0x6d)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M0";pf_model:0x6d)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C1";pf_model:0x6d)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M0";pf_model:0x6d)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C1";pf_model:0x6d)iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M0";pf_model:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C2";pf_model:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M1";pf_model:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C2";pf_model:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M1";pf_model:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C2";pf_model:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M1";pf_model:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C2";pf_model:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M1";pf_model:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C2";pf_model:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M1";pf_model:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C2";pf_model:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M1";pf_model:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)iucode_date(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4)iucode_date(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4;segment:"Server";codename:"Nehalem_EX";stepping:"D0";pf_model:0x4)iucode_date(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4;segment:"Server";codename:"Nehalem";stepping:"D0";pf_model:0x4)iucode_date(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5)iucode_date(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5;segment:"Server";codename:"Westmere-EX_EX";stepping:"A2";pf_model:0x5)iucode_date(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5;segment:"Server";codename:"Westmere-EX";stepping:"A2";pf_model:0x5)iucode_date(fname:intel/06-37-08;cpuid:00030678;pf_mask:0x2)iucode_date(fname:intel/06-37-08;cpuid:00030678;pf_mask:0x2;segment:"SOC";codename:"Valleyview";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/06-37-08;cpuid:00030678;pf_mask:0xc)iucode_date(fname:intel/06-37-08;cpuid:00030678;pf_mask:0xc;segment:"SOC";codename:"Valleyview";stepping:"C0";pf_model:0xc)iucode_date(fname:intel/06-37-09;cpuid:00030679;pf_mask:0xf)iucode_date(fname:intel/06-37-09;cpuid:00030679;pf_mask:0xf;segment:"SOC";codename:"Valleyview";stepping:"D0";pf_model:0xf)iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12)iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell_S";stepping:"Cx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell_S";stepping:"Dx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Cx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Dx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Cx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Dx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell";stepping:"Cx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell";stepping:"Dx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell_Xeon_E3";stepping:"Cx";pf_model:0x32)iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell_Xeon_E3";stepping:"Dx";pf_model:0x32)iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0)iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell";stepping:"E0";pf_model:0xc0)iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell";stepping:"F0";pf_model:0xc0)iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_U";stepping:"E0";pf_model:0xc0)iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_U";stepping:"F0";pf_model:0xc0)iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_Y";stepping:"E0";pf_model:0xc0)iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_Y";stepping:"F0";pf_model:0xc0)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Desktop";codename:"Ivy_Bridge_E";stepping:"S1";pf_model:0xed)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Desktop";codename:"Ivy_Bridge";stepping:"S1";pf_model:0xed)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"C0";pf_model:0xed)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"C1";pf_model:0xed)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"M1";pf_model:0xed)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"S1";pf_model:0xed)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"C0";pf_model:0xed)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"C1";pf_model:0xed)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"M1";pf_model:0xed)iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"S1";pf_model:0xed)iucode_date(fname:intel/06-3e-06;cpuid:000306e6;pf_mask:0xed)iucode_date(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed)iucode_date(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EX";stepping:"D1";pf_model:0xed)iucode_date(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"D1";pf_model:0xed)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"C0";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"C1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"M1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"R2";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"C0";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"C1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"M1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"R2";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"C0";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"C1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"M1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"R2";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"C0";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"C1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"M1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"R2";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"C0";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"C1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"M1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"R2";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"C0";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"C1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"M1";pf_model:0x6f)iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"R2";pf_model:0x6f)iucode_date(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80)iucode_date(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80;segment:"Server";codename:"Haswell_EX";stepping:"E0";pf_model:0x80)iucode_date(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80;segment:"Server";codename:"Haswell";stepping:"E0";pf_model:0x80)iucode_date(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72)iucode_date(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x72)iucode_date(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x72)iucode_date(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell_U";stepping:"Cx";pf_model:0x72)iucode_date(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell_U";stepping:"Dx";pf_model:0x72)iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32)iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell_R";stepping:"Cx";pf_model:0x32)iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell_R";stepping:"Dx";pf_model:0x32)iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Cx";pf_model:0x32)iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Dx";pf_model:0x32)iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Cx";pf_model:0x32)iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Dx";pf_model:0x32)iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x32)iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x32)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell_S";stepping:"E0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell_S";stepping:"G0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell";stepping:"E0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell";stepping:"G0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell_H";stepping:"E0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell_H";stepping:"G0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell";stepping:"E0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell";stepping:"G0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell";stepping:"E0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell";stepping:"G0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell_Xeon_E3";stepping:"E0";pf_model:0x22)iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell_Xeon_E3";stepping:"G0";pf_model:0x22)iucode_date(fname:intel/06-4c-03;cpuid:000406c3;pf_mask:0x1)iucode_date(fname:intel/06-4c-03;cpuid:000406c3;pf_mask:0x1;segment:"SOC";codename:"Cherry_View";stepping:"C0";pf_model:0x1)iucode_date(fname:intel/06-4c-04;cpuid:000406c4;pf_mask:0x1)iucode_date(fname:intel/06-4c-04;cpuid:000406c4;pf_mask:0x1;segment:"SOC";codename:"Cherry_View";stepping:"D0";pf_model:0x1)iucode_date(fname:intel/06-4d-08;cpuid:000406d8;pf_mask:0x1)iucode_date(fname:intel/06-4d-08;cpuid:000406d8;pf_mask:0x1;segment:"SOC";codename:"Avoton";stepping:"B0";pf_model:0x1)iucode_date(fname:intel/06-4d-08;cpuid:000406d8;pf_mask:0x1;segment:"SOC";codename:"Avoton";stepping:"C0";pf_model:0x1)iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0)iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"D0";pf_model:0xc0)iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"K1";pf_model:0xc0)iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U_2+3e";stepping:"K1";pf_model:0xc0)iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U";stepping:"D0";pf_model:0xc0)iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_Y";stepping:"D0";pf_model:0xc0)iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0)iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"D0";pf_model:0xc0)iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"K1";pf_model:0xc0)iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U_2+3e";stepping:"K1";pf_model:0xc0)iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U";stepping:"D0";pf_model:0xc0)iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_Y";stepping:"D0";pf_model:0xc0)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell_E";stepping:"B0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell_E";stepping:"M0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell_E";stepping:"R0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell";stepping:"B0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell";stepping:"M0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell";stepping:"R0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EP";stepping:"B0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EP";stepping:"M0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EP";stepping:"R0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EX";stepping:"B0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EX";stepping:"M0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EX";stepping:"R0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_ML";stepping:"B0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_ML";stepping:"M0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_ML";stepping:"R0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell";stepping:"B0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell";stepping:"M0";pf_model:0xef)iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell";stepping:"R0";pf_model:0xef)iucode_date(fname:intel/06-55-03;cpuid:00050653;pf_mask:0x97)iucode_date(fname:intel/06-55-03;cpuid:00050653;pf_mask:0x97;segment:"Server";codename:"Skylake_SP";stepping:"B1";pf_model:0x97)iucode_date(fname:intel/06-55-03;cpuid:00050653;pf_mask:0x97;segment:"Server";codename:"Skylake";stepping:"B1";pf_model:0x97)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"H0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"M0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"U0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"H0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"M0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"U0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_D";stepping:"M1";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"H0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"M0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"U0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"H0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M1";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"U0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"H0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"M0";pf_model:0xb7)iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"U0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"H0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"M0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"U0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"H0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"M0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"U0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_D";stepping:"M1";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"H0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"M0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"U0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"H0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M1";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"U0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"H0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"M0";pf_model:0xb7)iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"U0";pf_model:0xb7)iucode_date(fname:intel/06-55-05;cpuid:00050655;pf_mask:0xb7)iucode_date(fname:intel/06-55-05;cpuid:00050655;pf_mask:0xb7;segment:"Server";codename:"Cascade_Lake_SP";stepping:"A0";pf_model:0xb7)iucode_date(fname:intel/06-55-05;cpuid:00050655;pf_mask:0xb7;segment:"Server";codename:"Cascade_Lake";stepping:"A0";pf_model:0xb7)iucode_date(fname:intel/06-55-06;cpuid:00050656;pf_mask:0xbf)iucode_date(fname:intel/06-55-06;cpuid:00050656;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_SP";stepping:"B0";pf_model:0xbf)iucode_date(fname:intel/06-55-06;cpuid:00050656;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake";stepping:"B0";pf_model:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake";stepping:"B1";pf_model:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake";stepping:"L1";pf_model:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake_X";stepping:"B1";pf_model:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake_X";stepping:"L1";pf_model:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_SP";stepping:"B1";pf_model:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_SP";stepping:"L1";pf_model:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake";stepping:"B1";pf_model:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake";stepping:"L1";pf_model:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_W";stepping:"B1";pf_model:0xbf)iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_W";stepping:"L1";pf_model:0xbf)iucode_date(fname:intel/06-55-0b;cpuid:0005065b;pf_mask:0xbf)iucode_date(fname:intel/06-55-0b;cpuid:0005065b;pf_mask:0xbf;segment:"Server";codename:"Cooper_Lake_SP";stepping:"A1";pf_model:0xbf)iucode_date(fname:intel/06-55-0b;cpuid:0005065b;pf_mask:0xbf;segment:"Server";codename:"Cooper_Lake";stepping:"A1";pf_model:0xbf)iucode_date(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10)iucode_date(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V1";pf_model:0x10)iucode_date(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V1";pf_model:0x10)iucode_date(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10)iucode_date(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V2";pf_model:0x10)iucode_date(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V3";pf_model:0x10)iucode_date(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V2";pf_model:0x10)iucode_date(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V3";pf_model:0x10)iucode_date(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10)iucode_date(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"Y0";pf_model:0x10)iucode_date(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"Y0";pf_model:0x10)iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10)iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell_NS";stepping:"A0";pf_model:0x10)iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell_NS";stepping:"A1";pf_model:0x10)iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"A0";pf_model:0x10)iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"A1";pf_model:0x10)iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Hewitt_Lake_[Broadwell]";stepping:"A1";pf_model:0x10)iucode_date(fname:intel/06-5c-02;cpuid:000506c2;pf_mask:0x1)iucode_date(fname:intel/06-5c-02;cpuid:000506c2;pf_mask:0x1;segment:"SOC";codename:"Broxton";stepping:"C0";pf_model:0x1)iucode_date(fname:intel/06-5c-09;cpuid:000506c9;pf_mask:0x3)iucode_date(fname:intel/06-5c-09;cpuid:000506c9;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"D0";pf_model:0x3)iucode_date(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3)iucode_date(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"B1";pf_model:0x3)iucode_date(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"F1";pf_model:0x3)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"N0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"R0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"S0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"N0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"R0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"S0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"N0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"R0";pf_model:0x36)iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"S0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"N0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"R0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"S0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"N0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"R0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"S0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"N0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"R0";pf_model:0x36)iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"S0";pf_model:0x36)iucode_date(fname:intel/06-5f-01;cpuid:000506f1;pf_mask:0x1)iucode_date(fname:intel/06-5f-01;cpuid:000506f1;pf_mask:0x1;segment:"SOC";codename:"Denverton";stepping:"B0";pf_model:0x1)iucode_date(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80)iucode_date(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80;segment:"Mobile";codename:"Cannon_Lake";stepping:"D0";pf_model:0x80)iucode_date(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80;segment:"Mobile";codename:"Cannon_Lake_U";stepping:"D0";pf_model:0x80)iucode_date(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87)iucode_date(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87;segment:"Server";codename:"Ice_Lake_SP";stepping:"C0";pf_model:0x87)iucode_date(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87;segment:"Server";codename:"Ice_Lake";stepping:"C0";pf_model:0x87)iucode_date(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87)iucode_date(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87;segment:"Server";codename:"Ice_Lake_SP";stepping:"D0";pf_model:0x87)iucode_date(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87;segment:"Server";codename:"Ice_Lake";stepping:"D0";pf_model:0x87)iucode_date(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10)iucode_date(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10;segment:"Server";codename:"Ice_Lake_D";stepping:"B0";pf_model:0x10)iucode_date(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10;segment:"Server";codename:"Ice_Lake";stepping:"B0";pf_model:0x10)iucode_date(fname:intel/06-7a-01;cpuid:000706a1;pf_mask:0x1)iucode_date(fname:intel/06-7a-01;cpuid:000706a1;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake";stepping:"B0";pf_model:0x1)iucode_date(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1)iucode_date(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake_R";stepping:"R0";pf_model:0x1)iucode_date(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake";stepping:"R0";pf_model:0x1)iucode_date(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80)iucode_date(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake";stepping:"D1";pf_model:0x80)iucode_date(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake_U";stepping:"D1";pf_model:0x80)iucode_date(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake_Y";stepping:"D1";pf_model:0x80)iucode_date(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10)iucode_date(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10;segment:"SOC";codename:"Lakefield";stepping:"B2";pf_model:0x10)iucode_date(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10;segment:"SOC";codename:"Lakefield";stepping:"B3";pf_model:0x10)iucode_date(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80)iucode_date(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake";stepping:"B1";pf_model:0x80)iucode_date(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake_UP3";stepping:"B1";pf_model:0x80)iucode_date(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake_UP4";stepping:"B1";pf_model:0x80)iucode_date(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2)iucode_date(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_Refresh_R";stepping:"C0";pf_model:0x80)iucode_date(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_Refresh";stepping:"C0";pf_model:0x80)iucode_date(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2)iucode_date(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_H";stepping:"R0";pf_model:0xc2)iucode_date(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake";stepping:"R0";pf_model:0xc2)iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10)iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10;segment:"Mobile";codename:"Amber_Lake";stepping:"H0";pf_model:0x10)iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10;segment:"Mobile";codename:"Amber_Lake_Y_2+2";stepping:"H0";pf_model:0x10)iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0)iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"H0";pf_model:0xc0)iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"J1";pf_model:0xc0)iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_U_2+3e";stepping:"J1";pf_model:0xc0)iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_U";stepping:"H0";pf_model:0xc0)iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_Y";stepping:"H0";pf_model:0xc0)iucode_date(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0)iucode_date(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Coffee_Lake";stepping:"D0";pf_model:0xc0)iucode_date(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Coffee_Lake_U_4+3e";stepping:"D0";pf_model:0xc0)iucode_date(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_R";stepping:"Y0";pf_model:0xc0)iucode_date(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"Y0";pf_model:0xc0)iucode_date(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0)iucode_date(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0;segment:"Mobile";codename:"Whiskey_Lake";stepping:"W0";pf_model:0xd0)iucode_date(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0;segment:"Mobile";codename:"Whiskey_Lake_U";stepping:"W0";pf_model:0xd0)iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94)iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Amber_Lake";stepping:"V0";pf_model:0x94)iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Amber_Lake_Y_4+2";stepping:"V0";pf_model:0x94)iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Comet_Lake";stepping:"V0";pf_model:0x94)iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Comet_Lake_U_4+2";stepping:"V0";pf_model:0x94)iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Whiskey_Lake";stepping:"V0";pf_model:0x94)iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Whiskey_Lake_U";stepping:"V0";pf_model:0x94)iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x10)iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10)iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x10)iucode_date(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10)iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x10)iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10)iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x10)iucode_date(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10)iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x10)iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10)iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x10)iucode_date(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10)iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)iucode_date(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x10)iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10)iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x10)iucode_date(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10)iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)iucode_date(fname:intel/06-96-01;cpuid:00090661;pf_mask:0x1)iucode_date(fname:intel/06-96-01;cpuid:00090661;pf_mask:0x1;segment:"SOC";codename:"Elkhart_Rate";stepping:"B1";pf_model:0x1)iucode_date(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7)iucode_date(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7)iucode_date(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)iucode_date(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)iucode_date(fname:intel/06-97-02;cpuid:000b06f2;pf_mask:0x7)iucode_date(fname:intel/06-97-02;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-97-02;cpuid:000b06f5;pf_mask:0x7)iucode_date(fname:intel/06-97-02;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7)iucode_date(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7)iucode_date(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)iucode_date(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)iucode_date(fname:intel/06-97-05;cpuid:000b06f2;pf_mask:0x7)iucode_date(fname:intel/06-97-05;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-97-05;cpuid:000b06f5;pf_mask:0x7)iucode_date(fname:intel/06-97-05;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80)iucode_date(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_6+8";stepping:"L0";pf_model:0x82)iucode_date(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"L0";pf_model:0x82)iucode_date(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x80)iucode_date(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_U_9W";stepping:"R0";pf_model:0x80)iucode_date(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80)iucode_date(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_2+8";stepping:"R0";pf_model:0x82)iucode_date(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x82)iucode_date(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80)iucode_date(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_6+8";stepping:"L0";pf_model:0x82)iucode_date(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"L0";pf_model:0x82)iucode_date(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x80)iucode_date(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_U_9W";stepping:"R0";pf_model:0x80)iucode_date(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x40)iucode_date(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x40;segment:"Mobile";codename:"Arizona_Beach";stepping:"A0";pf_model:0x40)iucode_date(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80)iucode_date(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_2+8";stepping:"R0";pf_model:0x82)iucode_date(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x82)iucode_date(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1)iucode_date(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1;segment:"SOC";codename:"Jasper_Lake";stepping:"A0";pf_model:0x1)iucode_date(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1;segment:"SOC";codename:"Jasper_Lake";stepping:"A1";pf_model:0x1)iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a)iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake_S";stepping:"B0";pf_model:0x2a)iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake_X";stepping:"B0";pf_model:0x2a)iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake_G";stepping:"B0";pf_model:0x2a)iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake_H";stepping:"B0";pf_model:0x2a)iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Server";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Server";codename:"Kaby_Lake_Xeon_E3";stepping:"B0";pf_model:0x2a)iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22)iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"U0";pf_model:0x22)iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"U0";pf_model:0x22)iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"U0";pf_model:0x22)iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2)iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Desktop";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Mobile";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Server";codename:"Coffee_Lake_E";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Server";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22)iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"P0";pf_model:0x22)iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"P0";pf_model:0x22)iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"P0";pf_model:0x22)iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22)iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"R0";pf_model:0x22)iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"R0";pf_model:0x22)iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"R0";pf_model:0x22)iucode_date(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20)iucode_date(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20;segment:"Mobile";codename:"Comet_Lake_H";stepping:"R1";pf_model:0x20)iucode_date(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20;segment:"Mobile";codename:"Comet_Lake";stepping:"R1";pf_model:0x20)iucode_date(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22)iucode_date(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake_S_6+2";stepping:"G1";pf_model:0x22)iucode_date(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake";stepping:"G1";pf_model:0x22)iucode_date(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22)iucode_date(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake_S_10+2";stepping:"Q0";pf_model:0x22)iucode_date(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake";stepping:"Q0";pf_model:0x22)iucode_date(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80)iucode_date(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake";stepping:"A0";pf_model:0x80)iucode_date(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake_U_6+2";stepping:"A0";pf_model:0x80)iucode_date(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80)iucode_date(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake";stepping:"K1";pf_model:0x80)iucode_date(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake_U_6+2_v2";stepping:"K1";pf_model:0x80)iucode_date(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2)iucode_date(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2;segment:"Desktop";codename:"Rocket_Lake_S";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2;segment:"Desktop";codename:"Rocket_Lake";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32)iucode_date(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32;segment:"Desktop";codename:"Raptor_Lake_S";stepping:"B0";pf_model:0x32)iucode_date(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32;segment:"Desktop";codename:"Raptor_Lake";stepping:"B0";pf_model:0x32)iucode_date(fname:intel/06-ba-02;cpuid:000b06a2;pf_mask:0xe0)iucode_date(fname:intel/06-ba-02;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_H_6+8";stepping:"J0";pf_model:0xe0)iucode_date(fname:intel/06-ba-02;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_P_6+8";stepping:"J0";pf_model:0xe0)iucode_date(fname:intel/06-ba-02;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake";stepping:"J0";pf_model:0xe0)iucode_date(fname:intel/06-ba-02;cpuid:000b06a3;pf_mask:0xe0)iucode_date(fname:intel/06-ba-02;cpuid:000b06a3;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake";stepping:"Q0";pf_model:0xe0)iucode_date(fname:intel/06-ba-02;cpuid:000b06a3;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_U_2+8";stepping:"Q0";pf_model:0xe0)iucode_date(fname:intel/06-ba-03;cpuid:000b06a2;pf_mask:0xe0)iucode_date(fname:intel/06-ba-03;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_H_6+8";stepping:"J0";pf_model:0xe0)iucode_date(fname:intel/06-ba-03;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_P_6+8";stepping:"J0";pf_model:0xe0)iucode_date(fname:intel/06-ba-03;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake";stepping:"J0";pf_model:0xe0)iucode_date(fname:intel/06-ba-03;cpuid:000b06a3;pf_mask:0xe0)iucode_date(fname:intel/06-ba-03;cpuid:000b06a3;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake";stepping:"Q0";pf_model:0xe0)iucode_date(fname:intel/06-ba-03;cpuid:000b06a3;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_U_2+8";stepping:"Q0";pf_model:0xe0)iucode_date(fname:intel/06-be-00;cpuid:000b06e0;pf_mask:0x11)iucode_date(fname:intel/06-be-00;cpuid:000b06e0;pf_mask:0x11;segment:"SOC";codename:"Alder_Lake_N";stepping:"A0";pf_model:0x1)iucode_date(fname:intel/06-be-00;cpuid:000b06e0;pf_mask:0x11;segment:"SOC";codename:"Alder_Lake";stepping:"A0";pf_model:0x1)iucode_date(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7)iucode_date(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7)iucode_date(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)iucode_date(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)iucode_date(fname:intel/06-bf-02;cpuid:000b06f2;pf_mask:0x7)iucode_date(fname:intel/06-bf-02;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-bf-02;cpuid:000b06f5;pf_mask:0x7)iucode_date(fname:intel/06-bf-02;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7)iucode_date(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7)iucode_date(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)iucode_date(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)iucode_date(fname:intel/06-bf-05;cpuid:000b06f2;pf_mask:0x7)iucode_date(fname:intel/06-bf-05;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/06-bf-05;cpuid:000b06f5;pf_mask:0x7)iucode_date(fname:intel/06-bf-05;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_date(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x1)iucode_date(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x1;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"B2";pf_model:0x1)iucode_date(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x2)iucode_date(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x2;segment:"Server";codename:"Foster_DP_[NetBurst]";stepping:"B2";pf_model:0x2)iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x1)iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x1;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"C1";pf_model:0x1)iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x2)iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x2;segment:"Server";codename:"Foster_DP_[NetBurst]";stepping:"C1";pf_model:0x2)iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x4)iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x4;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"C1";pf_model:0x4)iucode_date(fname:intel/0f-01-02;cpuid:00000f12;pf_mask:0x4)iucode_date(fname:intel/0f-01-02;cpuid:00000f12;pf_mask:0x4;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"D0";pf_model:0x4)iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x10)iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x10;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"B0";pf_model:0x10)iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x2)iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"B0";pf_model:0x2)iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x4)iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B0";pf_model:0x4)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B1";pf_model:0x14)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"M0";pf_model:0x14)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"B1";pf_model:0x1)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"M0";pf_model:0x1)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x2)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x2;segment:"Server";codename:"Gallatin_[NetBurst]";stepping:"B1";pf_model:0x2)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B1";pf_model:0x14)iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"M0";pf_model:0x14)iucode_date(fname:intel/0f-02-06;cpuid:00000f26;pf_mask:0x2)iucode_date(fname:intel/0f-02-06;cpuid:00000f26;pf_mask:0x2;segment:"Server";codename:"Gallatin_[NetBurst]";stepping:"B1";pf_model:0x2)iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x2)iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"C1";pf_model:0x2)iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x4)iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"C1";pf_model:0x4)iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x8)iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x8;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"C1";pf_model:0x8)iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x2)iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"D1";pf_model:0x2)iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x4)iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"D1";pf_model:0x4)iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x8)iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x8;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"D1";pf_model:0x8)iucode_date(fname:intel/0f-03-02;cpuid:00000f32;pf_mask:0xd)iucode_date(fname:intel/0f-03-02;cpuid:00000f32;pf_mask:0xd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"B1";pf_model:0xd)iucode_date(fname:intel/0f-03-03;cpuid:00000f33;pf_mask:0xd)iucode_date(fname:intel/0f-03-03;cpuid:00000f33;pf_mask:0xd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"C0";pf_model:0xd)iucode_date(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d)iucode_date(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"D0";pf_model:0x1d)iucode_date(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"D0";pf_model:0x1d)iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0x2)iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0x2;segment:"Server";codename:"Protomac_[NetBurst]";stepping:"C0";pf_model:0x2)iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd)iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"E0";pf_model:0xbd)iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Server";codename:"Cranford_[NetBurst]";stepping:"A0";pf_model:0xbd)iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"E0";pf_model:0xbd)iucode_date(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d)iucode_date(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"N0";pf_model:0x9d)iucode_date(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"N0";pf_model:0x9d)iucode_date(fname:intel/0f-04-04;cpuid:00000f44;pf_mask:0x9d)iucode_date(fname:intel/0f-04-04;cpuid:00000f44;pf_mask:0x9d;segment:"Desktop";codename:"Smithfield_[NetBurst]";stepping:"A0";pf_model:0x9d)iucode_date(fname:intel/0f-04-07;cpuid:00000f47;pf_mask:0x9d)iucode_date(fname:intel/0f-04-07;cpuid:00000f47;pf_mask:0x9d;segment:"Desktop";codename:"Smithfield_[NetBurst]";stepping:"B0";pf_model:0x9d)iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x1)iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x1;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x1)iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x2)iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x2;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x2)iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f)iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x1)iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x2)iucode_date(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd)iucode_date(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"G1";pf_model:0xbd)iucode_date(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Server";codename:"Cranford_[NetBurst]";stepping:"B0";pf_model:0xbd)iucode_date(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"G1";pf_model:0xbd)iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c)iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"R0";pf_model:0x5c)iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"R0";pf_model:0x5d)iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d)iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"R0";pf_model:0x5c)iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"R0";pf_model:0x5d)iucode_date(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4)iucode_date(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4;segment:"Desktop";codename:"Cedar_Mill_[NetBurst]";stepping:"B1";pf_model:0x4)iucode_date(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4;segment:"Desktop";codename:"Presler_[NetBurst]";stepping:"B1";pf_model:0x4)iucode_date(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x1)iucode_date(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x1;segment:"Server";codename:"Dempsey_[NetBurst]";stepping:"C1";pf_model:0x1)iucode_date(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34)iucode_date(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34;segment:"Desktop";codename:"Cedar_Mill_[NetBurst]";stepping:"C1";pf_model:0x34)iucode_date(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34;segment:"Desktop";codename:"Presler_[NetBurst]";stepping:"C1";pf_model:0x34)iucode_date(fname:intel/0f-06-05;cpuid:00000f65;pf_mask:0x1)iucode_date(fname:intel/0f-06-05;cpuid:00000f65;pf_mask:0x1;segment:"Server";codename:"Dempsey_[NetBurst]";stepping:"D0";pf_model:0x1)iucode_date(fname:intel/0f-06-08;cpuid:00000f68;pf_mask:0x22)iucode_date(fname:intel/0f-06-08;cpuid:00000f68;pf_mask:0x22;segment:"Server";codename:"Tulsa_[NetBurst]";stepping:"B0";pf_model:0x22)iucode_rev(fname:intel/06-03-02;cpuid:00001632;pf_mask:0x0)iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x1)iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SEPP_[PII]";stepping:"A0";pf_model:0x1)iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x2)iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"A0";pf_model:0x2)iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x8)iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x8;segment:"Mobile";codename:"Deschutes_MMC1/MMC2_[PII]";stepping:"A0";pf_model:0x8)iucode_rev(fname:intel/06-05-00;platform_id:0x1)iucode_rev(fname:intel/06-05-00;platform_id:0x2)iucode_rev(fname:intel/06-05-00;platform_id:0x8)iucode_rev(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1)iucode_rev(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"A1";pf_model:0x1)iucode_rev(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SEPP_[PII]";stepping:"A1";pf_model:0x1)iucode_rev(fname:intel/06-05-01;platform_id:0x1)iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x1)iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"B0";pf_model:0x1)iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x2)iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x4)iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x4;segment:"Server";codename:"Deschutes_SECC_[PII]";stepping:"B0";pf_model:0x4)iucode_rev(fname:intel/06-05-02;platform_id:0x1)iucode_rev(fname:intel/06-05-02;platform_id:0x2)iucode_rev(fname:intel/06-05-02;platform_id:0x4)iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x1)iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"B1";pf_model:0x1)iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x2)iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"B1";pf_model:0x2)iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x4)iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x4;segment:"Server";codename:"Deschutes_SECC_[PII]";stepping:"B1";pf_model:0x4)iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x8)iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x8;segment:"Mobile";codename:"Deschutes_MMC1/MMC2_[PII]";stepping:"B1";pf_model:0x8)iucode_rev(fname:intel/06-05-03;platform_id:0x1)iucode_rev(fname:intel/06-05-03;platform_id:0x2)iucode_rev(fname:intel/06-05-03;platform_id:0x4)iucode_rev(fname:intel/06-05-03;platform_id:0x8)iucode_rev(fname:intel/06-06-00;cpuid:00000660;pf_mask:0x1)iucode_rev(fname:intel/06-06-00;cpuid:00000660;pf_mask:0x1;segment:"Desktop";codename:"Mendocino_SEPP_[PII]";stepping:"A0";pf_model:0x1)iucode_rev(fname:intel/06-06-00;platform_id:0x1)iucode_rev(fname:intel/06-06-05;cpuid:00000665;pf_mask:0x10)iucode_rev(fname:intel/06-06-05;cpuid:00000665;pf_mask:0x10;segment:"Desktop";codename:"Mendocino_PPGA_[PII]";stepping:"B0";pf_model:0x10)iucode_rev(fname:intel/06-06-05;platform_id:0x10)iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x20)iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x20;segment:"Mobile";codename:"Dixon_Micro-PGA1_[PII]";stepping:"A1";pf_model:0x20)iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x2)iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x2;segment:"Mobile";codename:"Dixon_Mini-Cart_[PII]";stepping:"A1";pf_model:0x2)iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x8)iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x8;segment:"Mobile";codename:"Dixon_MMC1/MMC2_[PII]";stepping:"A1";pf_model:0x8)iucode_rev(fname:intel/06-06-0a;platform_id:0x20)iucode_rev(fname:intel/06-06-0a;platform_id:0x2)iucode_rev(fname:intel/06-06-0a;platform_id:0x8)iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x20)iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x20;segment:"Mobile";codename:"Dixon_Micro-PGA1_[PII]";stepping:"A1";pf_model:0x20)iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x2)iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x2;segment:"Mobile";codename:"Dixon_Mini-Cart_[PII]";stepping:"A1";pf_model:0x2)iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x8)iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x8;segment:"Mobile";codename:"Dixon_MMC1/MMC2_[PII]";stepping:"A1";pf_model:0x8)iucode_rev(fname:intel/06-06-0d;platform_id:0x20)iucode_rev(fname:intel/06-06-0d;platform_id:0x2)iucode_rev(fname:intel/06-06-0d;platform_id:0x8)iucode_rev(fname:intel/06-07-01;cpuid:00000671;pf_mask:0x4)iucode_rev(fname:intel/06-07-01;cpuid:00000671;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"B0";pf_model:0x4)iucode_rev(fname:intel/06-07-01;platform_id:0x4)iucode_rev(fname:intel/06-07-02;cpuid:00000672;pf_mask:0x4)iucode_rev(fname:intel/06-07-02;cpuid:00000672;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"B0";pf_model:0x4)iucode_rev(fname:intel/06-07-02;platform_id:0x4)iucode_rev(fname:intel/06-07-03;cpuid:00000673;pf_mask:0x4)iucode_rev(fname:intel/06-07-03;cpuid:00000673;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"C0";pf_model:0x4)iucode_rev(fname:intel/06-07-03;platform_id:0x4)iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x10)iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_FC-PGA_[PIII]";stepping:"A2";pf_model:0x10)iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x1)iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x1;segment:"Desktop";codename:"Coppermine_SECC/SECC2_[PIII]";stepping:"A2";pf_model:0x1)iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x20)iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x20;segment:"Mobile";codename:"Coppermine_Micro-PGA2_[PIII]";stepping:"A2";pf_model:0x20)iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x4)iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x4;segment:"Server";codename:"Cascades_SECC_[PIII]";stepping:"A2";pf_model:0x4)iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x8)iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x8;segment:"Mobile";codename:"Coppermine_MMC2_[PIII]";stepping:"A2";pf_model:0x8)iucode_rev(fname:intel/06-08-01;platform_id:0x10)iucode_rev(fname:intel/06-08-01;platform_id:0x1)iucode_rev(fname:intel/06-08-01;platform_id:0x20)iucode_rev(fname:intel/06-08-01;platform_id:0x4)iucode_rev(fname:intel/06-08-01;platform_id:0x8)iucode_rev(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x20)iucode_rev(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x20;segment:"Mobile";codename:"Coppermine_Micro-PGA2_[PIII]";stepping:"B0";pf_model:0x20)iucode_rev(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x8)iucode_rev(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x8;segment:"Mobile";codename:"Coppermine_MMC2_[PIII]";stepping:"B0";pf_model:0x8)iucode_rev(fname:intel/06-08-03;platform_id:0x20)iucode_rev(fname:intel/06-08-03;platform_id:0x8)iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x10)iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_FC-PGA_[PIII]";stepping:"C0";pf_model:0x10)iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x1)iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x1;segment:"Desktop";codename:"Coppermine_SECC/SECC2_[PIII]";stepping:"C0";pf_model:0x1)iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x2)iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x2;segment:"Mobile";codename:"Coppermine_[PIII]";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x4)iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x4;segment:"Server";codename:"Cascades_SECC_[PIII]";stepping:"C0";pf_model:0x4)iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x80)iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x80;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"C0";pf_model:0x80)iucode_rev(fname:intel/06-08-06;platform_id:0x10)iucode_rev(fname:intel/06-08-06;platform_id:0x1)iucode_rev(fname:intel/06-08-06;platform_id:0x2)iucode_rev(fname:intel/06-08-06;platform_id:0x4)iucode_rev(fname:intel/06-08-06;platform_id:0x80)iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x10)iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x20)iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x20;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x80)iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x80;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)iucode_rev(fname:intel/06-08-0a;platform_id:0x10)iucode_rev(fname:intel/06-08-0a;platform_id:0x20)iucode_rev(fname:intel/06-08-0a;platform_id:0x80)iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x10)iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x10;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x20)iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x20;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x80)iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x80;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)iucode_rev(fname:intel/06-09-05;platform_id:0x10)iucode_rev(fname:intel/06-09-05;platform_id:0x20)iucode_rev(fname:intel/06-09-05;platform_id:0x80)iucode_rev(fname:intel/06-0a-00;cpuid:000006a0;pf_mask:0x4)iucode_rev(fname:intel/06-0a-00;cpuid:000006a0;pf_mask:0x4;segment:"Server";codename:"Cascades_[PIII]";stepping:"A0";pf_model:0x4)iucode_rev(fname:intel/06-0a-00;platform_id:0x4)iucode_rev(fname:intel/06-0a-01;cpuid:000006a1;pf_mask:0x4)iucode_rev(fname:intel/06-0a-01;cpuid:000006a1;pf_mask:0x4;segment:"Server";codename:"Cascades_[PIII]";stepping:"A1";pf_model:0x4)iucode_rev(fname:intel/06-0a-01;platform_id:0x4)iucode_rev(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x10)iucode_rev(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x10;segment:"Desktop";codename:"Tualatin_FC-PGA2_[PIII]";stepping:"A1";pf_model:0x10)iucode_rev(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x20)iucode_rev(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x20;segment:"Mobile";codename:"Tualatin_Micro-PGA2_[PIII]";stepping:"A1";pf_model:0x20)iucode_rev(fname:intel/06-0b-01;platform_id:0x10)iucode_rev(fname:intel/06-0b-01;platform_id:0x20)iucode_rev(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x10)iucode_rev(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x10;segment:"Desktop";codename:"Tualatin_FC-PGA2_[PIII]";stepping:"B1";pf_model:0x10)iucode_rev(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x20)iucode_rev(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x20;segment:"Mobile";codename:"Tualatin_Micro-PGA2_[PIII]";stepping:"B1";pf_model:0x20)iucode_rev(fname:intel/06-0b-04;platform_id:0x10)iucode_rev(fname:intel/06-0b-04;platform_id:0x20)iucode_rev(fname:intel/06-0d-06;cpuid:000006d6;pf_mask:0x20)iucode_rev(fname:intel/06-0d-06;cpuid:000006d6;pf_mask:0x20;segment:"Mobile";codename:"Dothan_[P-M]";stepping:"B0";pf_model:0x20)iucode_rev(fname:intel/06-0d-06;platform_id:0x20)iucode_rev(fname:intel/06-0e-08;cpuid:000006e8;pf_mask:0x20)iucode_rev(fname:intel/06-0e-08;cpuid:000006e8;pf_mask:0x20;segment:"Mobile";codename:"Yonah";stepping:"C0";pf_model:0x20)iucode_rev(fname:intel/06-0e-08;platform_id:0x20)iucode_rev(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x20)iucode_rev(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x20;segment:"Mobile";codename:"Yonah";stepping:"E0";pf_model:0xa0)iucode_rev(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x80)iucode_rev(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x80;segment:"Mobile";codename:"Yonah";stepping:"E0";pf_model:0xa0)iucode_rev(fname:intel/06-0e-0c;platform_id:0x20)iucode_rev(fname:intel/06-0e-0c;platform_id:0x80)iucode_rev(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1)iucode_rev(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"L2";pf_model:0x1)iucode_rev(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"L2";pf_model:0x1)iucode_rev(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x20)iucode_rev(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"L2";pf_model:0x20)iucode_rev(fname:intel/06-0f-02;platform_id:0x1)iucode_rev(fname:intel/06-0f-02;platform_id:0x20)iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1)iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"B2";pf_model:0x1)iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"B2";pf_model:0x1)iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x20)iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"B2";pf_model:0x20)iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x4)iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x4;segment:"Server";codename:"Woodcrest_[Merom]";stepping:"B2";pf_model:0x4)iucode_rev(fname:intel/06-0f-06;platform_id:0x1)iucode_rev(fname:intel/06-0f-06;platform_id:0x20)iucode_rev(fname:intel/06-0f-06;platform_id:0x4)iucode_rev(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10)iucode_rev(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10;segment:"Desktop";codename:"Kentsfield_[Merom]";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10;segment:"Server";codename:"Kentsfield_Xeon_[Merom]";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x40)iucode_rev(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x40;segment:"Server";codename:"Clovertown_[Merom]";stepping:"B3";pf_model:0x40)iucode_rev(fname:intel/06-0f-07;platform_id:0x10)iucode_rev(fname:intel/06-0f-07;platform_id:0x40)iucode_rev(fname:intel/06-0f-0a;cpuid:000006fa;pf_mask:0x80)iucode_rev(fname:intel/06-0f-0a;cpuid:000006fa;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"E1";pf_model:0x80)iucode_rev(fname:intel/06-0f-0a;platform_id:0x80)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10;segment:"Desktop";codename:"Kentsfield_[Merom]";stepping:"G0";pf_model:0x10)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10;segment:"Server";codename:"Kentsfield_Xeon_[Merom]";stepping:"G0";pf_model:0x10)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"G0";pf_model:0x1)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"G0";pf_model:0x1)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x20)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"G0";pf_model:0xa0)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x40)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x40;segment:"Server";codename:"Clovertown_[Merom]";stepping:"G0";pf_model:0x40)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x4)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x4;segment:"Server";codename:"Woodcrest_[Merom]";stepping:"G0";pf_model:0x4)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x80)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"G0";pf_model:0xa0)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x8)iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x8;segment:"Server";codename:"Tigerton_[Merom]";stepping:"G0";pf_model:0x8)iucode_rev(fname:intel/06-0f-0b;platform_id:0x10)iucode_rev(fname:intel/06-0f-0b;platform_id:0x1)iucode_rev(fname:intel/06-0f-0b;platform_id:0x20)iucode_rev(fname:intel/06-0f-0b;platform_id:0x40)iucode_rev(fname:intel/06-0f-0b;platform_id:0x4)iucode_rev(fname:intel/06-0f-0b;platform_id:0x80)iucode_rev(fname:intel/06-0f-0b;platform_id:0x8)iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x1)iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"M0";pf_model:0x1)iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x20)iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"M0";pf_model:0xa0)iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x80)iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"M0";pf_model:0xa0)iucode_rev(fname:intel/06-0f-0d;platform_id:0x1)iucode_rev(fname:intel/06-0f-0d;platform_id:0x20)iucode_rev(fname:intel/06-0f-0d;platform_id:0x80)iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x1)iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x1;segment:"Desktop";codename:"Conroe-L_[Merom]";stepping:"A1";pf_model:0x1)iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x2)iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x2;segment:"Mobile";codename:"Merom-L";stepping:"A1";pf_model:0x82)iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x80)iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x80;segment:"Mobile";codename:"Merom-L";stepping:"A1";pf_model:0x82)iucode_rev(fname:intel/06-16-01;platform_id:0x1)iucode_rev(fname:intel/06-16-01;platform_id:0x2)iucode_rev(fname:intel/06-16-01;platform_id:0x80)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x40)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x40;segment:"Server";codename:"Harpertown_[Penryn]";stepping:"C0";pf_model:0x40)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x4)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x4;segment:"Server";codename:"Wolfdale-DP_[Penryn]";stepping:"M0";pf_model:0x4)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)iucode_rev(fname:intel/06-17-06;platform_id:0x10)iucode_rev(fname:intel/06-17-06;platform_id:0x1)iucode_rev(fname:intel/06-17-06;platform_id:0x40)iucode_rev(fname:intel/06-17-06;platform_id:0x4)iucode_rev(fname:intel/06-17-06;platform_id:0x80)iucode_rev(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10)iucode_rev(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C1";pf_model:0x10)iucode_rev(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"M1";pf_model:0x10)iucode_rev(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C1";pf_model:0x10)iucode_rev(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"M1";pf_model:0x10)iucode_rev(fname:intel/06-17-07;platform_id:0x10)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44;segment:"Server";codename:"Harpertown_[Penryn]";stepping:"E0";pf_model:0x44)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44;segment:"Server";codename:"Wolfdale-DP_[Penryn]";stepping:"E0";pf_model:0x44)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)iucode_rev(fname:intel/06-17-0a;platform_id:0x10)iucode_rev(fname:intel/06-17-0a;platform_id:0x1)iucode_rev(fname:intel/06-17-0a;platform_id:0x20)iucode_rev(fname:intel/06-17-0a;platform_id:0x40)iucode_rev(fname:intel/06-17-0a;platform_id:0x4)iucode_rev(fname:intel/06-17-0a;platform_id:0x80)iucode_rev(fname:intel/06-1a-04;cpuid:000106a4;pf_mask:0x3)iucode_rev(fname:intel/06-1a-04;cpuid:000106a4;pf_mask:0x3;segment:"Dekstop";codename:"Bloomfield_[Nehalem]";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-1a-04;platform_id:0x1)iucode_rev(fname:intel/06-1a-04;platform_id:0x2)iucode_rev(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3)iucode_rev(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Dekstop";codename:"Bloomfield_[Nehalem]";stepping:"D0";pf_model:0x3)iucode_rev(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]_EP";stepping:"D0";pf_model:0x3)iucode_rev(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]";stepping:"D0";pf_model:0x3)iucode_rev(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]_WS";stepping:"D0";pf_model:0x3)iucode_rev(fname:intel/06-1a-05;platform_id:0x1)iucode_rev(fname:intel/06-1a-05;platform_id:0x2)iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x1)iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x1;segment:"Mobile";codename:"Silverthorne_[Bonnell]";stepping:"C0";pf_model:0x1)iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4)iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4;segment:"Desktop";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x4)iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4;segment:"Mobile";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x4)iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x8)iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x8;segment:"Desktop";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x8)iucode_rev(fname:intel/06-1c-02;platform_id:0x1)iucode_rev(fname:intel/06-1c-02;platform_id:0x4)iucode_rev(fname:intel/06-1c-02;platform_id:0x8)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)iucode_rev(fname:intel/06-1c-0a;platform_id:0x10)iucode_rev(fname:intel/06-1c-0a;platform_id:0x1)iucode_rev(fname:intel/06-1c-0a;platform_id:0x4)iucode_rev(fname:intel/06-1c-0a;platform_id:0x8)iucode_rev(fname:intel/06-1d-01;cpuid:000106d1;pf_mask:0x8)iucode_rev(fname:intel/06-1d-01;cpuid:000106d1;pf_mask:0x8;segment:"Server";codename:"Dunnington_[Penryn]";stepping:"A1";pf_model:0x8)iucode_rev(fname:intel/06-1d-01;platform_id:0x8)iucode_rev(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13)iucode_rev(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Dekstop";codename:"Lynnfield_[Nehalem]";stepping:"B1";pf_model:0x13)iucode_rev(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Mobile";codename:"Clarksfield_[Nehalem]";stepping:"B1";pf_model:0x13)iucode_rev(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Server";codename:"Lynnfield_Xeon_[Nehalem]";stepping:"B1";pf_model:0x13)iucode_rev(fname:intel/06-1e-05;platform_id:0x10)iucode_rev(fname:intel/06-1e-05;platform_id:0x1)iucode_rev(fname:intel/06-1e-05;platform_id:0x2)iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12)iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Desktop";codename:"Westmere";stepping:"C2";pf_model:0x12)iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Desktop";codename:"Westmere";stepping:"K0";pf_model:0x12)iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Mobile";codename:"Westmere";stepping:"C2";pf_model:0x12)iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Mobile";codename:"Westmere";stepping:"K0";pf_model:0x12)iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Server";codename:"Westmere";stepping:"C2";pf_model:0x12)iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Server";codename:"Westmere";stepping:"K0";pf_model:0x12)iucode_rev(fname:intel/06-25-02;platform_id:0x10)iucode_rev(fname:intel/06-25-02;platform_id:0x2)iucode_rev(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92)iucode_rev(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92;segment:"Desktop";codename:"Clarkdale_[Westmere]";stepping:"K0";pf_model:0x92)iucode_rev(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92;segment:"Mobile";codename:"Arrandale_[Westmere]";stepping:"K0";pf_model:0x92)iucode_rev(fname:intel/06-25-05;platform_id:0x10)iucode_rev(fname:intel/06-25-05;platform_id:0x2)iucode_rev(fname:intel/06-25-05;platform_id:0x80)iucode_rev(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x1)iucode_rev(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x1;segment:"SOC";codename:"Lincroft_[Bonnell]";stepping:"C0";pf_model:0x1)iucode_rev(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2)iucode_rev(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2;segment:"SOC";codename:"Tunnell_Creek_[Bonnell]";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2;segment:"SOC";codename:"Tunnell_Creek_[Bonnell]";stepping:"B1";pf_model:0x2)iucode_rev(fname:intel/06-26-01;platform_id:0x1)iucode_rev(fname:intel/06-26-01;platform_id:0x2)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"J1";pf_model:0x12)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"J1";pf_model:0x12)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge_Xeon_E3";stepping:"D2";pf_model:0x12)iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge_Xeon_E3";stepping:"Q0";pf_model:0x12)iucode_rev(fname:intel/06-2a-07;platform_id:0x10)iucode_rev(fname:intel/06-2a-07;platform_id:0x2)iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3)iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Desktop";codename:"Gulftown_[Westmere]";stepping:"B1";pf_model:0x3)iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-EP_EP";stepping:"B1";pf_model:0x3)iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-EP";stepping:"B1";pf_model:0x3)iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-WS";stepping:"B1";pf_model:0x3)iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-WS_WS";stepping:"B1";pf_model:0x3)iucode_rev(fname:intel/06-2c-02;platform_id:0x1)iucode_rev(fname:intel/06-2c-02;platform_id:0x2)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C1";pf_model:0x6d)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M0";pf_model:0x6d)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C1";pf_model:0x6d)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M0";pf_model:0x6d)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C1";pf_model:0x6d)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M0";pf_model:0x6d)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C1";pf_model:0x6d)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M0";pf_model:0x6d)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C1";pf_model:0x6d)iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M0";pf_model:0x6d)iucode_rev(fname:intel/06-2d-06;platform_id:0x1)iucode_rev(fname:intel/06-2d-06;platform_id:0x20)iucode_rev(fname:intel/06-2d-06;platform_id:0x40)iucode_rev(fname:intel/06-2d-06;platform_id:0x4)iucode_rev(fname:intel/06-2d-06;platform_id:0x8)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C2";pf_model:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M1";pf_model:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C2";pf_model:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M1";pf_model:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C2";pf_model:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M1";pf_model:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)iucode_rev(fname:intel-06-2d-07/06-2d-07;platform_id:0x1)iucode_rev(fname:intel-06-2d-07/06-2d-07;platform_id:0x20)iucode_rev(fname:intel-06-2d-07/06-2d-07;platform_id:0x40)iucode_rev(fname:intel-06-2d-07/06-2d-07;platform_id:0x4)iucode_rev(fname:intel-06-2d-07/06-2d-07;platform_id:0x8)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C2";pf_model:0x6d)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M1";pf_model:0x6d)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C2";pf_model:0x6d)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M1";pf_model:0x6d)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C2";pf_model:0x6d)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M1";pf_model:0x6d)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)iucode_rev(fname:intel/06-2d-07;platform_id:0x1)iucode_rev(fname:intel/06-2d-07;platform_id:0x20)iucode_rev(fname:intel/06-2d-07;platform_id:0x40)iucode_rev(fname:intel/06-2d-07;platform_id:0x4)iucode_rev(fname:intel/06-2d-07;platform_id:0x8)iucode_rev(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4)iucode_rev(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4;segment:"Server";codename:"Nehalem_EX";stepping:"D0";pf_model:0x4)iucode_rev(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4;segment:"Server";codename:"Nehalem";stepping:"D0";pf_model:0x4)iucode_rev(fname:intel/06-2e-06;platform_id:0x4)iucode_rev(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5)iucode_rev(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5;segment:"Server";codename:"Westmere-EX_EX";stepping:"A2";pf_model:0x5)iucode_rev(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5;segment:"Server";codename:"Westmere-EX";stepping:"A2";pf_model:0x5)iucode_rev(fname:intel/06-2f-02;platform_id:0x1)iucode_rev(fname:intel/06-2f-02;platform_id:0x4)iucode_rev(fname:intel/06-37-08;cpuid:00030678;pf_mask:0x2)iucode_rev(fname:intel/06-37-08;cpuid:00030678;pf_mask:0x2;segment:"SOC";codename:"Valleyview";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/06-37-08;cpuid:00030678;pf_mask:0xc)iucode_rev(fname:intel/06-37-08;cpuid:00030678;pf_mask:0xc;segment:"SOC";codename:"Valleyview";stepping:"C0";pf_model:0xc)iucode_rev(fname:intel/06-37-08;platform_id:0x2)iucode_rev(fname:intel/06-37-08;platform_id:0x4)iucode_rev(fname:intel/06-37-08;platform_id:0x8)iucode_rev(fname:intel/06-37-09;cpuid:00030679;pf_mask:0xf)iucode_rev(fname:intel/06-37-09;cpuid:00030679;pf_mask:0xf;segment:"SOC";codename:"Valleyview";stepping:"D0";pf_model:0xf)iucode_rev(fname:intel/06-37-09;platform_id:0x1)iucode_rev(fname:intel/06-37-09;platform_id:0x2)iucode_rev(fname:intel/06-37-09;platform_id:0x4)iucode_rev(fname:intel/06-37-09;platform_id:0x8)iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12)iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)iucode_rev(fname:intel/06-3a-09;platform_id:0x10)iucode_rev(fname:intel/06-3a-09;platform_id:0x2)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell_S";stepping:"Cx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell_S";stepping:"Dx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Cx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Dx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Cx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Dx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell";stepping:"Cx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell";stepping:"Dx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell_Xeon_E3";stepping:"Cx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell_Xeon_E3";stepping:"Dx";pf_model:0x32)iucode_rev(fname:intel/06-3c-03;platform_id:0x10)iucode_rev(fname:intel/06-3c-03;platform_id:0x20)iucode_rev(fname:intel/06-3c-03;platform_id:0x2)iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0)iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell";stepping:"E0";pf_model:0xc0)iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell";stepping:"F0";pf_model:0xc0)iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_U";stepping:"E0";pf_model:0xc0)iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_U";stepping:"F0";pf_model:0xc0)iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_Y";stepping:"E0";pf_model:0xc0)iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_Y";stepping:"F0";pf_model:0xc0)iucode_rev(fname:intel/06-3d-04;platform_id:0x40)iucode_rev(fname:intel/06-3d-04;platform_id:0x80)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Desktop";codename:"Ivy_Bridge_E";stepping:"S1";pf_model:0xed)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Desktop";codename:"Ivy_Bridge";stepping:"S1";pf_model:0xed)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"C0";pf_model:0xed)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"C1";pf_model:0xed)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"M1";pf_model:0xed)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"S1";pf_model:0xed)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"C0";pf_model:0xed)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"C1";pf_model:0xed)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"M1";pf_model:0xed)iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"S1";pf_model:0xed)iucode_rev(fname:intel/06-3e-04;platform_id:0x1)iucode_rev(fname:intel/06-3e-04;platform_id:0x20)iucode_rev(fname:intel/06-3e-04;platform_id:0x40)iucode_rev(fname:intel/06-3e-04;platform_id:0x4)iucode_rev(fname:intel/06-3e-04;platform_id:0x80)iucode_rev(fname:intel/06-3e-04;platform_id:0x8)iucode_rev(fname:intel/06-3e-06;cpuid:000306e6;pf_mask:0xed)iucode_rev(fname:intel/06-3e-06;platform_id:0x1)iucode_rev(fname:intel/06-3e-06;platform_id:0x20)iucode_rev(fname:intel/06-3e-06;platform_id:0x40)iucode_rev(fname:intel/06-3e-06;platform_id:0x4)iucode_rev(fname:intel/06-3e-06;platform_id:0x80)iucode_rev(fname:intel/06-3e-06;platform_id:0x8)iucode_rev(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed)iucode_rev(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EX";stepping:"D1";pf_model:0xed)iucode_rev(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"D1";pf_model:0xed)iucode_rev(fname:intel/06-3e-07;platform_id:0x1)iucode_rev(fname:intel/06-3e-07;platform_id:0x20)iucode_rev(fname:intel/06-3e-07;platform_id:0x40)iucode_rev(fname:intel/06-3e-07;platform_id:0x4)iucode_rev(fname:intel/06-3e-07;platform_id:0x80)iucode_rev(fname:intel/06-3e-07;platform_id:0x8)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"C0";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"C1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"M1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"R2";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"C0";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"C1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"M1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"R2";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"C0";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"C1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"M1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"R2";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"C0";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"C1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"M1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"R2";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"C0";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"C1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"M1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"R2";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"C0";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"C1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"M1";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"R2";pf_model:0x6f)iucode_rev(fname:intel/06-3f-02;platform_id:0x1)iucode_rev(fname:intel/06-3f-02;platform_id:0x20)iucode_rev(fname:intel/06-3f-02;platform_id:0x2)iucode_rev(fname:intel/06-3f-02;platform_id:0x40)iucode_rev(fname:intel/06-3f-02;platform_id:0x4)iucode_rev(fname:intel/06-3f-02;platform_id:0x8)iucode_rev(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80)iucode_rev(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80;segment:"Server";codename:"Haswell_EX";stepping:"E0";pf_model:0x80)iucode_rev(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80;segment:"Server";codename:"Haswell";stepping:"E0";pf_model:0x80)iucode_rev(fname:intel/06-3f-04;platform_id:0x80)iucode_rev(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72)iucode_rev(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x72)iucode_rev(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x72)iucode_rev(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell_U";stepping:"Cx";pf_model:0x72)iucode_rev(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell_U";stepping:"Dx";pf_model:0x72)iucode_rev(fname:intel/06-45-01;platform_id:0x10)iucode_rev(fname:intel/06-45-01;platform_id:0x20)iucode_rev(fname:intel/06-45-01;platform_id:0x2)iucode_rev(fname:intel/06-45-01;platform_id:0x40)iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32)iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell_R";stepping:"Cx";pf_model:0x32)iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell_R";stepping:"Dx";pf_model:0x32)iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Cx";pf_model:0x32)iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Dx";pf_model:0x32)iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Cx";pf_model:0x32)iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Dx";pf_model:0x32)iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x32)iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x32)iucode_rev(fname:intel/06-46-01;platform_id:0x10)iucode_rev(fname:intel/06-46-01;platform_id:0x20)iucode_rev(fname:intel/06-46-01;platform_id:0x2)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell_S";stepping:"E0";pf_model:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell_S";stepping:"G0";pf_model:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell";stepping:"E0";pf_model:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell";stepping:"G0";pf_model:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell_H";stepping:"E0";pf_model:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell_H";stepping:"G0";pf_model:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell";stepping:"E0";pf_model:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell";stepping:"G0";pf_model:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell";stepping:"E0";pf_model:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell";stepping:"G0";pf_model:0x22)iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";cod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orm_id:0x80)iucode_rev(fname:intel/06-55-0b;platform_id:0x8)iucode_rev(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10)iucode_rev(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V1";pf_model:0x10)iucode_rev(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V1";pf_model:0x10)iucode_rev(fname:intel/06-56-02;platform_id:0x10)iucode_rev(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10)iucode_rev(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V2";pf_model:0x10)iucode_rev(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V3";pf_model:0x10)iucode_rev(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V2";pf_model:0x10)iucode_rev(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V3";pf_model:0x10)iucode_rev(fname:intel/06-56-03;platform_id:0x10)iucode_rev(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10)iucode_rev(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"Y0";pf_model:0x10)iucode_rev(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"Y0";pf_model:0x10)iucode_rev(fname:intel/06-56-04;platform_id:0x10)iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10)iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell_NS";stepping:"A0";pf_model:0x10)iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell_NS";stepping:"A1";pf_model:0x10)iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"A0";pf_model:0x10)iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"A1";pf_model:0x10)iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Hewitt_Lake_[Broadwell]";stepping:"A1";pf_model:0x10)iucode_rev(fname:intel/06-56-05;platform_id:0x10)iucode_rev(fname:intel/06-5c-02;cpuid:000506c2;pf_mask:0x1)iucode_rev(fname:intel/06-5c-02;cpuid:000506c2;pf_mask:0x1;segment:"SOC";codename:"Broxton";stepping:"C0";pf_model:0x1)iucode_rev(fname:intel/06-5c-02;platform_id:0x1)iucode_rev(fname:intel/06-5c-09;cpuid:000506c9;pf_mask:0x3)iucode_rev(fname:intel/06-5c-09;cpuid:000506c9;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"D0";pf_model:0x3)iucode_rev(fname:intel/06-5c-09;platform_id:0x1)iucode_rev(fname:intel/06-5c-09;platform_id:0x2)iucode_rev(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3)iucode_rev(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"B1";pf_model:0x3)iucode_rev(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"F1";pf_model:0x3)iucode_rev(fname:intel/06-5c-0a;platform_id:0x1)iucode_rev(fname:intel/06-5c-0a;platform_id:0x2)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel-06-5e-03/06-5e-03;platform_id:0x10)iucode_rev(fname:intel-06-5e-03/06-5e-03;platform_id:0x20)iucode_rev(fname:intel-06-5e-03/06-5e-03;platform_id:0x2)iucode_rev(fname:intel-06-5e-03/06-5e-03;platform_id:0x4)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"N0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"R0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"S0";pf_model:0x36)iucode_rev(fname:intel/06-5e-03;platform_id:0x10)iucode_rev(fname:intel/06-5e-03;platform_id:0x20)iucode_rev(fname:intel/06-5e-03;platform_id:0x2)iucode_rev(fname:intel/06-5e-03;platform_id:0x4)iucode_rev(fname:intel/06-5f-01;cpuid:000506f1;pf_mask:0x1)iucode_rev(fname:intel/06-5f-01;cpuid:000506f1;pf_mask:0x1;segment:"SOC";codename:"Denverton";stepping:"B0";pf_model:0x1)iucode_rev(fname:intel/06-5f-01;platform_id:0x1)iucode_rev(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80)iucode_rev(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80;segment:"Mobile";codename:"Cannon_Lake";stepping:"D0";pf_model:0x80)iucode_rev(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80;segment:"Mobile";codename:"Cannon_Lake_U";stepping:"D0";pf_model:0x80)iucode_rev(fname:intel/06-66-03;platform_id:0x80)iucode_rev(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87)iucode_rev(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87;segment:"Server";codename:"Ice_Lake_SP";stepping:"C0";pf_model:0x87)iucode_rev(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87;segment:"Server";codename:"Ice_Lake";stepping:"C0";pf_model:0x87)iucode_rev(fname:intel/06-6a-05;platform_id:0x1)iucode_rev(fname:intel/06-6a-05;platform_id:0x2)iucode_rev(fname:intel/06-6a-05;platform_id:0x4)iucode_rev(fname:intel/06-6a-05;platform_id:0x80)iucode_rev(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87)iucode_rev(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87;segment:"Server";codename:"Ice_Lake_SP";stepping:"D0";pf_model:0x87)iucode_rev(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87;segment:"Server";codename:"Ice_Lake";stepping:"D0";pf_model:0x87)iucode_rev(fname:intel/06-6a-06;platform_id:0x1)iucode_rev(fname:intel/06-6a-06;platform_id:0x2)iucode_rev(fname:intel/06-6a-06;platform_id:0x4)iucode_rev(fname:intel/06-6a-06;platform_id:0x80)iucode_rev(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10)iucode_rev(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10;segment:"Server";codename:"Ice_Lake_D";stepping:"B0";pf_model:0x10)iucode_rev(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10;segment:"Server";codename:"Ice_Lake";stepping:"B0";pf_model:0x10)iucode_rev(fname:intel/06-6c-01;platform_id:0x10)iucode_rev(fname:intel/06-7a-01;cpuid:000706a1;pf_mask:0x1)iucode_rev(fname:intel/06-7a-01;cpuid:000706a1;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake";stepping:"B0";pf_model:0x1)iucode_rev(fname:intel/06-7a-01;platform_id:0x1)iucode_rev(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1)iucode_rev(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake_R";stepping:"R0";pf_model:0x1)iucode_rev(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake";stepping:"R0";pf_model:0x1)iucode_rev(fname:intel/06-7a-08;platform_id:0x1)iucode_rev(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80)iucode_rev(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake";stepping:"D1";pf_model:0x80)iucode_rev(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake_U";stepping:"D1";pf_model:0x80)iucode_rev(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake_Y";stepping:"D1";pf_model:0x80)iucode_rev(fname:intel/06-7e-05;platform_id:0x80)iucode_rev(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10)iucode_rev(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10;segment:"SOC";codename:"Lakefield";stepping:"B2";pf_model:0x10)iucode_rev(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10;segment:"SOC";codename:"Lakefield";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-8a-01;platform_id:0x10)iucode_rev(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80)iucode_rev(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake";stepping:"B1";pf_model:0x80)iucode_rev(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake_UP3";stepping:"B1";pf_model:0x80)iucode_rev(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake_UP4";stepping:"B1";pf_model:0x80)iucode_rev(fname:intel-06-8c-01/06-8c-01;platform_id:0x80)iucode_rev(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2)iucode_rev(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_Refresh_R";stepping:"C0";pf_model:0x80)iucode_rev(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_Refresh";stepping:"C0";pf_model:0x80)iucode_rev(fname:intel/06-8c-02;platform_id:0x2)iucode_rev(fname:intel/06-8c-02;platform_id:0x40)iucode_rev(fname:intel/06-8c-02;platform_id:0x80)iucode_rev(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2)iucode_rev(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_H";stepping:"R0";pf_model:0xc2)iucode_rev(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake";stepping:"R0";pf_model:0xc2)iucode_rev(fname:intel/06-8d-01;platform_id:0x2)iucode_rev(fname:intel/06-8d-01;platform_id:0x40)iucode_rev(fname:intel/06-8d-01;platform_id:0x80)iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10)iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10;segment:"Mobile";codename:"Amber_Lake";stepping:"H0";pf_model:0x10)iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10;segment:"Mobile";codename:"Amber_Lake_Y_2+2";stepping:"H0";pf_model:0x10)iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0)iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"H0";pf_model:0xc0)iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"J1";pf_model:0xc0)iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_U_2+3e";stepping:"J1";pf_model:0xc0)iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_U";stepping:"H0";pf_model:0xc0)iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_Y";stepping:"H0";pf_model:0xc0)iucode_rev(fname:intel/06-8e-09;platform_id:0x10)iucode_rev(fname:intel/06-8e-09;platform_id:0x40)iucode_rev(fname:intel/06-8e-09;platform_id:0x80)iucode_rev(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0)iucode_rev(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Coffee_Lake";stepping:"D0";pf_model:0xc0)iucode_rev(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Coffee_Lake_U_4+3e";stepping:"D0";pf_model:0xc0)iucode_rev(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_R";stepping:"Y0";pf_model:0xc0)iucode_rev(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"Y0";pf_model:0xc0)iucode_rev(fname:intel/06-8e-0a;platform_id:0x40)iucode_rev(fname:intel/06-8e-0a;platform_id:0x80)iucode_rev(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0)iucode_rev(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0;segment:"Mobile";codename:"Whiskey_Lake";stepping:"W0";pf_model:0xd0)iucode_rev(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0;segment:"Mobile";codename:"Whiskey_Lake_U";stepping:"W0";pf_model:0xd0)iucode_rev(fname:intel/06-8e-0b;platform_id:0x10)iucode_rev(fname:intel/06-8e-0b;platform_id:0x40)iucode_rev(fname:intel/06-8e-0b;platform_id:0x80)iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94)iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Amber_Lake";stepping:"V0";pf_model:0x94)iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Amber_Lake_Y_4+2";stepping:"V0";pf_model:0x94)iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Comet_Lake";stepping:"V0";pf_model:0x94)iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Comet_Lake_U_4+2";stepping:"V0";pf_model:0x94)iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Whiskey_Lake";stepping:"V0";pf_model:0x94)iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Whiskey_Lake_U";stepping:"V0";pf_model:0x94)iucode_rev(fname:intel/06-8e-0c;platform_id:0x10)iucode_rev(fname:intel/06-8e-0c;platform_id:0x4)iucode_rev(fname:intel/06-8e-0c;platform_id:0x80)iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x10)iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10)iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x10)iucode_rev(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10)iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)iucode_rev(fname:intel/06-8f-04;platform_id:0x10)iucode_rev(fname:intel/06-8f-04;platform_id:0x1)iucode_rev(fname:intel/06-8f-04;platform_id:0x2)iucode_rev(fname:intel/06-8f-04;platform_id:0x4)iucode_rev(fname:intel/06-8f-04;platform_id:0x80)iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x10)iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10)iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x10)iucode_rev(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10)iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)iucode_rev(fname:intel/06-8f-05;platform_id:0x10)iucode_rev(fname:intel/06-8f-05;platform_id:0x1)iucode_rev(fname:intel/06-8f-05;platform_id:0x2)iucode_rev(fname:intel/06-8f-05;platform_id:0x4)iucode_rev(fname:intel/06-8f-05;platform_id:0x80)iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x10)iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10)iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x10)iucode_rev(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10)iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)iucode_rev(fname:intel/06-8f-06;platform_id:0x10)iucode_rev(fname:intel/06-8f-06;platform_id:0x1)iucode_rev(fname:intel/06-8f-06;platform_id:0x2)iucode_rev(fname:intel/06-8f-06;platform_id:0x4)iucode_rev(fname:intel/06-8f-06;platform_id:0x80)iucode_rev(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)iucode_rev(fname:intel/06-8f-07;platform_id:0x1)iucode_rev(fname:intel/06-8f-07;platform_id:0x2)iucode_rev(fname:intel/06-8f-07;platform_id:0x4)iucode_rev(fname:intel/06-8f-07;platform_id:0x80)iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x10)iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10)iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x10)iucode_rev(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10)iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)iucode_rev(fname:intel/06-8f-08;platform_id:0x10)iucode_rev(fname:intel/06-8f-08;platform_id:0x1)iucode_rev(fname:intel/06-8f-08;platform_id:0x2)iucode_rev(fname:intel/06-8f-08;platform_id:0x4)iucode_rev(fname:intel/06-8f-08;platform_id:0x80)iucode_rev(fname:intel/06-96-01;cpuid:00090661;pf_mask:0x1)iucode_rev(fname:intel/06-96-01;cpuid:00090661;pf_mask:0x1;segment:"SOC";codename:"Elkhart_Rate";stepping:"B1";pf_model:0x1)iucode_rev(fname:intel/06-96-01;platform_id:0x1)iucode_rev(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7)iucode_rev(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7)iucode_rev(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)iucode_rev(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)iucode_rev(fname:intel/06-97-02;cpuid:000b06f2;pf_mask:0x7)iucode_rev(fname:intel/06-97-02;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-97-02;cpuid:000b06f5;pf_mask:0x7)iucode_rev(fname:intel/06-97-02;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-97-02;platform_id:0x1)iucode_rev(fname:intel/06-97-02;platform_id:0x2)iucode_rev(fname:intel/06-97-02;platform_id:0x4)iucode_rev(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7)iucode_rev(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7)iucode_rev(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)iucode_rev(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)iucode_rev(fname:intel/06-97-05;cpuid:000b06f2;pf_mask:0x7)iucode_rev(fname:intel/06-97-05;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-97-05;cpuid:000b06f5;pf_mask:0x7)iucode_rev(fname:intel/06-97-05;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-97-05;platform_id:0x1)iucode_rev(fname:intel/06-97-05;platform_id:0x2)iucode_rev(fname:intel/06-97-05;platform_id:0x4)iucode_rev(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80)iucode_rev(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_6+8";stepping:"L0";pf_model:0x82)iucode_rev(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"L0";pf_model:0x82)iucode_rev(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x80)iucode_rev(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_U_9W";stepping:"R0";pf_model:0x80)iucode_rev(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80)iucode_rev(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_2+8";stepping:"R0";pf_model:0x82)iucode_rev(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x82)iucode_rev(fname:intel/06-9a-03;platform_id:0x80)iucode_rev(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80)iucode_rev(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_6+8";stepping:"L0";pf_model:0x82)iucode_rev(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"L0";pf_model:0x82)iucode_rev(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x80)iucode_rev(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_U_9W";stepping:"R0";pf_model:0x80)iucode_rev(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x40)iucode_rev(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x40;segment:"Mobile";codename:"Arizona_Beach";stepping:"A0";pf_model:0x40)iucode_rev(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80)iucode_rev(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_2+8";stepping:"R0";pf_model:0x82)iucode_rev(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x82)iucode_rev(fname:intel/06-9a-04;platform_id:0x40)iucode_rev(fname:intel/06-9a-04;platform_id:0x80)iucode_rev(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1)iucode_rev(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1;segment:"SOC";codename:"Jasper_Lake";stepping:"A0";pf_model:0x1)iucode_rev(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1;segment:"SOC";codename:"Jasper_Lake";stepping:"A1";pf_model:0x1)iucode_rev(fname:intel/06-9c-00;platform_id:0x1)iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a)iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake_S";stepping:"B0";pf_model:0x2a)iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake_X";stepping:"B0";pf_model:0x2a)iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake_G";stepping:"B0";pf_model:0x2a)iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake_H";stepping:"B0";pf_model:0x2a)iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Server";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Server";codename:"Kaby_Lake_Xeon_E3";stepping:"B0";pf_model:0x2a)iucode_rev(fname:intel/06-9e-09;platform_id:0x20)iucode_rev(fname:intel/06-9e-09;platform_id:0x2)iucode_rev(fname:intel/06-9e-09;platform_id:0x8)iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22)iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"U0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"U0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"U0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0a;platform_id:0x20)iucode_rev(fname:intel/06-9e-0a;platform_id:0x2)iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2)iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Desktop";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Mobile";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Server";codename:"Coffee_Lake_E";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Server";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/06-9e-0b;platform_id:0x2)iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22)iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"P0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"P0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"P0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0c;platform_id:0x20)iucode_rev(fname:intel/06-9e-0c;platform_id:0x2)iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22)iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"R0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"R0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"R0";pf_model:0x22)iucode_rev(fname:intel/06-9e-0d;platform_id:0x20)iucode_rev(fname:intel/06-9e-0d;platform_id:0x2)iucode_rev(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20)iucode_rev(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20;segment:"Mobile";codename:"Comet_Lake_H";stepping:"R1";pf_model:0x20)iucode_rev(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20;segment:"Mobile";codename:"Comet_Lake";stepping:"R1";pf_model:0x20)iucode_rev(fname:intel/06-a5-02;platform_id:0x20)iucode_rev(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22)iucode_rev(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake_S_6+2";stepping:"G1";pf_model:0x22)iucode_rev(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake";stepping:"G1";pf_model:0x22)iucode_rev(fname:intel/06-a5-03;platform_id:0x20)iucode_rev(fname:intel/06-a5-03;platform_id:0x2)iucode_rev(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22)iucode_rev(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake_S_10+2";stepping:"Q0";pf_model:0x22)iucode_rev(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake";stepping:"Q0";pf_model:0x22)iucode_rev(fname:intel/06-a5-05;platform_id:0x20)iucode_rev(fname:intel/06-a5-05;platform_id:0x2)iucode_rev(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80)iucode_rev(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake";stepping:"A0";pf_model:0x80)iucode_rev(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake_U_6+2";stepping:"A0";pf_model:0x80)iucode_rev(fname:intel/06-a6-00;platform_id:0x80)iucode_rev(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80)iucode_rev(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake";stepping:"K1";pf_model:0x80)iucode_rev(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake_U_6+2_v2";stepping:"K1";pf_model:0x80)iucode_rev(fname:intel/06-a6-01;platform_id:0x80)iucode_rev(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2)iucode_rev(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2;segment:"Desktop";codename:"Rocket_Lake_S";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2;segment:"Desktop";codename:"Rocket_Lake";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/06-a7-01;platform_id:0x2)iucode_rev(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32)iucode_rev(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32;segment:"Desktop";codename:"Raptor_Lake_S";stepping:"B0";pf_model:0x32)iucode_rev(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32;segment:"Desktop";codename:"Raptor_Lake";stepping:"B0";pf_model:0x32)iucode_rev(fname:intel/06-b7-01;platform_id:0x10)iucode_rev(fname:intel/06-b7-01;platform_id:0x20)iucode_rev(fname:intel/06-b7-01;platform_id:0x2)iucode_rev(fname:intel/06-ba-02;cpuid:000b06a2;pf_mask:0xe0)iucode_rev(fname:intel/06-ba-02;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_H_6+8";stepping:"J0";pf_model:0xe0)iucode_rev(fname:intel/06-ba-02;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_P_6+8";stepping:"J0";pf_model:0xe0)iucode_rev(fname:intel/06-ba-02;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake";stepping:"J0";pf_model:0xe0)iucode_rev(fname:intel/06-ba-02;cpuid:000b06a3;pf_mask:0xe0)iucode_rev(fname:intel/06-ba-02;cpuid:000b06a3;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake";stepping:"Q0";pf_model:0xe0)iucode_rev(fname:intel/06-ba-02;cpuid:000b06a3;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_U_2+8";stepping:"Q0";pf_model:0xe0)iucode_rev(fname:intel/06-ba-02;platform_id:0x20)iucode_rev(fname:intel/06-ba-02;platform_id:0x40)iucode_rev(fname:intel/06-ba-02;platform_id:0x80)iucode_rev(fname:intel/06-ba-03;cpuid:000b06a2;pf_mask:0xe0)iucode_rev(fname:intel/06-ba-03;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_H_6+8";stepping:"J0";pf_model:0xe0)iucode_rev(fname:intel/06-ba-03;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_P_6+8";stepping:"J0";pf_model:0xe0)iucode_rev(fname:intel/06-ba-03;cpuid:000b06a2;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake";stepping:"J0";pf_model:0xe0)iucode_rev(fname:intel/06-ba-03;cpuid:000b06a3;pf_mask:0xe0)iucode_rev(fname:intel/06-ba-03;cpuid:000b06a3;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake";stepping:"Q0";pf_model:0xe0)iucode_rev(fname:intel/06-ba-03;cpuid:000b06a3;pf_mask:0xe0;segment:"Mobile";codename:"Raptor_Lake_U_2+8";stepping:"Q0";pf_model:0xe0)iucode_rev(fname:intel/06-ba-03;platform_id:0x20)iucode_rev(fname:intel/06-ba-03;platform_id:0x40)iucode_rev(fname:intel/06-ba-03;platform_id:0x80)iucode_rev(fname:intel/06-be-00;cpuid:000b06e0;pf_mask:0x11)iucode_rev(fname:intel/06-be-00;cpuid:000b06e0;pf_mask:0x11;segment:"SOC";codename:"Alder_Lake_N";stepping:"A0";pf_model:0x1)iucode_rev(fname:intel/06-be-00;cpuid:000b06e0;pf_mask:0x11;segment:"SOC";codename:"Alder_Lake";stepping:"A0";pf_model:0x1)iucode_rev(fname:intel/06-be-00;platform_id:0x10)iucode_rev(fname:intel/06-be-00;platform_id:0x1)iucode_rev(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7)iucode_rev(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7)iucode_rev(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)iucode_rev(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)iucode_rev(fname:intel/06-bf-02;cpuid:000b06f2;pf_mask:0x7)iucode_rev(fname:intel/06-bf-02;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-bf-02;cpuid:000b06f5;pf_mask:0x7)iucode_rev(fname:intel/06-bf-02;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-bf-02;platform_id:0x1)iucode_rev(fname:intel/06-bf-02;platform_id:0x2)iucode_rev(fname:intel/06-bf-02;platform_id:0x4)iucode_rev(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7)iucode_rev(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7)iucode_rev(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)iucode_rev(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)iucode_rev(fname:intel/06-bf-05;cpuid:000b06f2;pf_mask:0x7)iucode_rev(fname:intel/06-bf-05;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-bf-05;cpuid:000b06f5;pf_mask:0x7)iucode_rev(fname:intel/06-bf-05;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)iucode_rev(fname:intel/06-bf-05;platform_id:0x1)iucode_rev(fname:intel/06-bf-05;platform_id:0x2)iucode_rev(fname:intel/06-bf-05;platform_id:0x4)iucode_rev(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x1)iucode_rev(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x1;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"B2";pf_model:0x1)iucode_rev(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x2)iucode_rev(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x2;segment:"Server";codename:"Foster_DP_[NetBurst]";stepping:"B2";pf_model:0x2)iucode_rev(fname:intel/0f-00-07;platform_id:0x1)iucode_rev(fname:intel/0f-00-07;platform_id:0x2)iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x1)iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x1;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"C1";pf_model:0x1)iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x2)iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x2;segment:"Server";codename:"Foster_DP_[NetBurst]";stepping:"C1";pf_model:0x2)iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x4)iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x4;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"C1";pf_model:0x4)iucode_rev(fname:intel/0f-00-0a;platform_id:0x1)iucode_rev(fname:intel/0f-00-0a;platform_id:0x2)iucode_rev(fname:intel/0f-00-0a;platform_id:0x4)iucode_rev(fname:intel/0f-01-02;cpuid:00000f12;pf_mask:0x4)iucode_rev(fname:intel/0f-01-02;cpuid:00000f12;pf_mask:0x4;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"D0";pf_model:0x4)iucode_rev(fname:intel/0f-01-02;platform_id:0x4)iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x10)iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x10;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"B0";pf_model:0x10)iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x2)iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"B0";pf_model:0x2)iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x4)iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B0";pf_model:0x4)iucode_rev(fname:intel/0f-02-04;platform_id:0x10)iucode_rev(fname:intel/0f-02-04;platform_id:0x2)iucode_rev(fname:intel/0f-02-04;platform_id:0x4)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B1";pf_model:0x14)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"M0";pf_model:0x14)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"B1";pf_model:0x1)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"M0";pf_model:0x1)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x2)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x2;segment:"Server";codename:"Gallatin_[NetBurst]";stepping:"B1";pf_model:0x2)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B1";pf_model:0x14)iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"M0";pf_model:0x14)iucode_rev(fname:intel/0f-02-05;platform_id:0x10)iucode_rev(fname:intel/0f-02-05;platform_id:0x1)iucode_rev(fname:intel/0f-02-05;platform_id:0x2)iucode_rev(fname:intel/0f-02-05;platform_id:0x4)iucode_rev(fname:intel/0f-02-06;cpuid:00000f26;pf_mask:0x2)iucode_rev(fname:intel/0f-02-06;cpuid:00000f26;pf_mask:0x2;segment:"Server";codename:"Gallatin_[NetBurst]";stepping:"B1";pf_model:0x2)iucode_rev(fname:intel/0f-02-06;platform_id:0x2)iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x2)iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"C1";pf_model:0x2)iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x4)iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"C1";pf_model:0x4)iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x8)iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x8;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"C1";pf_model:0x8)iucode_rev(fname:intel/0f-02-07;platform_id:0x2)iucode_rev(fname:intel/0f-02-07;platform_id:0x4)iucode_rev(fname:intel/0f-02-07;platform_id:0x8)iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x2)iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"D1";pf_model:0x2)iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x4)iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"D1";pf_model:0x4)iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x8)iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x8;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"D1";pf_model:0x8)iucode_rev(fname:intel/0f-02-09;platform_id:0x2)iucode_rev(fname:intel/0f-02-09;platform_id:0x4)iucode_rev(fname:intel/0f-02-09;platform_id:0x8)iucode_rev(fname:intel/0f-03-02;cpuid:00000f32;pf_mask:0xd)iucode_rev(fname:intel/0f-03-02;cpuid:00000f32;pf_mask:0xd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"B1";pf_model:0xd)iucode_rev(fname:intel/0f-03-02;platform_id:0x1)iucode_rev(fname:intel/0f-03-02;platform_id:0x4)iucode_rev(fname:intel/0f-03-02;platform_id:0x8)iucode_rev(fname:intel/0f-03-03;cpuid:00000f33;pf_mask:0xd)iucode_rev(fname:intel/0f-03-03;cpuid:00000f33;pf_mask:0xd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"C0";pf_model:0xd)iucode_rev(fname:intel/0f-03-03;platform_id:0x1)iucode_rev(fname:intel/0f-03-03;platform_id:0x4)iucode_rev(fname:intel/0f-03-03;platform_id:0x8)iucode_rev(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d)iucode_rev(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"D0";pf_model:0x1d)iucode_rev(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"D0";pf_model:0x1d)iucode_rev(fname:intel/0f-03-04;platform_id:0x10)iucode_rev(fname:intel/0f-03-04;platform_id:0x1)iucode_rev(fname:intel/0f-03-04;platform_id:0x4)iucode_rev(fname:intel/0f-03-04;platform_id:0x8)iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0x2)iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0x2;segment:"Server";codename:"Protomac_[NetBurst]";stepping:"C0";pf_model:0x2)iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd)iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"E0";pf_model:0xbd)iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Server";codename:"Cranford_[NetBurst]";stepping:"A0";pf_model:0xbd)iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"E0";pf_model:0xbd)iucode_rev(fname:intel/0f-04-01;platform_id:0x10)iucode_rev(fname:intel/0f-04-01;platform_id:0x1)iucode_rev(fname:intel/0f-04-01;platform_id:0x20)iucode_rev(fname:intel/0f-04-01;platform_id:0x2)iucode_rev(fname:intel/0f-04-01;platform_id:0x4)iucode_rev(fname:intel/0f-04-01;platform_id:0x80)iucode_rev(fname:intel/0f-04-01;platform_id:0x8)iucode_rev(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d)iucode_rev(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"N0";pf_model:0x9d)iucode_rev(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"N0";pf_model:0x9d)iucode_rev(fname:intel/0f-04-03;platform_id:0x10)iucode_rev(fname:intel/0f-04-03;platform_id:0x1)iucode_rev(fname:intel/0f-04-03;platform_id:0x4)iucode_rev(fname:intel/0f-04-03;platform_id:0x80)iucode_rev(fname:intel/0f-04-03;platform_id:0x8)iucode_rev(fname:intel/0f-04-04;cpuid:00000f44;pf_mask:0x9d)iucode_rev(fname:intel/0f-04-04;cpuid:00000f44;pf_mask:0x9d;segment:"Desktop";codename:"Smithfield_[NetBurst]";stepping:"A0";pf_model:0x9d)iucode_rev(fname:intel/0f-04-04;platform_id:0x10)iucode_rev(fname:intel/0f-04-04;platform_id:0x1)iucode_rev(fname:intel/0f-04-04;platform_id:0x4)iucode_rev(fname:intel/0f-04-04;platform_id:0x80)iucode_rev(fname:intel/0f-04-04;platform_id:0x8)iucode_rev(fname:intel/0f-04-07;cpuid:00000f47;pf_mask:0x9d)iucode_rev(fname:intel/0f-04-07;cpuid:00000f47;pf_mask:0x9d;segment:"Desktop";codename:"Smithfield_[NetBurst]";stepping:"B0";pf_model:0x9d)iucode_rev(fname:intel/0f-04-07;platform_id:0x10)iucode_rev(fname:intel/0f-04-07;platform_id:0x1)iucode_rev(fname:intel/0f-04-07;platform_id:0x4)iucode_rev(fname:intel/0f-04-07;platform_id:0x80)iucode_rev(fname:intel/0f-04-07;platform_id:0x8)iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x1)iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x1;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x1)iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x2)iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x2;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x2)iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f)iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x1)iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x2)iucode_rev(fname:intel/0f-04-08;platform_id:0x10)iucode_rev(fname:intel/0f-04-08;platform_id:0x1)iucode_rev(fname:intel/0f-04-08;platform_id:0x1)iucode_rev(fname:intel/0f-04-08;platform_id:0x2)iucode_rev(fname:intel/0f-04-08;platform_id:0x2)iucode_rev(fname:intel/0f-04-08;platform_id:0x40)iucode_rev(fname:intel/0f-04-08;platform_id:0x4)iucode_rev(fname:intel/0f-04-08;platform_id:0x8)iucode_rev(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd)iucode_rev(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"G1";pf_model:0xbd)iucode_rev(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Server";codename:"Cranford_[NetBurst]";stepping:"B0";pf_model:0xbd)iucode_rev(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"G1";pf_model:0xbd)iucode_rev(fname:intel/0f-04-09;platform_id:0x10)iucode_rev(fname:intel/0f-04-09;platform_id:0x1)iucode_rev(fname:intel/0f-04-09;platform_id:0x20)iucode_rev(fname:intel/0f-04-09;platform_id:0x4)iucode_rev(fname:intel/0f-04-09;platform_id:0x80)iucode_rev(fname:intel/0f-04-09;platform_id:0x8)iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c)iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"R0";pf_model:0x5c)iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"R0";pf_model:0x5d)iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d)iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"R0";pf_model:0x5c)iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"R0";pf_model:0x5d)iucode_rev(fname:intel/0f-04-0a;platform_id:0x10)iucode_rev(fname:intel/0f-04-0a;platform_id:0x10)iucode_rev(fname:intel/0f-04-0a;platform_id:0x1)iucode_rev(fname:intel/0f-04-0a;platform_id:0x40)iucode_rev(fname:intel/0f-04-0a;platform_id:0x40)iucode_rev(fname:intel/0f-04-0a;platform_id:0x4)iucode_rev(fname:intel/0f-04-0a;platform_id:0x4)iucode_rev(fname:intel/0f-04-0a;platform_id:0x8)iucode_rev(fname:intel/0f-04-0a;platform_id:0x8)iucode_rev(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4)iucode_rev(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4;segment:"Desktop";codename:"Cedar_Mill_[NetBurst]";stepping:"B1";pf_model:0x4)iucode_rev(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4;segment:"Desktop";codename:"Presler_[NetBurst]";stepping:"B1";pf_model:0x4)iucode_rev(fname:intel/0f-06-02;platform_id:0x4)iucode_rev(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x1)iucode_rev(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x1;segment:"Server";codename:"Dempsey_[NetBurst]";stepping:"C1";pf_model:0x1)iucode_rev(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34)iucode_rev(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34;segment:"Desktop";codename:"Cedar_Mill_[NetBurst]";stepping:"C1";pf_model:0x34)iucode_rev(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34;segment:"Desktop";codename:"Presler_[NetBurst]";stepping:"C1";pf_model:0x34)iucode_rev(fname:intel/0f-06-04;platform_id:0x10)iucode_rev(fname:intel/0f-06-04;platform_id:0x1)iucode_rev(fname:intel/0f-06-04;platform_id:0x20)iucode_rev(fname:intel/0f-06-04;platform_id:0x4)iucode_rev(fname:intel/0f-06-05;cpuid:00000f65;pf_mask:0x1)iucode_rev(fname:intel/0f-06-05;cpuid:00000f65;pf_mask:0x1;segment:"Server";codename:"Dempsey_[NetBurst]";stepping:"D0";pf_model:0x1)iucode_rev(fname:intel/0f-06-05;platform_id:0x1)iucode_rev(fname:intel/0f-06-08;cpuid:00000f68;pf_mask:0x22)iucode_rev(fname:intel/0f-06-08;cpuid:00000f68;pf_mask:0x22;segment:"Server";codename:"Tulsa_[NetBurst]";stepping:"B0";pf_model:0x22)iucode_rev(fname:intel/0f-06-08;platform_id:0x20)iucode_rev(fname:intel/0f-06-08;platform_id:0x2)     @@@@@@ coreutilssystemdcoreutilssystemdcoreutilssystemdcoreutilsdracutcoreutils/bin/sh/bin/sh/bin/sh/bin/sh/bin/shrpmlib(FileDigests)rpmlib(PayloadFilesHavePrefix)rpmlib(CompressedFileNames)/bin/bashlibc.so.6()(64bit)libc.so.6(GLIBC_2.2.5)(64bit)libc.so.6(GLIBC_2.3.4)(64bit)libc.so.6(GLIBC_2.4)(64bit)libc.so.6(GLIBC_2.8)(64bit)rpmlib(PayloadIsXz)4.6.0-14.0-13.0.4-15.2-14.11.3/usr/libexec/microcode_ctl/update_ucode/usr/libexec/microcode_ctl/update_ucodekernelkernel-debugkernel-rtkernel-rt-debugkernelkernel-debugkernel-rtkernel-rt-debugeB=d@ddc@bL@bzSb@b `@`@``-@`-@`%@__@_u@_u@_@_@^b^b^b^@^@^א^Ǿ^2^@^l@]7@]7@]*]]Γ@]ʞ]@]@]@]m] #\@\\@\r@[[@[@[@[9@[z@[ug@[l,[h8@[[ @[Y[Xf@[Q[Q[!@[d@ZZ?ZX@ZX@ZTZTZ3@ZfYYh@Y%uXXXXs{@XS@X>@W@Ws@Wm W=Uy@T7@T*@SSSS L@Sz@SK@RURkR-@R-@R q@Q@Q\QP~Pj@PPP H@OЗO1@ONN>@NN:N e@MM2@MtMQ0@M6@M$]@LΫL*@L@L)@LwK@K[Ks@KKVJH@J;JjJCfJ&eJ @I2HYG#G/@G]@G@GGFE..@D{D@C.C @C@CqCx|@C&@C&B$Y@B@A4AA@A@AAn@AEugene Syromiatnikov - 2:2.1-73.20Eugene Syromiatnikov - 2:2.1-73.19Eugene Syromiatnikov - 2:2.1-73.18Eugene Syromiatnikov - 2:2.1-73.17Eugene Syromiatnikov - 2:2.1-73.16Eugene Syromiatnikov - 2:2.1-73.15Eugene Syromiatnikov - 2:2.1-73.14Eugene Syromiatnikov - 2:2.1-73.13Eugene Syromiatnikov - 2:2.1-73.12Eugene Syromiatnikov - 2:2.1-73.11Eugene Syromiatnikov - 2:2.1-73.10Eugene Syromiatnikov - 2:2.1-73.9Eugene Syromiatnikov - 2:2.1-73.8Eugene Syromiatnikov - 2:2.1-73.7Eugene Syromiatnikov - 2:2.1-73.6Eugene Syromiatnikov - 2:2.1-73.5Eugene Syromiatnikov - 2:2.1-73.4Eugene Syromiatnikov - 2:2.1-73.3Eugene Syromiatnikov - 2:2.1-73.2Eugene Syromiatnikov - 2:2.1-73.1Eugene Syromiatnikov - 2:2.1-73Eugene Syromiatnikov - 2:2.1-72Eugene Syromiatnikov - 2:2.1-71Eugene Syromiatnikov - 2:2.1-70Eugene Syromiatnikov - 2:2.1-69Eugene Syromiatnikov - 2:2.1-68Eugene Syromiatnikov - 2:2.1-67Eugene Syromiatnikov - 2:2.1-66Eugene Syromiatnikov - 2:2.1-65Eugene Syromiatnikov - 2:2.1-64Eugene Syromiatnikov - 2:2.1-63Eugene Syromiatnikov - 2:2.1-62Eugene Syromiatnikov - 2:2.1-61Eugene Syromiatnikov - 2:2.1-60Eugene Syromiatnikov - 2:2.1-59Eugene Syromiatnikov - 2:2.1-58Eugene Syromiatnikov - 2:2.1-57Eugene Syromiatnikov - 2:2.1-56Eugene Syromiatnikov - 2:2.1-55Eugene Syromiatnikov - 2:2.1-54Eugene Syromiatnikov - 2:2.1-53Eugene Syromiatnikov - 2:2.1-52Eugene Syromiatnikov - 2:2.1-51Eugene Syromiatnikov - 2:2.1-50Eugene Syromiatnikov - 2:2.1-49Eugene Syromiatnikov - 2:2.1-48Eugene Syromiatnikov - 2:2.1-47Eugene Syromiatnikov - 2:2.1-46Eugene Syromiatnikov - 2:2.1-45Eugene Syromiatnikov - 2:2.1-44Eugene Syromiatnikov - 2:2.1-43Eugene Syromiatnikov - 2:2.1-42Eugene Syromiatnikov - 2:2.1-41Eugene Syromiatnikov - 2:2.1-40Eugene Syromiatnikov - 2:2.1-39Eugene Syromiatnikov - 2:2.1-38Eugene Syromiatnikov - 2:2.1-37Eugene Syromiatnikov - 2:2.1-35Eugene Syromiatnikov - 2:2.1-34Petr Oros - 2.1-33Petr Oros - 2.1-32Petr Oros - 2.1-31Petr Oros - 2.1-30Petr Oros - 2.1-29Petr Oros - 2.1-29Petr Oros - 2.1-28Petr Oros - 2.1-27Petr Oros - 2.1-26Petr Oros - 2.1-25Petr Oros - 2.1-24Petr Oros - 2.1-23Petr Oros - 2.1-22Petr Oros - 2.1-21Petr Oros - 2.1-20Petr Oros - 2.1-19Petr Oros - 2.1-18Petr Oros - 2.1-17Petr Oros - 2.1-16Petr Oros - 2.1-15Petr Oros - 2.1-14Petr Oros - 2.1-13Petr Oros - 2.1-12Petr Oros - 2.1-11Petr Oros - 2.1-10Petr Oros - 2.1-9Petr Oros - 2.1-8Petr Oros - 2.1-8Anton Arapov - 2.1-7.1Anton Arapov - 2.1-7Anton Arapov - 2.1-6Anton Arapov - 2.1-5Daniel Mach - 2:2.1-4Anton Arapov 2.1-3Anton Arapov 2.1-2Anton Arapov 2.1-1Anton Arapov 2.1-0Anton Arapov 2.0-3.1Fedora Release Engineering - 2:2.0-3Anton Arapov 2.0-2Anton Arapov 2.0-1Anton Arapov 2.0Anton Arapov 1.18-1Fedora Release Engineering - 1:1.17-26Anton Arapov 1.17-25Anton Arapov 1.17-24Fedora Release Engineering - 1:1.17-22Anton Arapov 1.17-21Anton Arapov 1.17-20Anton Arapov 1.17-19Anton Arapov 1.17-18Anton Arapov 1.17-17Anton Arapov 1.17-14Anton Arapov 1.17-13Anton Arapov 1.17-12Fedora Release Engineering - 1:1.17-11Anton Arapov 1.17-10Anton Arapov 1.17-9Anton Arapov 1.17-8jkeating - 1:1.17-7Anton Arapov 1.17-6Toshio Kuratomi 1.17-5Dave Jones 1.17-4Anton Arapov 1.17-3Anton Arapov 1.17-2Dave Jones 1.17-1.58Kyle McMartin 1.17-1.57Kyle McMartin 1.17-1.56Dave Jones Dave Jones Fedora Release Engineering - 1:1.17-1.52.1Dave Jones Kyle McMartin 1:1.17-1.50Dave Jones Fedora Release Engineering - 1:1.17-1.46.1Dave Jones Jarod Wilson Dave Jones Dave Jones Jarod Wilson Jarod Wilson Jarod Wilson Dave Jones Jon Masters Jesse Keating Bill Nottingham Dave Jones Dave Jones Jesse Keating Jesse Keating Dave Jones Dave Jones Dave Jones Dave Jones Dave Jones Dave Jones Dave Jones Dave Jones Dave Jones Dave Jones Dave Jones Dave Jones - Update Intel CPU microcode to microcode-20231009 release, addresses CVE-2023-23583 (RHEL-3920): - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xac up to 0xb4; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0003a5 up to 0xd0003b9; - Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x1000230 up to 0x1000268; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xbc up to 0xc2; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x2c up to 0x34; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x46 up to 0x4e; - Update of 06-8f-04/0x10 microcode from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-04) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-04) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-05) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-06) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-06/0x10 microcode from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-06) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-08) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision 0x2e up to 0x32; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x2e up to 0x32; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x2e up to 0x32; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x2e up to 0x32; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x2e up to 0x32; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x2e up to 0x32; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x2e up to 0x32; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x2e up to 0x32; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x42c up to 0x430; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x42c up to 0x430; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x42c up to 0x430; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x42c up to 0x430; - Update of 06-9a-04/0x40 (AZB A0) microcode from revision 0x4 up to 0x5; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x59 up to 0x5d; - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x119 up to 0x11d; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision 0x4119 up to 0x411c; - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in intel-ucode/06-ba-02) from revision 0x4119 up to 0x411c; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in intel-ucode/06-ba-03) from revision 0x4119 up to 0x411c; - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4119 up to 0x411c; - Update of 06-be-00/0x11 (ADL-N A0) microcode from revision 0x11 up to 0x12; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x2e up to 0x32; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x2e up to 0x32; - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x2e up to 0x32; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) from revision 0x2e up to 0x32; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x2e up to 0x32; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x2e up to 0x32; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision 0x2e up to 0x32; - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x2e up to 0x32.- Update Intel CPU microcode to microcode-20230808 release, addresses CVE-2022-40982, CVE-2022-41804, CVE-2023-23908 (#2223994): - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006f05 up to 0x2007006; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xaa up to 0xac; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000171 up to 0x1000181; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003501 up to 0x4003604; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003501 up to 0x5003604; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002601 up to 0x7002703; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000390 up to 0xd0003a5; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xba up to 0xbc; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x2a up to 0x2c; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x44 up to 0x46; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision 0xf2 up to 0xf4; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xf2 up to 0xf4; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision 0xf2 up to 0xf4; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xf2 up to 0xf4; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode from revision 0xf6 up to 0xf8; - Update of 06-8f-04/0x10 microcode from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-04) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-04) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-05) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-06) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-06/0x10 microcode from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-06) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-08) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision 0x2c up to 0x2e; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x2c up to 0x2e; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x2c up to 0x2e; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x2c up to 0x2e; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x2c up to 0x2e; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x2c up to 0x2e; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x2c up to 0x2e; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x2c up to 0x2e; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x42a up to 0x42c; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x42a up to 0x42c; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x42a up to 0x42c; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x42a up to 0x42c; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xf2 up to 0xf4; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xf2 up to 0xf4; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xf2 up to 0xf4; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xf2 up to 0xf4; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xf8 up to 0xfa; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf6 up to 0xf8; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf6 up to 0xf8; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf6 up to 0xf8; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf6 up to 0xf8; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xf6 up to 0xf8; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x58 up to 0x59; - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x113 up to 0x119; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x2c up to 0x2e; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x2c up to 0x2e; - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x2c up to 0x2e; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) from revision 0x2c up to 0x2e; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x2c up to 0x2e; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x2c up to 0x2e; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision 0x2c up to 0x2e; - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x2c up to 0x2e; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision 0x4112 up to 0x4119 (old pf 0xc0); - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in intel-ucode/06-ba-02) from revision 0x4112 up to 0x4119 (old pf 0xc0); - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in intel-ucode/06-ba-03) from revision 0x4112 up to 0x4119 (old pf 0xc0); - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4112 up to 0x4119 (old pf 0xc0); - Update of 06-be-00/0x11 (ADL-N A0) microcode from revision 0x10 up to 0x11 (old pf 0x1).- Update Intel CPU microcode to microcode-20230516 release: - Addition of 06-be-00/0x01 (ADL-N A0) microcode at revision 0x10; - Addition of 06-9a-04/0x40 (AZB A0) microcode at revision 0x4; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006e05 up to 0x2006f05; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xa6 up to 0xaa; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000161 up to 0x1000171; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003303 up to 0x4003501; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003303 up to 0x5003501; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002503 up to 0x7002601; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000389 up to 0xd000390; - Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x1000211 up to 0x1000230; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb8 up to 0xba; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x32 up to 0x33; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x28 up to 0x2a; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x42 up to 0x44; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xf0 up to 0xf2; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision 0xf0 up to 0xf2; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision 0xf0 up to 0xf2; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xf0 up to 0xf2; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode from revision 0xf4 up to 0xf6; - Update of 06-8f-04/0x10 microcode from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-04) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-04) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-05) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-06) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-06/0x10 microcode from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-06) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-08) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision 0x2c000170 up to 0x2c0001d1; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision 0x2b000181 up to 0x2b000461; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x429 up to 0x42a; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x429 up to 0x42a; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x429 up to 0x42a; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x429 up to 0x42a; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xf0 up to 0xf2; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xf0 up to 0xf2; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xf0 up to 0xf2; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xf0 up to 0xf2; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xf4 up to 0xf8; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf4 up to 0xf6; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf4 up to 0xf6; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf4 up to 0xf6; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf4 up to 0xf6; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xf4 up to 0xf6; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x57 up to 0x58; - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x112 up to 0x113; - Update of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode from revision 0x410e up to 0x4112; - Update of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode (in intel-ucode/06-ba-02) from revision 0x410e up to 0x4112; - Update of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode (in intel-ucode/06-ba-03) from revision 0x410e up to 0x4112; - Update of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode from revision 0x410e up to 0x4112.- Force locale to C in check_caveats, reload_microcode, and update_ucode. - Cleanup the dangling symlinks in update_ucode. - Avoid spurious find failures due to calls on directories that may not exist. - Add support for the new, more correct, variant of dracut's default $fw_dir path in dracut_99microcode_ctl-fw_dir_override_module_init.sh.- Update Intel CPU microcode to microcode-20230214 release, addresses CVE-2022-21216, CVE-2022-33196, CVE-2022-33972, CVE-2022-38090 (#2171238, - Addition of 06-6c-01/0x10 (ICL-D B0) microcode at revision 0x1000211; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode at revision 0x2b000181; - Addition of 06-8f-04/0x10 microcode at revision 0x2c000170; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-04) at revision 0x2b000181; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-04) at revision 0x2c000170; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-04) at revision 0x2b000181; - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) at revision 0x2c000170; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-04) at revision 0x2b000181; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-04) at revision 0x2b000181; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-04) at revision 0x2c000170; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-05) at revision 0x2b000181; - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) at revision 0x2c000170; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode at revision 0x2b000181; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode at revision 0x2c000170; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-05) at revision 0x2b000181; - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) at revision 0x2c000170; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-05) at revision 0x2b000181; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-05) at revision 0x2b000181; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-05) at revision 0x2c000170; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-06) at revision 0x2b000181; - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) at revision 0x2c000170; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-06) at revision 0x2b000181; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-06) at revision 0x2c000170; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode at revision 0x2b000181; - Addition of 06-8f-06/0x10 microcode at revision 0x2c000170; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-06) at revision 0x2b000181; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-06) at revision 0x2b000181; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-06) at revision 0x2c000170; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07) at revision 0x2b000181; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-07) at revision 0x2b000181; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-07) at revision 0x2b000181; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode at revision 0x2b000181; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-07) at revision 0x2b000181; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-08) at revision 0x2b000181; - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) at revision 0x2c000170; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-08) at revision 0x2b000181; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-08) at revision 0x2c000170; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) at revision 0x2b000181; - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) at revision 0x2c000170; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-08) at revision 0x2b000181; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode at revision 0x2b000181; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode at revision 0x2c000170; - Addition of 06-b7-01/0x32 (RPL-S S0) microcode at revision 0x112; - Addition of 06-ba-02/0xc0 microcode at revision 0x410e; - Addition of 06-ba-03/0xc0 microcode (in intel-ucode/06-ba-02) at revision 0x410e; - Addition of 06-ba-02/0xc0 microcode (in intel-ucode/06-ba-03) at revision 0x410e; - Addition of 06-ba-03/0xc0 microcode at revision 0x410e; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xa4 up to 0xa6; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from revision 0xf0 up to 0xf4; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf0 up to 0xf4; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015e up to 0x1000161; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003302 up to 0x4003303; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003302 up to 0x5003303; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002501 up to 0x7002503; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000375 up to 0xd000389; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3c up to 0x3e; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x20 up to 0x22; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb2 up to 0xb8; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x31 up to 0x32; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x40 up to 0x42; - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x16 up to 0x17; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x421 up to 0x429; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x421 up to 0x429; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x421 up to 0x429; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x421 up to 0x429; - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x24000023 up to 0x24000024; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf0 up to 0xf4; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf0 up to 0xf4; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf0 up to 0xf4; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf0 up to 0xf4; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xf0 up to 0xf4; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x54 up to 0x57; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x22 up to 0x2c (old pf 0x3). - Change the logger severity level to warning to align with the kmsg one.- Update Intel CPU microcode to microcode-20220510 release, addresses CVE-2022-21233 (#2119080): - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006d05 up to 0x2006e05; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015d up to 0x100015e; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000363 up to 0xd000375; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3a up to 0x3c; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1e up to 0x20; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb0 up to 0xb2; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x26 up to 0x28; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3e up to 0x40; - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode from revision 0x1f up to 0x22; - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x1f up to 0x22; - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x1f up to 0x22; - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x1f up to 0x22; - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x1f up to 0x22; - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode from revision 0x1f up to 0x22; - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x1f up to 0x22; - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x1f up to 0x22; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x41c up to 0x421; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x41c up to 0x421; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x41c up to 0x421; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x41c up to 0x421; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x53 up to 0x54; - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x1f up to 0x22; - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x1f up to 0x22; - Update of 06-bf-02/0x03 (ADL C0) microcode from revision 0x1f up to 0x22; - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02) from revision 0x1f up to 0x22; - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x1f up to 0x22; - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x1f up to 0x22; - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision 0x1f up to 0x22; - Update of 06-bf-05/0x03 (ADL C0) microcode from revision 0x1f up to 0x22.- Update Intel CPU microcode to microcode-20220510 release, addresses CVE-2022-0005, CVE-2022-21131, CVE-2022-21136, CVE-2022-21151 (#2090246, - Addition of 06-97-02/0x03 (ADL-HX C0) microcode at revision 0x1f; - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) at revision 0x1f; - Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) at revision 0x1f; - Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) at revision 0x1f; - Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in intel-ucode/06-97-05) at revision 0x1f; - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode at revision 0x1f; - Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) at revision 0x1f; - Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) at revision 0x1f; - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode at revision 0x41c; - Addition of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) at revision 0x41c; - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) at revision 0x41c; - Addition of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode at revision 0x41c; - Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in intel-ucode/06-bf-02) at revision 0x1f; - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) at revision 0x1f; - Addition of 06-bf-02/0x03 (ADL C0) microcode at revision 0x1f; - Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02) at revision 0x1f; - Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in intel-ucode/06-bf-05) at revision 0x1f; - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) at revision 0x1f; - Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05) at revision 0x1f; - Addition of 06-bf-05/0x03 (ADL C0) microcode at revision 0x1f; - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xec up to 0xf0; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006c0a up to 0x2006d05; - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xec up to 0xf0; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in intel-06-8c-01/intel-ucode/06-8c-01) from revision 0x9a up to 0xa4; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xec up to 0xf0; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xec up to 0xf0; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xec up to 0xf0; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xec up to 0xf0; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from revision 0xec up to 0xf0; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xec up to 0xf0; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xec up to 0xf0; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xec up to 0xf0; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xec up to 0xf0; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xec up to 0xf0; - Update of 06-37-09/0x0f (VLV D0) microcode from revision 0x90c up to 0x90d; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015c up to 0x100015d; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400320a up to 0x4003302; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x500320a up to 0x5003302; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002402 up to 0x7002501; - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x46 up to 0x48; - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x24 up to 0x28; - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x36 up to 0x38; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000331 up to 0xd000363; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x38 up to 0x3a; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1c up to 0x1e; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa8 up to 0xb0; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2d up to 0x31; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x22 up to 0x26; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3c up to 0x3e; - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x15 up to 0x16; - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x2400001f up to 0x24000023; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xec up to 0xf0; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xec up to 0xf0; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xee up to 0xf0; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xea up to 0xf0; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xec up to 0xf0; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x50 up to 0x53.- Update Intel CPU microcode to microcode-20220207 release: - Fixes in releasenote.md file.- Update Intel CPU microcode to microcode-20220204 release, addresses CVE-2021-0127, CVE-2021-0145, CVE-2021-33120 (#2051547, #2049549, #2049566): - Removal of 06-86-04/0x01 (SNR B0) microcode at revision 0xb00000f; - Removal of 06-86-05/0x01 (SNR B1) microcode (in intel-ucode/06-86-04) at revision 0xb00000f; - Removal of 06-86-04/0x01 (SNR B0) microcode (in intel-ucode/06-86-05) at revision 0xb00000f; - Removal of 06-86-05/0x01 (SNR B1) microcode at revision 0xb00000f; - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xea up to 0xec; - Update of 06-4f-01/0xef (BDX-E/EP/EX/ML B0/M0/R0) microcode (in intel-06-4f-01/intel-ucode/06-4f-01) from revision 0xb00003e up to 0xb000040; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006b06 up to 0x2006c0a; - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xea up to 0xec; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in intel-06-8c-01/intel-ucode/06-8c-01) from revision 0x88 up to 0x9a; - Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode from revision 0x46 up to 0x49; - Update of 06-3f-04/0x80 (HSX-EX E0) microcode from revision 0x19 up to 0x1a; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015b up to 0x100015c; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003102 up to 0x400320a; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003102 up to 0x500320a; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002302 up to 0x7002402; - Update of 06-56-03/0x10 (BDX-DE V2/V3) microcode from revision 0x700001b up to 0x700001c; - Update of 06-56-04/0x10 (BDX-DE Y0) microcode from revision 0xf000019 up to 0xf00001a; - Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision 0xe000012 up to 0xe000014; - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x44 up to 0x46; - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x20 up to 0x24; - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x34 up to 0x36; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0002a0 up to 0xd000331; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x36 up to 0x38; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1a up to 0x1c; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa6 up to 0xa8; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2a up to 0x2d; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x16 up to 0x22; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x2c up to 0x3c; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xea up to 0xec; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision 0xea up to 0xec; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision 0xea up to 0xec; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xea up to 0xec; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode from revision 0xea up to 0xec; - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x11 up to 0x15; - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x1d up to 0x2400001f; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xea up to 0xec; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xea up to 0xec; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xea up to 0xec; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xea up to 0xec; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xea up to 0xec; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xea up to 0xec; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xea up to 0xec; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xec up to 0xee; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xe8 up to 0xea; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xea up to 0xec; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x40 up to 0x50.- Update Intel CPU microcode to microcode-20210608 release: - Fixes in releasenote.md file.- Make intel-06-2d-07, intel-06-4e-03, intel-06-4f-01, intel-06-55-04, intel-06-5e-03, intel-06-8c-01, intel-06-8e-9e-0x-0xca, and intel-06-8e-9e-0x-dell caveats dependent on intel caveat. - Enable 06-8c-01 microcode update by default. - Enable 06-5e-03 microcode update by default (#1897684).- Update Intel CPU microcode to microcode-20210525 release, addresses CVE-2020-24489, CVE-2020-24511, CVE-2020-24512, and CVE-2020-24513 (#1962659, #1962709, #1962729, #1962675): - Addition of 06-55-05/0xb7 (CLX-SP A0) microcode at revision 0x3000010; - Addition of 06-6a-05/0x87 (ICX-SP C0) microcode at revision 0xc0002f0; - Addition of 06-6a-06/0x87 (ICX-SP D0) microcode at revision 0xd0002a0; - Addition of 06-86-04/0x01 (SNR B0) microcode at revision 0xb00000f; - Addition of 06-86-05/0x01 (SNR B1) microcode (in intel-ucode/06-86-04) at revision 0xb00000f; - Addition of 06-86-04/0x01 (SNR B0) microcode (in intel-ucode/06-86-05) at revision 0xb00000f; - Addition of 06-86-05/0x01 (SNR B1) microcode at revision 0xb00000f; - Addition of 06-8c-02/0xc2 (TGL-R C0) microcode at revision 0x16; - Addition of 06-8d-01/0xc2 (TGL-H R0) microcode at revision 0x2c; - Addition of 06-96-01/0x01 (EHL B1) microcode at revision 0x11; - Addition of 06-9c-00/0x01 (JSL A0/A1) microcode at revision 0x1d; - Addition of 06-a7-01/0x02 (RKL-S B0) microcode at revision 0x40; - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xe2 up to 0xea; - Update of 06-4f-01/0xef (BDX-E/EP/EX/ML B0/M0/R0) microcode (in intel-06-4f-01/intel-ucode/06-4f-01) from revision 0xb000038 up to 0xb00003e; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006a0a up to 0x2006b06; - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xe2 up to 0xea; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in intel-06-8c-01/intel-ucode/06-8c-01) from revision 0x68 up to 0x88; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xde up to 0xea; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xde up to 0xea; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xe0 up to 0xea; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xde up to 0xea; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from revision 0xde up to 0xea; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xde up to 0xea; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xde up to 0xea; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xde up to 0xea; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xde up to 0xea; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xde up to 0xea; - Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode from revision 0x44 up to 0x46; - Update of 06-3f-04/0x80 (HSX-EX E0) microcode from revision 0x16 up to 0x19; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000159 up to 0x100015b; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003006 up to 0x4003102; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003006 up to 0x5003102; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x700001e up to 0x7002302; - Update of 06-56-03/0x10 (BDX-DE V2/V3) microcode from revision 0x7000019 up to 0x700001b; - Update of 06-56-04/0x10 (BDX-DE Y0) microcode from revision 0xf000017 up to 0xf000019; - Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision 0xe00000f up to 0xe000012; - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x40 up to 0x44; - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x1e up to 0x20; - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x2e up to 0x34; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x34 up to 0x36; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x18 up to 0x1a; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa0 up to 0xa6; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x28 up to 0x2a; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xe0 up to 0xea; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xe0 up to 0xea; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xe0 up to 0xec; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xe0 up to 0xe8; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode from revision 0xe0 up to 0xea.- Update Intel CPU microcode to microcode-20210216 release (#1905111): - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006a08 up to 0x2006a0a; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003003 up to 0x4003006; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003003 up to 0x5003006.- Remove 06-55-04/06-55-06/06-55-07 (SKX-SP/CLX-SP) microcode-20201110 caveats.- Backport check_dmi_val to check_caveats from RHEL 8.- Do not use "grep -q" in a pipe in check_caveats. - Add 06-55-04/06-55-06/06-55-07 (SKX-SP/CLX-SP) microcode-20201110 caveats (#1905111).- Update Intel CPU microcode to microcode-20201112 release: - Addition of 06-8a-01/0x10 (LKF B2/B3) microcode at revision 0x28; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x32 up to 0x34; - Updated releasenote file.- Disable 06-8c-01 (TGL-UP3/UP4 B1) microcode update by default.- Update Intel CPU microcode to microcode-20201027 release, addresses CVE-2020-8694, CVE-2020-8695, CVE-2020-8696, CVE-2020-8698 (#1893261, #1893249, #1893229): - Addition of 06-55-0b/0xbf (CPX-SP A1) microcode at revision 0x700001e; - Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode at revision 0x68; - Addition of 06-a5-02/0x20 (CML-H R1) microcode at revision 0xe0; - Addition of 06-a5-03/0x22 (CML-S 6+2 G1) microcode at revision 0xe0; - Addition of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode at revision 0xe0; - Addition of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode at revision 0xe0; - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xdc up to 0xe2; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006906 up to 0x2006a08; - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xdc up to 0xe2; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up to 0xde; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up to 0xde; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xd6 up to 0xe0; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xd6 up to 0xde; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from revision 0xd6 up to 0xde; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xd6 up to 0xde; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xd6 up to 0xde; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xd6 up to 0xde; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xd6 up to 0xde; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xd6 up to 0xde; - Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode from revision 0x43 up to 0x44; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000157 up to 0x1000159; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4002f01 up to 0x4003003; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5002f01 up to 0x5003003; - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x38 up to 0x40; - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x16 up to 0x1e; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x16 up to 0x18; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x78 up to 0xa0; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xca up to 0xe0.- Add README file to the documentation directory. - Add publicly-sourced codenames list to supply to gen_provides.sh; update the latter to handle the somewhat different format. - Add SUMMARY.intel-ucode file containing metadata information from the microcode file headers.- Update Intel CPU microcode to microcode-20200609 release (#1826589): - Fixed a typo in the release note file.- Enable 06-2d-07 (SNB-E/EN/EP) caveat by default (#1846023).- Enable 06-55-04 (SKL-X/W) caveat by default.- Do not update 06-4e-03 (SKL-U/Y) and 06-5e-03 (SKL-H/S/Xeon E3 v5) to revision 0xdc, use 0xd6 by default (#1846133).- Avoid temporary file creation, used for here-documents in check_caveats.- Update Intel CPU microcode to microcode-20200602 release, addresses CVE-2020-0543, CVE-2020-0548, CVE-2020-0549 (#1795352, #1795355, #1827190): - Update of 06-3c-03/0x32 (HSW C0) microcode from revision 0x27 up to 0x28; - Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from revision 0x2e up to 0x2f; - Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from revision 0x25 up to 0x26; - Update of 06-46-01/0x32 (HSW-H C0) microcode from revision 0x1b up to 0x1c; - Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode from revision 0x21 up to 0x22; - Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xd6 up to 0xdc; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000151 up to 0x1000157; - Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2000065 up to 0x2006906; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400002c up to 0x4002f01; - Update of 06-55-07/0xbf (CLX-SP B1) microcode from revision 0x500002c up to 0x5002f01; - Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from revision 0xd6 up to 0xdc; - Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from revision 0xca up to 0xd6; - Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xca up to 0xd6; - Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from revision 0xca up to 0xd6; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xca up to 0xd6; - Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U V0) microcode from revision 0xca up to 0xd6; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xca up to 0xd6; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode from revision 0xca up to 0xd6; - Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xca up to 0xd6; - Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from revision 0xca up to 0xd6; - Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xca up to 0xd6.- Update Intel CPU microcode to microcode-20200520 release (#1783103): - Update of 06-2d-06/0x6d (SNB-E/EN/EP C1/M0) microcode from revision 0x61f up to 0x621; - Update of 06-2d-07/0x6d (SNB-E/EN/EP C2/M1) microcode from revision 0x718 up to 0x71a.- Update Intel CPU microcode to microcode-20200508 release (#1835549): - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x46 up to 0x78. - Change the URL in the intel-microcode2ucode.8 to point to the GitHub repository since the microcode download section at Intel Download Center does not exist anymore.- Narrow down SKL-SP/W/X blacklist to exclude Server/FPGA/Fabric segment models (#1833037).- Re-generate initramfs not only for the currently running kernel, but for several recently installed kernels as well (#1773347).- Avoid find being SIGPIPE'd on early "grep -q" exit in the dracut script (#1781332).- Update stale posttrans dependency, add triggers for proper handling of the debug kernel flavour along with kernel-rt (#1780257).- Do not update 06-55-04 (SKL-SP/W/X) to revision 0x2000065, use 0x2000064 by default (#1774329).- Update Intel CPU microcode to microcode-20191115 release: - Update of 06-4e-03/0xc0 (SKL-U/Y D0) from revision 0xd4 up to 0xd6; - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 R0/N0) from revision 0xd4 up to 0xd6; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) from revision 0xc6 up to 0xca; - Update of 06-8e-09/0xc0 (KBL-U/Y H0) from revision 0xc6 up to 0xca; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0) from revision 0xc6 up to 0xca; - Update of 06-8e-0b/0xd0 (WHL-U W0) from revision 0xc6 up to 0xca; - Update of 06-8e-0c/0x94 (AML-Y V0, CML-U 4+2 V0, WHL-U V0) from revision 0xc6 up to 0xca; - Update of 06-9e-09/0x2a (KBL-G/X H0, KBL-H/S/Xeon E3 B0) from revision 0xc6 up to 0xca; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) from revision 0xc6 up to 0xca; - Update of 06-9e-0b/0x02 (CFL-S B0) from revision 0xc6 up to 0xca; - Update of 06-9e-0c/0x22 (CFL-S/Xeon E P0) from revision 0xc6 up to 0xca; - Update of 06-9e-0d/0x22 (CFL-H/S R0) from revision 0xc6 up to 0xca; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) from revision 0xc6 up to 0xca.- Update Intel CPU microcode to microcode-20191113 release: - Update of 06-9e-0c (CFL-H/S P0) microcode from revision 0xae up to 0xc6. - Drop 0001-releasenote-changes-summary-fixes.patch.- Package the publicy available microcode-20191112 release (#1755025): - Addition of 06-4d-08/0x1 (AVN B0/C0) microcode at revision 0x12d; - Addition of 06-55-06/0xbf (CSL-SP B0) microcode at revision 0x400002c; - Addition of 06-7a-08/0x1 (GLK R0) microcode at revision 0x16; - Update of 06-55-03/0x97 (SKL-SP B1) microcode from revision 0x1000150 up to 0x1000151; - Update of 06-55-04/0xb7 (SKL-SP H0/M0/U0, SKL-D M1) microcode from revision 0x2000064 up to 0x2000065; - Update of 06-55-07/0xbf (CSL-SP B1) microcode from revision 0x500002b up to 0x500002c; - Update of 06-7a-01/0x1 (GLK B0) microcode from revision 0x2e up to 0x32; - Include 06-9e-0c (CFL-H/S P0) microcode from the microcode-20190918 release. - Correct the releasenote file (0001-releasenote-changes-summary-fixes.patch). - Update README.caveats with the link to the new Knowledge Base article.- Intel CPU microcode update to 20191112, addresses CVE-2017-5715, CVE-2019-0117, CVE-2019-11135, CVE-2019-11139 (#1755025, #1764058, #1764071, - Addition of 06-a6-00/0x80 (CML-U 6+2 A0) microcode at revision 0xc6; - Addition of 06-66-03/0x80 (CNL-U D0) microcode at revision 0x2a; - Addition of 06-55-03/0x97 (SKL-SP B1) microcode at revision 0x1000150; - Addition of 06-7e-05/0x80 (ICL-U/Y D1) microcode at revision 0x46; - Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xcc to 0xd4; - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 R0/N0) microcode from revision 0xcc to 0xd4 - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xb4 to 0xc6; - Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xb4 to 0xc6; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0) microcode from revision 0xb4 to 0xc6; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xb8 to 0xc6; - Update of 06-8e-0c/0x94 (AML-Y V0) microcode from revision 0xb8 to 0xc6; - Update of 06-8e-0c/0x94 (CML-U 4+2 V0) microcode from revision 0xb8 to 0xc6; - Update of 06-8e-0c/0x94 (WHL-U V0) microcode from revision 0xb8 to 0xc6; - Update of 06-9e-09/0x2a (KBL-G/X H0) microcode from revision 0xb4 to 0xc6; - Update of 06-9e-09/0x2a (KBL-H/S/Xeon E3 B0) microcode from revision 0xb4 to 0xc6; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xb4 to 0xc6; - Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xb4 to 0xc6; - Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xb8 to 0xc6.- Rework dracut hook to address dracut's early initramfs generation behaviour (#1769413).- Do not update 06-2d-07 (SNB-E/EN/EP) to revision 0x718, use 0x714 by default.- Intel CPU microcode update to 20190918. - Add new disclaimer, generated based on relevant caveats. - Resolves: #1753541.- Intel CPU microcode update to 20190618. - Resolves: #1717241.- Remove disclaimer, as it is not as important now to justify kmsg/log pollution; its contents are partially adopted in README.caveats.- Intel CPU microcode update to 20190514a. - Resolves: #1711941.- Intel CPU microcode update to 20190507_Public_DEMO. - Resolves: #1697904.- Intel CPU microcode update to 20190312. - Add "Provides:" tags generation. - Resolves: #1697904.- Fix %postun script (#1628629)- Add 7.3.z kernel version to kernel_early configuration.- Fix dracut module checks in Host-Only mode.- Disable 06-4f-01 microcode in config (#1623630).- Intel CPU microcode update to 20180807a. - Add README.caveats documentation file. - Add intel-microcode2ucode manual page. - Add check for early microcode load, use it in microcode_ctl dracut module. - Resolves: #1596627.- Check that the currently running kernel is installed before running dracut -f.- Drop "hypervisor" /proc/cpuinfo flag check.- Intel CPU microcode update to 20180807. - Resolves: #1614422- Add an ability to disable "hypervisor" /proc/cpuinfo flag check.- Provide %attr for the ghosted /lib/firmware/intel-ucode.- Remove model name blacklists from caveats configuration files. - Resolves: #1596627- Add model name blacklist infrastructure. - Store Intel ucode files in /usr/share/microcode_ctl; do not populate them in a virtualised environment. - Resolves: #1596627- Add intel-microcode2ucode back - Resolves: #1574582- Update to upstream 2.1-18. Intel CPU microcode update to 20180703. - Add infrastructure for handling kernel-version-dependant microcode. - Resolves: #1574582- CVE-2018-3639 hw: cpu: speculative store bypass - Resolves: #1495071- Fix: Operation not permitted when installing microcode_ctl - Resolves: #1584247- Update disclaimer text - Resolves: #1574574- Intel CPU microcode update to 20180425. - Resolves: #1574574- Revert Microcode from Intel for Side Channel attack - Resolves: #1533939- Don't run dracut if not on a live system - Resolves: #1530400- Remove old binary tool - Resolves: #1527360- Update to upstream 2.1-15. Intel CPU microcode update to 20180108. - Resolves: #1527360- Update Intel CPU microde for 06-3f-02, 06-4f-01, and 06-55-04 - Resolves: #1527360- Update to upstream 2.1-14. Intel CPU microcode update to 20171117. - Resolves: #1457522- Fix upstream URL - Resolves: #1502360- Update to upstream 2.1-13. Intel CPU microcode update to 20170707. - Resolves: #1457522- Update to upstream 2.1-12. Intel CPU microcode update to 20170511. - Resolves: #1384218- Rpm scriptlets should only rebuild the current kernel's initrd. - Resolves: #1420180- Fix issue with hot microcode cpu reload. - Resolves: #1411232- Fix broken quoting in ExecStart line. - Resolves: #1411232- Fix issue with hot microcode cpu reload. - Resolves: #1398698- Move dracut call into posttrans phase. - Resolves: #1398698- Update to upstream 2.1-10. Intel CPU microcode update to 20160714. - Resolves: #1358047- Load CPU microcode update only on supproted systems. - Resolves: #1307179- Update to upstream 2.1-9. Intel CPU microcode update to 20160607. - Resolves: #1253106- Run dracut -f for all kernels. - Resolves: #1292158- Update to upstream 2.1-7. Intel CPU microcode update to 20150121. - Resolves: #1174983- Run dracut -f after install microcode for update initramfs. - Resolves: #1151192- Update to upstream 2.1-6. Intel CPU microcode update to 20140913. - Resolves: #1142302- Update to upstream 2.1-5. Intel CPU microcode update to 20140624. - Resolves: #1113396- Fix bogus time in changelog - Resolves: #1085117- Update to upstream 2.1-4. Intel CPU microcode update to 20140430. - Resolves: #1085117- Fix the microcode's behaviour in virtual environment.- Fix the microcode's dracut configuration file location.- Enable early microcode capabilities. Systemd and Dracut support. (Jeff Bastian)- Update to upstream 2.1-3. Intel CPU microcode update to 20140122.- Mass rebuild 2013-12-27- Imported to RHEL tree- Update to upstream 2.1-2.- Update to upstream 2.1-1.- Update to upstream 2.1. AMD microcode has been removed, find it in linux-firmware.- Update to upstream 2.0-3- Rebuilt for https://fedoraproject.org/wiki/Fedora_19_Mass_Rebuild- Update to upstream 2.0-2- Update to upstream 2.0-1- Update to upstream 2.0- Update to upstream 1.18- Rebuilt for https://fedoraproject.org/wiki/Fedora_18_Mass_Rebuild- Update to microcode-20120606.dat- Update to amd-ucode-2012-01-17.tar- Rebuilt for https://fedoraproject.org/wiki/Fedora_17_Mass_Rebuild- Fix a segfault that may be triggered by very long parameter [#768803]- Update to microcode-20111110.dat- Update to microcode-20110915.dat- Ship splitted microcode for Intel CPUs [#690930] - Include tool for splitting microcode for Intl CPUs (Kay Sievers )- Fix udev rules (Dave Jones ) [#690930]- Update to microcode-20110428.dat- fix memory leak.- Update to amd-ucode-2011-01-11.tar- Rebuilt for https://fedoraproject.org/wiki/Fedora_15_Mass_Rebuild- manpage fix (John Bradshaw ) [#670879]- Update to microcode-20101123.dat- Update to microcode-20100914.dat- Rebuilt for gcc bug 634757- Update to microcode-20100826.dat- Fix license tag: bz#450491- Update to microcode-20100826.dat- Fix the udev rules (Harald Hoyer )- Make microcode_ctl event driven (Bill Nottingham ) [#479898]- Update to microcode-20100209.dat- Fix duplicate message pointed out by Edward Sheldrake.- Add AMD x86/x86-64 microcode. (Dated: 2009-10-09) Doesn't need microcode_ctl modifications as it's loaded by request_firmware() like any other sensible driver. - Eventually, this AMD firmware can probably live inside kernel-firmware once it is split out.- Update to microcode-20090927.dat- Remove some unnecessary code from the init script.- Rebuilt for https://fedoraproject.org/wiki/Fedora_12_Mass_Rebuild- Shorten sleep time during init. This really needs to be replaced with proper udev hooks, but this is a quick interim fix.- Change ExclusiveArch to i586 instead of i386. Resolves rhbz#497711.- update to microcode 20090330- Rebuilt for https://fedoraproject.org/wiki/Fedora_11_Mass_Rebuild- update to microcode 20080910- Update to microcode 20080401- Update to microcode 20080220 - Fix rpmlint warnings in specfile.- specfile cleanups.- Use /lib/firmware instead of /etc/firmware- Fix permissions on microcode.dat- Spec cleanup and macro standardization. - Update license - Update microcode data file to 20080131 revision.- Update to upstream 1.17- BZ209455 fixes.- rebuild- remove kudzu requirement - add prereq for coreutils, awk, grep- rebuild.- Update to upstream 1.13- rebuilt for new gcj- rebuilt- initscript tweaks.- Update to upstream 1.12- Check for device node *after* loading the module. (#157672)- Rebuild for gcc4- s/Serial/Epoch/- Drop the node creation/deletion change from previous release. It'll cause grief with selinux, and was a hack to get around a udev shortcoming that should be fixed properly.- Create/remove the /dev/cpu/microcode dev node as needed. - Use correct path again for the microcode.dat. - Remove some no longer needed tests in the init script.- Only enable microcode_ctl service if the CPU is capable. - Prevent microcode_ctl getting restarted multiple times on initlevel change (#141581) - Make restart/reload work properly - Do nothing if not started by root.- Adjust dev node location. (#144963)- Load/Remove microcode module in initscript.- Update to upstream 1.11 release.- Initial packaging, based upon kernel-utils./bin/sh/bin/sh/bin/sh/bin/sh/bin/sh  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intel-ucode01-microcode.conf99-microcode-override.conf99microcode_ctl-fw_dir_overridemodule-setup.shmicrocode.servicemicrocode_ctlcheck_caveatsreload_microcodeupdate_ucodeintel-microcode2ucodemicrocode_ctlLICENSE.intel-ucodeREADMEREADME.caveatsREADME.intel-ucodeRELEASE_NOTES.intel-ucodeSECURITY.intel-ucodeSUMMARY.intel-ucodecaveats06-2d-07_readme06-4e-03_readme06-4f-01_readme06-55-04_readme06-5e-03_readme06-8c-01_readmeintel_readmeintel-microcode2ucode.8.gzmicrocode_ctlintel-ucodeucode_with_caveatsintelintel-06-2d-07configdisclaimerintel-ucode06-2d-07readmeintel-06-4e-03configdisclaimerintel-ucode06-4e-03readmeintel-06-4f-01configdisclaimerintel-ucode06-4f-01readmeintel-06-55-04configdisclaimerintel-ucode06-55-04readmeintel-06-5e-03configdisclaimerintel-ucode06-5e-03readmeintel-06-8c-01configdisclaimerintel-ucode06-8c-01readmeconfigdisclaimerintel-ucode06-03-0206-05-0006-05-0106-05-0206-05-0306-06-0006-06-0506-06-0a06-06-0d06-07-0106-07-0206-07-0306-08-0106-08-0306-08-0606-08-0a06-09-0506-0a-0006-0a-0106-0b-0106-0b-0406-0d-0606-0e-0806-0e-0c06-0f-0206-0f-0606-0f-0706-0f-0a06-0f-0b06-0f-0d06-16-0106-17-0606-17-0706-17-0a06-1a-0406-1a-0506-1c-0206-1c-0a06-1d-0106-1e-0506-25-0206-25-0506-26-0106-2a-0706-2c-0206-2d-0606-2d-0706-2e-0606-2f-0206-37-0806-37-0906-3a-0906-3c-0306-3d-0406-3e-0406-3e-0606-3e-0706-3f-0206-3f-0406-45-0106-46-0106-47-0106-4c-0306-4c-0406-4d-0806-4e-0306-55-0306-55-0406-55-0506-55-0606-55-0706-55-0b06-56-0206-56-0306-56-0406-56-0506-5c-0206-5c-0906-5c-0a06-5e-0306-5f-0106-66-0306-6a-0506-6a-0606-6c-0106-7a-0106-7a-0806-7e-0506-8a-0106-8c-0206-8d-0106-8e-0906-8e-0a06-8e-0b06-8e-0c06-8f-0406-8f-0506-8f-0606-8f-0706-8f-0806-96-0106-97-0206-97-0506-9a-0306-9a-0406-9c-0006-9e-0906-9e-0a06-9e-0b06-9e-0c06-9e-0d06-a5-0206-a5-0306-a5-0506-a6-0006-a6-0106-a7-0106-b7-0106-ba-0206-ba-0306-be-0006-bf-0206-bf-050f-00-070f-00-0a0f-01-020f-02-040f-02-050f-02-060f-02-070f-02-090f-03-020f-03-030f-03-040f-04-010f-04-030f-04-040f-04-070f-04-080f-04-090f-04-0a0f-06-020f-06-040f-06-050f-06-08readme/lib/firmware//usr/lib/dracut/dracut.conf.d//usr/lib/dracut/modules.d//usr/lib/dracut/modules.d/99microcode_ctl-fw_dir_override//usr/lib/systemd/system//usr/libexec//usr/libexec/microcode_ctl//usr/sbin//usr/share/doc//usr/share/doc/microcode_ctl//usr/share/doc/microcode_ctl/caveats//usr/share/man/man8//usr/share//usr/share/microcode_ctl//usr/share/microcode_ctl/ucode_with_caveats//usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07//usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/intel-ucode//usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03//usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/intel-ucode//usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01//usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/intel-ucode//usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04//usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/intel-ucode//usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03//usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/intel-ucode//usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01//usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/intel-ucode//usr/share/microcode_ctl/ucode_with_caveats/intel//usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/-O2 -g -pipe -Wall -Wp,-D_FORTIFY_SOURCE=2 -fexceptions -fstack-protector-strong --param=ssp-buffer-size=4 -grecord-gcc-switches -m64 -mtune=genericcpioxz2x86_64-redhat-linux-gnu# We only want to regenerate the initramfs for a fully booted # system; if this package happened to e.g. be pulled in as a build # dependency, it is pointless at best to regenerate the initramfs, # and also does not work with rpm-ostree: # https://bugzilla.redhat.com/show_bug.cgi?id=1199582 # https://bugzilla.redhat.com/show_bug.cgi?id=1530400 [ -d /run/systemd/system ] || exit 0 # We can't simply update all initramfs images, since "dracut --regenerate-all" # generates initramfs even for removed kernels and if dracut generates botched # initramfs image, that results in unbootable system, even with older kernels # that can't be used as a fallback: # https://bugzilla.redhat.com/show_bug.cgi?id=1420180 # https://access.redhat.com/support/cases/#/case/01779274 # https://access.redhat.com/support/cases/#/case/01814106 # # ...and we can't simply limit ourselves to updating only the currently # running kernel, as this doesn't work well with cases where kernel # is installed before the updated microcode, or in the same transaction. # And we can't rely on late update either, due to issues like this: # https://bugzilla.redhat.com/show_bug.cgi?id=1710445 # # ...and there are also issues with setups with increased "installonly_limit" # in /etc/yum.conf, which could lead to unacceptably long package installation # times. # # So, in the end, we try to grab no more than 2 most recently installed kernels # that are installed after the currently running one (with the currently running # kernel that makes up to 3 in total, the default "installonly_limit" value) # as a kernel package selection heuristic that tries to accomodate both the need # to put the latest microcode in freshly installed kernels and also addresses # existing concerns. # # For RPM selection, kernel flavours (like "debug" or "kdump" or "zfcp", # with only the former being relevant to x86 architecture) are a part or RPM # name; it's also a part of uname, with different separator used in RHEL 6/7 # and RHEL 8. RT kernel, however, is special, as "rt" is another part # of RPM name and it has its own versioning scheme both in NVR and uname. # And there's the kernel package split in RHEL 8, so one should look for *-core # and not the main package. pkgs="kernel kernel-debug kernel-rt kernel-rt-debug" qf='%{NAME} %{VERSION}-%{RELEASE}.%{ARCH} %{installtime}\n' : "${MICROCODE_RPM_KVER_LIMIT=2}" rpm -qa --qf "${qf}" ${pkgs} | sort -r -n -k'3,3' | { kver_cnt=0 processed="" skipped="" skip=0 while read -r pkgname vra install_ts; do flavour='' # For x86, only "debug" flavour exists in RHEL 8 [ "x${pkgname%*-debug}" = "x${pkgname}" ] \ || flavour='.debug' kver_cnt="$((kver_cnt + 1))" kver_uname="${vra}${flavour}" # Also check that the kernel is actually installed: # https://bugzilla.redhat.com/show_bug.cgi?id=1591664 # We use the presence of symvers file as an indicator, the check # similar to what weak-modules script does. # # XXX: Not sure if this check is still needed, since we now # iterate over the rpm output. [ -e "/boot/symvers-${kver_uname}.gz" ] || continue # Check that modules.dep for the kernel is present as well, # otherwise dracut complains with "/lib/modules/.../modules.dep # is missing. Did you run depmod?". [ -e "/lib/modules/${kver_uname}/modules.dep" ] || continue # We update the kernels with the same uname as the running kernel # regardless of the selected limit if [ "x$(uname -r)" = "x${kver_uname}" \ -o \( "${kver_cnt}" -le "${MICROCODE_RPM_KVER_LIMIT}" \ -a "${skip}" = 0 \) ] then dracut -f --kver "${kver_uname}" processed="${processed} ${pkgname}-${vra}" else skipped="${skipped} ${pkgname}-${vra}" fi # The packages are processed until a package with the same uname # as the running kernel is hit (since they are sorted # in the descending installation time stamp older). [ "x$(uname -r)" != "x${kver_uname}" ] || skip=1 done if [ -n "${skipped}" ]; then skip_msg="<4>After installation of a new version of microcode_ctl package, initramfs hasn't been re-generated for all the installed kernel packages. The following kernel packages have been skipped:${skipped}. Please re-generate initramfs manually for these kernel packages with the \"dracut -f --kver KERNEL_VERSION\" command in order to get the latest Intel CPU microcode included into early initramfs image for it, if needed." if [ -e /usr/bin/logger ]; then echo "${skip_msg}" | /usr/bin/logger -p syslog.warning -t microcode_ctl fi if [ -e /dev/kmsg ]; then echo "${skip_msg}" > /dev/kmsg fi fi } exit 0/bin/sh?7zXZ !#,] b2 l Nze8?"9$A ǜNEPڜ,b3;cq >yXj7 oXk4(Kݍ4gȀx˒kc`J_~,*.Azk* (ATna)v))SJ2;L݈[`5^Vsv",rU7/!H[ѣx*[](h4^6uz{v1h;/яAIDMUpžpω)ҩ9@%XPRz7H۞|2yxDK=hO6SG[9KowW2`ƌcץ>hԾ.5Ǧf{Lഥ}]&u& *d;u0|^x&;I:<=YOn`ׂtJ*Ț!hzJv[(9vZJk";Qɐ/ mѝOxE|.pͶKAzk]{qFy> /  929џ<yo{]BpGr eL#NI2.G!D" Nau.C%+J ,*\K g3(ǭeawkIrsݷwDmٵdqy-NɁZ;v>i|YqK-R`BiU<Љ+SS/h6^Pʫy|ڏ77+eIڦT45-|1 H߮̚hKsAtRկqhZdF ό^w2s*_*CmT$Q@V& #HwPU3k2sEtlU$rPoadab 8yceŠV6nBmw7ᦨ3A_&0:O\ H%!\gRֆ%F=:llЧ#sk6s{U5(b2`_qef^39NfA%;N`iAZʸKj@wxPX@:xiڇr~D yY"X^&oVSDɽ]QB(E>V{ 1'0vq~D۩ŋAa(ȂNۗĐlGla-n!sWCLnN+! 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