From: Ravikiran G Thirumalai Kill L1_CACHE_SHIFT from all arches. Since L1_CACHE_SHIFT_MAX is not used anymore with the introduction of INTERNODE_CACHE, kill L1_CACHE_SHIFT_MAX. Signed-off-by: Ravikiran Thirumalai Signed-off-by: Shai Fultheim Signed-off-by: Andi Kleen Signed-off-by: Andrew Morton --- include/asm-alpha/cache.h | 1 - include/asm-arm/cache.h | 5 ----- include/asm-cris/arch-v10/cache.h | 1 - include/asm-cris/arch-v32/cache.h | 1 - include/asm-cris/dma-mapping.h | 2 +- include/asm-generic/dma-mapping.h | 2 +- include/asm-i386/cache.h | 2 -- include/asm-ia64/cache.h | 2 -- include/asm-m32r/cache.h | 2 -- include/asm-m68k/cache.h | 2 -- include/asm-mips/cache.h | 1 - include/asm-parisc/cache.h | 1 - include/asm-powerpc/cache.h | 1 - include/asm-s390/cache.h | 1 - include/asm-sh/cache.h | 2 -- include/asm-sh64/cache.h | 2 -- include/asm-sparc/cache.h | 1 - include/asm-sparc64/cache.h | 1 - include/asm-um/cache.h | 3 --- include/asm-v850/cache.h | 2 -- include/asm-x86_64/cache.h | 1 - 21 files changed, 2 insertions(+), 34 deletions(-) diff -puN include/asm-alpha/cache.h~kill-l1_cache_shift_max include/asm-alpha/cache.h --- devel/include/asm-alpha/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-alpha/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -20,6 +20,5 @@ #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) #define SMP_CACHE_BYTES L1_CACHE_BYTES -#define L1_CACHE_SHIFT_MAX L1_CACHE_SHIFT #endif diff -puN include/asm-arm/cache.h~kill-l1_cache_shift_max include/asm-arm/cache.h --- devel/include/asm-arm/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-arm/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -7,9 +7,4 @@ #define L1_CACHE_SHIFT 5 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -/* - * largest L1 which this arch supports - */ -#define L1_CACHE_SHIFT_MAX 5 - #endif diff -puN include/asm-cris/arch-v10/cache.h~kill-l1_cache_shift_max include/asm-cris/arch-v10/cache.h --- devel/include/asm-cris/arch-v10/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-cris/arch-v10/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -4,6 +4,5 @@ /* Etrax 100LX have 32-byte cache-lines. */ #define L1_CACHE_BYTES 32 #define L1_CACHE_SHIFT 5 -#define L1_CACHE_SHIFT_MAX 5 #endif /* _ASM_ARCH_CACHE_H */ diff -puN include/asm-cris/arch-v32/cache.h~kill-l1_cache_shift_max include/asm-cris/arch-v32/cache.h --- devel/include/asm-cris/arch-v32/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-cris/arch-v32/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -4,6 +4,5 @@ /* A cache-line is 32 bytes. */ #define L1_CACHE_BYTES 32 #define L1_CACHE_SHIFT 5 -#define L1_CACHE_SHIFT_MAX 5 #endif /* _ASM_CRIS_ARCH_CACHE_H */ diff -puN include/asm-cris/dma-mapping.h~kill-l1_cache_shift_max include/asm-cris/dma-mapping.h --- devel/include/asm-cris/dma-mapping.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-cris/dma-mapping.h 2005-12-22 05:09:02.000000000 -0800 @@ -153,7 +153,7 @@ dma_set_mask(struct device *dev, u64 mas static inline int dma_get_cache_alignment(void) { - return (1 << L1_CACHE_SHIFT_MAX); + return (1 << INTERNODE_CACHE_SHIFT); } #define dma_is_consistent(d) (1) diff -puN include/asm-generic/dma-mapping.h~kill-l1_cache_shift_max include/asm-generic/dma-mapping.h --- devel/include/asm-generic/dma-mapping.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-generic/dma-mapping.h 2005-12-22 05:09:02.000000000 -0800 @@ -274,7 +274,7 @@ dma_get_cache_alignment(void) { /* no easy way to get cache size on all processors, so return * the maximum possible, to be safe */ - return (1 << L1_CACHE_SHIFT_MAX); + return (1 << INTERNODE_CACHE_SHIFT); } static inline void diff -puN include/asm-i386/cache.h~kill-l1_cache_shift_max include/asm-i386/cache.h --- devel/include/asm-i386/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-i386/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -10,6 +10,4 @@ #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ - #endif diff -puN include/asm-ia64/cache.h~kill-l1_cache_shift_max include/asm-ia64/cache.h --- devel/include/asm-ia64/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-ia64/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -12,8 +12,6 @@ #define L1_CACHE_SHIFT CONFIG_IA64_L1_CACHE_SHIFT #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ - #ifdef CONFIG_SMP # define SMP_CACHE_SHIFT L1_CACHE_SHIFT # define SMP_CACHE_BYTES L1_CACHE_BYTES diff -puN include/asm-m32r/cache.h~kill-l1_cache_shift_max include/asm-m32r/cache.h --- devel/include/asm-m32r/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-m32r/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -7,6 +7,4 @@ #define L1_CACHE_SHIFT 4 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#define L1_CACHE_SHIFT_MAX 4 - #endif /* _ASM_M32R_CACHE_H */ diff -puN include/asm-m68k/cache.h~kill-l1_cache_shift_max include/asm-m68k/cache.h --- devel/include/asm-m68k/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-m68k/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -8,6 +8,4 @@ #define L1_CACHE_SHIFT 4 #define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) -#define L1_CACHE_SHIFT_MAX 4 /* largest L1 which this arch supports */ - #endif diff -puN include/asm-mips/cache.h~kill-l1_cache_shift_max include/asm-mips/cache.h --- devel/include/asm-mips/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-mips/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -15,7 +15,6 @@ #define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#define L1_CACHE_SHIFT_MAX 6 #define SMP_CACHE_SHIFT L1_CACHE_SHIFT #define SMP_CACHE_BYTES L1_CACHE_BYTES diff -puN include/asm-parisc/cache.h~kill-l1_cache_shift_max include/asm-parisc/cache.h --- devel/include/asm-parisc/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-parisc/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -28,7 +28,6 @@ #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) #define SMP_CACHE_BYTES L1_CACHE_BYTES -#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */ extern void flush_data_cache_local(void); /* flushes local data-cache only */ extern void flush_instruction_cache_local(void); /* flushes local code-cache only */ diff -puN include/asm-powerpc/cache.h~kill-l1_cache_shift_max include/asm-powerpc/cache.h --- devel/include/asm-powerpc/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-powerpc/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -19,7 +19,6 @@ #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #define SMP_CACHE_BYTES L1_CACHE_BYTES -#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ #if defined(__powerpc64__) && !defined(__ASSEMBLY__) struct ppc64_caches { diff -puN include/asm-s390/cache.h~kill-l1_cache_shift_max include/asm-s390/cache.h --- devel/include/asm-s390/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-s390/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -13,7 +13,6 @@ #define L1_CACHE_BYTES 256 #define L1_CACHE_SHIFT 8 -#define L1_CACHE_SHIFT_MAX 8 /* largest L1 which this arch supports */ #define ARCH_KMALLOC_MINALIGN 8 diff -puN include/asm-sh64/cache.h~kill-l1_cache_shift_max include/asm-sh64/cache.h --- devel/include/asm-sh64/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-sh64/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -20,8 +20,6 @@ #define L1_CACHE_ALIGN_MASK (~(L1_CACHE_BYTES - 1)) #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES - 1)) & L1_CACHE_ALIGN_MASK) #define L1_CACHE_SIZE_BYTES (L1_CACHE_BYTES << 10) -/* Largest L1 which this arch supports */ -#define L1_CACHE_SHIFT_MAX 5 #ifdef MODULE #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) diff -puN include/asm-sh/cache.h~kill-l1_cache_shift_max include/asm-sh/cache.h --- devel/include/asm-sh/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-sh/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -22,8 +22,6 @@ #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) -#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */ - struct cache_info { unsigned int ways; unsigned int sets; diff -puN include/asm-sparc64/cache.h~kill-l1_cache_shift_max include/asm-sparc64/cache.h --- devel/include/asm-sparc64/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-sparc64/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -9,7 +9,6 @@ #define L1_CACHE_BYTES 32 /* Two 16-byte sub-blocks per line. */ #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) -#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */ #define SMP_CACHE_BYTES_SHIFT 6 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) /* L2 cache line size. */ diff -puN include/asm-sparc/cache.h~kill-l1_cache_shift_max include/asm-sparc/cache.h --- devel/include/asm-sparc/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-sparc/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -13,7 +13,6 @@ #define L1_CACHE_SHIFT 5 #define L1_CACHE_BYTES 32 #define L1_CACHE_ALIGN(x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))) -#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */ #define SMP_CACHE_BYTES 32 diff -puN include/asm-um/cache.h~kill-l1_cache_shift_max include/asm-um/cache.h --- devel/include/asm-um/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-um/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -13,9 +13,6 @@ # define L1_CACHE_SHIFT 5 #endif -/* XXX: this is valid for x86 and x86_64. */ -#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ - #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #endif diff -puN include/asm-v850/cache.h~kill-l1_cache_shift_max include/asm-v850/cache.h --- devel/include/asm-v850/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-v850/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -23,6 +23,4 @@ #define L1_CACHE_SHIFT 4 #endif -#define L1_CACHE_SHIFT_MAX L1_CACHE_SHIFT - #endif /* __V850_CACHE_H__ */ diff -puN include/asm-x86_64/cache.h~kill-l1_cache_shift_max include/asm-x86_64/cache.h --- devel/include/asm-x86_64/cache.h~kill-l1_cache_shift_max 2005-12-22 05:09:02.000000000 -0800 +++ devel-akpm/include/asm-x86_64/cache.h 2005-12-22 05:09:02.000000000 -0800 @@ -9,7 +9,6 @@ /* L1 cache line size */ #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ #ifdef CONFIG_X86_VSMP _