From: Pierre Ossman Class code and register definitions for the Secure Digital Host Controller standard. Signed-off-by: Pierre Ossman Signed-off-by: Andrew Morton --- include/linux/pci_ids.h | 1 + include/linux/pci_regs.h | 3 +++ 2 files changed, 4 insertions(+) diff -puN include/linux/pci_ids.h~secure-digital-host-controller-id-and-regs include/linux/pci_ids.h --- devel/include/linux/pci_ids.h~secure-digital-host-controller-id-and-regs 2006-02-19 20:49:27.000000000 -0800 +++ devel-akpm/include/linux/pci_ids.h 2006-02-19 20:49:27.000000000 -0800 @@ -69,6 +69,7 @@ #define PCI_CLASS_SYSTEM_TIMER 0x0802 #define PCI_CLASS_SYSTEM_RTC 0x0803 #define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 +#define PCI_CLASS_SYSTEM_SDHCI 0x0805 #define PCI_CLASS_SYSTEM_OTHER 0x0880 #define PCI_BASE_CLASS_INPUT 0x09 diff -puN include/linux/pci_regs.h~secure-digital-host-controller-id-and-regs include/linux/pci_regs.h --- devel/include/linux/pci_regs.h~secure-digital-host-controller-id-and-regs 2006-02-19 20:49:27.000000000 -0800 +++ devel-akpm/include/linux/pci_regs.h 2006-02-19 20:49:27.000000000 -0800 @@ -108,6 +108,9 @@ #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ #define PCI_MIN_GNT 0x3e /* 8 bits */ #define PCI_MAX_LAT 0x3f /* 8 bits */ +#define PCI_SLOT_INFO 0x40 /* 8 bits */ +#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) +#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 /* Header type 1 (PCI-to-PCI bridges) */ #define PCI_PRIMARY_BUS 0x18 /* Primary bus number */ _