From: Zwane Mwaikambo tsc_disable was marked __initdata so we were accessing random data (which happened to have a set bit) so upon warm cpu online we would disable the TSC, resulting in the following. Nathan does this fix your triple fault? root@arusha cpu1 {0:0} echo 1 > online Booting processor 1/1 eip 3000 Disabling TSC... Calibrating delay using timer specific routine.. 797.62 BogoMIPS (lpj=3988115) CPU1: Intel Pentium II (Deschutes) stepping 02 migration_cost=2595 root@arusha cpu1 {0:0} ps PID TTY TIME CMD 2432 ttyS0 00:00:00 tcsh 2490 ttyS0 00:00:00 ps root@arusha cpu1 {0:0} ps Segmentation fault root@arusha cpu1 {0:139} Signed-ff-by: Zwane Mwaikambo Cc: john stultz Signed-off-by: Andrew Morton --- arch/i386/kernel/tsc.c | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) diff -puN arch/i386/kernel/tsc.c~time-i386-conversion-part-2-rework-tsc-support-section-fix arch/i386/kernel/tsc.c --- devel/arch/i386/kernel/tsc.c~time-i386-conversion-part-2-rework-tsc-support-section-fix 2006-02-21 13:35:05.000000000 -0800 +++ devel-akpm/arch/i386/kernel/tsc.c 2006-02-21 13:35:05.000000000 -0800 @@ -21,7 +21,7 @@ */ unsigned int tsc_khz; -int tsc_disable __initdata = 0; +int tsc_disable __cpuinitdata = 0; #ifdef CONFIG_X86_TSC static int __init tsc_setup(char *str) _