GIT 8d0e1c1acac143cb2c3c8c4a46e48c5a0d81dce9 git+ssh://master.kernel.org/home/rmk/linux-2.6-arm.git commit 8d0e1c1acac143cb2c3c8c4a46e48c5a0d81dce9 Author: Russell King Date: Fri Apr 7 10:16:55 2006 +0100 [ARM] Fix ebsa110 debug macros Was including debug-8250.h rather than debug-8250.S Signed-off-by: Russell King commit 0fe25712c40b394438437fbcf86fd40d086a7098 Author: Russell King Date: Tue Apr 4 21:47:43 2006 +0100 [ARM] Move FLUSH_BASE macros to asm/arch/memory.h FLUSH_BASE must be visible to arch/arm/mm/init.c in order for the memory region to be setup. Move these definitions from asm-arm/arch-*/hardware.h into asm-arm/arch-*/memory.h where mm stuff can see them. Signed-off-by: Russell King commit 7d12963757b9170f162f317b7461353c5fb574e8 Author: Russell King Date: Tue Apr 4 16:25:47 2006 +0100 [ARM] Remove unnecessary extra parens in include/asm-arm/memory.h Signed-off-by: Russell King commit 0da323505fc7dd6b01d35e6181cb3d45f992726a Author: KAMEZAWA Hiroyuki Date: Tue Apr 4 16:06:00 2006 +0100 [ARM] arm's arch_local_page_offset() fix against 2.6.17-rc1 This patch fixes arch_local_page_offset(pfn,nid) in arm. This new one (added by unify_pfn_to_page patches) is obviously buggy. This macro calculate page offset in a node. Note: about LOCAL_MAP_NR() comment in arm's sub-archs says... /* * Given a kaddr, LOCAL_MAP_NR finds the owning node of the memory * and returns the index corresponding to the appropriate page in the * node's mem_map. */ but LOCAL_MAP_NR() is designed to be able to take both paddr and kaddr. In this case, paddr is better. Signed-off-by: KAMEZAWA Hiroyuki Signed-off-by: Russell King --- diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 8827912..41dc0bc 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -20,6 +20,7 @@ #include #include +#include #include #include @@ -455,14 +456,14 @@ static void __init devicemaps_init(struc #ifdef FLUSH_BASE map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS); map.virtual = FLUSH_BASE; - map.length = PGDIR_SIZE; + map.length = SZ_1M; map.type = MT_CACHECLEAN; create_mapping(&map); #endif #ifdef FLUSH_BASE_MINICACHE - map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + PGDIR_SIZE); + map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + SZ_1M); map.virtual = FLUSH_BASE_MINICACHE; - map.length = PGDIR_SIZE; + map.length = SZ_1M; map.type = MT_MINICLEAN; create_mapping(&map); #endif @@ -530,7 +531,7 @@ static inline void free_area(unsigned lo for (; addr < end; addr += PAGE_SIZE) { struct page *page = virt_to_page(addr); ClearPageReserved(page); - init_page_count(page); + set_page_count(page, 1); free_page(addr); totalram_pages++; } diff --git a/include/asm-arm/arch-cl7500/hardware.h b/include/asm-arm/arch-cl7500/hardware.h index 2339b76..1adfd18 100644 --- a/include/asm-arm/arch-cl7500/hardware.h +++ b/include/asm-arm/arch-cl7500/hardware.h @@ -53,16 +53,12 @@ #define SCREEN_END 0xdfc00000 #define SCREEN_BASE 0xdf800000 -#define FLUSH_BASE 0xdf000000 - #define VIDC_BASE (void __iomem *)0xe0400000 #define IOMD_BASE IOMEM(0xe0200000) #define IOC_BASE IOMEM(0xe0200000) #define FLOPPYDMA_BASE IOMEM(0xe002a000) #define PCIO_BASE IOMEM(0xe0010000) -#define FLUSH_BASE_PHYS 0x00000000 /* ROM */ - #define vidc_writel(val) __raw_writel(val, VIDC_BASE) /* in/out bias for the ISA slot region */ diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h index 34f40a6..3178140 100644 --- a/include/asm-arm/arch-cl7500/memory.h +++ b/include/asm-arm/arch-cl7500/memory.h @@ -26,4 +26,10 @@ #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) +/* + * Cache flushing area - ROM + */ +#define FLUSH_BASE_PHYS 0x00000000 +#define FLUSH_BASE 0xdf000000 + #endif diff --git a/include/asm-arm/arch-ebsa110/debug-macro.S b/include/asm-arm/arch-ebsa110/debug-macro.S index f61cada..9213bfe 100644 --- a/include/asm-arm/arch-ebsa110/debug-macro.S +++ b/include/asm-arm/arch-ebsa110/debug-macro.S @@ -18,4 +18,4 @@ #define UART_SHIFT 2 #define FLOW_CONTROL -#include +#include diff --git a/include/asm-arm/arch-ebsa110/hardware.h b/include/asm-arm/arch-ebsa110/hardware.h index 4e41c23..3ce864d 100644 --- a/include/asm-arm/arch-ebsa110/hardware.h +++ b/include/asm-arm/arch-ebsa110/hardware.h @@ -57,9 +57,6 @@ /* * RAM definitions */ -#define FLUSH_BASE_PHYS 0x40000000 -#define FLUSH_BASE 0xdf000000 - #define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */ #endif diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h index 02f1445..c7c500e 100644 --- a/include/asm-arm/arch-ebsa110/memory.h +++ b/include/asm-arm/arch-ebsa110/memory.h @@ -28,4 +28,10 @@ #define __virt_to_bus(x) (x) #define __bus_to_virt(x) (x) +/* + * Cache flushing area - SRAM + */ +#define FLUSH_BASE_PHYS 0x40000000 +#define FLUSH_BASE 0xdf000000 + #endif diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h index 2ef2200..ec51fe9 100644 --- a/include/asm-arm/arch-ebsa285/hardware.h +++ b/include/asm-arm/arch-ebsa285/hardware.h @@ -48,9 +48,6 @@ #define PCICFG0_SIZE 0x01000000 #define PCICFG0_BASE 0xfa000000 -#define FLUSH_SIZE 0x00100000 -#define FLUSH_BASE 0xf9000000 - #define PCIMEM_SIZE 0x01000000 #define PCIMEM_BASE 0xf0000000 @@ -61,9 +58,6 @@ #define PCIMEM_SIZE 0x80000000 #define PCIMEM_BASE 0x80000000 -#define FLUSH_SIZE 0x00100000 -#define FLUSH_BASE 0x7e000000 - #define WFLUSH_SIZE 0x01000000 #define WFLUSH_BASE 0x7d000000 @@ -94,7 +88,6 @@ #define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5)) #define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6)) -#define FLUSH_BASE_PHYS 0x50000000 #define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108) diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h index 09e335c..99181ff 100644 --- a/include/asm-arm/arch-ebsa285/memory.h +++ b/include/asm-arm/arch-ebsa285/memory.h @@ -49,12 +49,22 @@ extern unsigned long __bus_to_virt(unsig #define TASK_SIZE UL(0xbf000000) #define PAGE_OFFSET UL(0xc0000000) +/* + * Cache flushing area. + */ +#define FLUSH_BASE 0xf9000000 + #elif defined(CONFIG_ARCH_CO285) /* Task size and page offset at 1.5GB */ #define TASK_SIZE UL(0x5f000000) #define PAGE_OFFSET UL(0x60000000) +/* + * Cache flushing area. + */ +#define FLUSH_BASE 0x7e000000 + #else #error "Undefined footbridge architecture" @@ -72,4 +82,6 @@ extern unsigned long __bus_to_virt(unsig */ #define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3) +#define FLUSH_BASE_PHYS 0x50000000 + #endif diff --git a/include/asm-arm/arch-l7200/hardware.h b/include/asm-arm/arch-l7200/hardware.h index b755079..2ab43f3 100644 --- a/include/asm-arm/arch-l7200/hardware.h +++ b/include/asm-arm/arch-l7200/hardware.h @@ -52,9 +52,6 @@ #define ISA_SIZE 0x20000000 #define ISA_BASE 0xe0000000 -#define FLUSH_BASE_PHYS 0x40000000 /* ROM */ -#define FLUSH_BASE 0xdf000000 - #define PCIO_BASE IO_BASE #endif diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h index 9e50a17..402df63 100644 --- a/include/asm-arm/arch-l7200/memory.h +++ b/include/asm-arm/arch-l7200/memory.h @@ -20,4 +20,10 @@ #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) +/* + * Cache flushing area - ROM + */ +#define FLUSH_BASE_PHYS 0x40000000 +#define FLUSH_BASE 0xdf000000 + #endif diff --git a/include/asm-arm/arch-rpc/hardware.h b/include/asm-arm/arch-rpc/hardware.h index 9d7f873..7480f4e 100644 --- a/include/asm-arm/arch-rpc/hardware.h +++ b/include/asm-arm/arch-rpc/hardware.h @@ -46,7 +46,6 @@ #define SCREEN_END 0xdfc00000 #define SCREEN_BASE 0xdf800000 -#define FLUSH_BASE 0xdf000000 #define UNCACHEABLE_ADDR 0xdf010000 /* @@ -59,8 +58,6 @@ #define PCIO_BASE IOMEM(0xe0010000) #define FLOPPYDMA_BASE IOMEM(0xe002a000) -#define FLUSH_BASE_PHYS 0x00000000 /* ROM */ - #define vidc_writel(val) __raw_writel(val, VIDC_BASE) #define IO_EC_EASI_BASE 0x81400000 diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h index 0592cb3..303c424 100644 --- a/include/asm-arm/arch-rpc/memory.h +++ b/include/asm-arm/arch-rpc/memory.h @@ -30,4 +30,10 @@ #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) +/* + * Cache flushing area - ROM + */ +#define FLUSH_BASE_PHYS 0x00000000 +#define FLUSH_BASE 0xdf000000 + #endif diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index 28711aa..ee008a5 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -14,10 +14,6 @@ #include -/* Flushing areas */ -#define FLUSH_BASE_PHYS 0xe0000000 /* SA1100 zero bank */ -#define FLUSH_BASE 0xf5000000 -#define FLUSH_BASE_MINICACHE 0xf5800000 #define UNCACHEABLE_ADDR 0xfa050000 diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h index 018a9f0..a29fac1 100644 --- a/include/asm-arm/arch-sa1100/memory.h +++ b/include/asm-arm/arch-sa1100/memory.h @@ -91,4 +91,11 @@ void sa1111_adjust_zones(int node, unsig #endif +/* + * Cache flushing area - SA1100 zero bank + */ +#define FLUSH_BASE_PHYS 0xe0000000 +#define FLUSH_BASE 0xf5000000 +#define FLUSH_BASE_MINICACHE 0xf5100000 + #endif diff --git a/include/asm-arm/arch-shark/hardware.h b/include/asm-arm/arch-shark/hardware.h index 4d35f8c..ecba452 100644 --- a/include/asm-arm/arch-shark/hardware.h +++ b/include/asm-arm/arch-shark/hardware.h @@ -17,11 +17,6 @@ */ #define IO_BASE 0xe0000000 -/* - * RAM definitions - */ -#define FLUSH_BASE_PHYS 0x80000000 - #else #define IO_BASE 0 @@ -33,7 +28,6 @@ #define ROMCARD_SIZE 0x08000000 #define ROMCARD_START 0x10000000 -#define FLUSH_BASE 0xdf000000 #define PCIO_BASE 0xe0000000 diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h index 95a29b4..6968d61 100644 --- a/include/asm-arm/arch-shark/memory.h +++ b/include/asm-arm/arch-shark/memory.h @@ -39,4 +39,10 @@ static inline void __arch_adjust_zones(i #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) +/* + * Cache flushing area + */ +#define FLUSH_BASE_PHYS 0x80000000 +#define FLUSH_BASE 0xdf000000 + #endif diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index 2b3cf69..2092894 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -172,10 +172,10 @@ static inline __deprecated void *bus_to_ * virt_addr_valid(k) indicates whether a virtual address is valid */ #ifndef CONFIG_DISCONTIGMEM -#define ARCH_PFN_OFFSET (PHYS_PFN_OFFSET) +#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET #define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr)) -#define virt_to_page(kaddr) (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)) +#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) #define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) #define PHYS_TO_NID(addr) (0) @@ -187,8 +187,8 @@ static inline __deprecated void *bus_to_ * around in memory. */ #include -#define arch_pfn_to_nid(pfn) (PFN_TO_NID(pfn)) -#define arch_local_page_offset(pfn, nid) (LOCAL_MAP_NR((pfn) << PAGE_OFFSET)) +#define arch_pfn_to_nid(pfn) PFN_TO_NID(pfn) +#define arch_local_page_offset(pfn, nid) LOCAL_MAP_NR((pfn) << PAGE_SHIFT) #define pfn_valid(pfn) \ ({ \