From: Andrew Morton whitespace went a bit berzerk there. Signed-off-by: Antonino Daplas Cc: Signed-off-by: Andrew Morton --- drivers/video/savage/savagefb_driver.c | 259 +++++++++++------------ 1 files changed, 130 insertions(+), 129 deletions(-) diff -puN drivers/video/savage/savagefb_driver.c~savagefb-add-state-save-and_restore-hooks-tidy drivers/video/savage/savagefb_driver.c --- devel/drivers/video/savage/savagefb_driver.c~savagefb-add-state-save-and_restore-hooks-tidy 2006-04-22 01:08:40.000000000 -0700 +++ devel-akpm/drivers/video/savage/savagefb_driver.c 2006-04-22 01:08:40.000000000 -0700 @@ -305,7 +305,7 @@ savage2000_waitidle(struct savagefb_par while ((savage_in32(0x48C60, par) & 0x009fffff)); } -#if defined(CONFIG_FB_SAVAGE_ACCEL) +#ifdef CONFIG_FB_SAVAGE_ACCEL static void SavageSetup2DEngine (struct savagefb_par *par) { @@ -390,15 +390,15 @@ SavageSetup2DEngine (struct savagefb_par static void savagefb_set_clip(struct fb_info *info) { - struct savagefb_par *par = (struct savagefb_par *)info->par; - int cmd; + struct savagefb_par *par = info->par; + int cmd; - cmd = BCI_CMD_NOP | BCI_CMD_CLIP_NEW; - par->bci_ptr = 0; - par->SavageWaitFifo(par,3); - BCI_SEND(cmd); - BCI_SEND(BCI_CLIP_TL(0, 0)); - BCI_SEND(BCI_CLIP_BR(0xfff, 0xfff)); + cmd = BCI_CMD_NOP | BCI_CMD_CLIP_NEW; + par->bci_ptr = 0; + par->SavageWaitFifo(par,3); + BCI_SEND(cmd); + BCI_SEND(BCI_CLIP_TL(0, 0)); + BCI_SEND(BCI_CLIP_BR(0xfff, 0xfff)); } #else static void SavageSetup2DEngine (struct savagefb_par *par) {} @@ -682,143 +682,144 @@ static void savage_get_default_par(struc vga_out8 (0x3d5, cr66, par); } -static void savage_set_default_par(struct savagefb_par *par, struct savage_reg *reg) +static void savage_set_default_par(struct savagefb_par *par, + struct savage_reg *reg) { unsigned char cr3a, cr53, cr66; - vga_out16 (0x3d4, 0x4838, par); - vga_out16 (0x3d4, 0xa039, par); - vga_out16 (0x3c4, 0x0608, par); - - vga_out8 (0x3d4, 0x66, par); - cr66 = vga_in8 (0x3d5, par); - vga_out8 (0x3d5, cr66 | 0x80, par); - vga_out8 (0x3d4, 0x3a, par); - cr3a = vga_in8 (0x3d5, par); - vga_out8 (0x3d5, cr3a | 0x80, par); - vga_out8 (0x3d4, 0x53, par); - cr53 = vga_in8 (0x3d5, par); - vga_out8 (0x3d5, cr53 & 0x7f, par); - - vga_out8 (0x3d4, 0x66, par); - vga_out8 (0x3d5, cr66, par); - vga_out8 (0x3d4, 0x3a, par); - vga_out8 (0x3d5, cr3a, par); + vga_out16(0x3d4, 0x4838, par); + vga_out16(0x3d4, 0xa039, par); + vga_out16(0x3c4, 0x0608, par); - vga_out8 (0x3d4, 0x66, par); - vga_out8 (0x3d5, cr66, par); - vga_out8 (0x3d4, 0x3a, par); - vga_out8 (0x3d5, cr3a, par); + vga_out8(0x3d4, 0x66, par); + cr66 = vga_in8(0x3d5, par); + vga_out8(0x3d5, cr66 | 0x80, par); + vga_out8(0x3d4, 0x3a, par); + cr3a = vga_in8(0x3d5, par); + vga_out8(0x3d5, cr3a | 0x80, par); + vga_out8(0x3d4, 0x53, par); + cr53 = vga_in8(0x3d5, par); + vga_out8(0x3d5, cr53 & 0x7f, par); + + vga_out8(0x3d4, 0x66, par); + vga_out8(0x3d5, cr66, par); + vga_out8(0x3d4, 0x3a, par); + vga_out8(0x3d5, cr3a, par); + + vga_out8(0x3d4, 0x66, par); + vga_out8(0x3d5, cr66, par); + vga_out8(0x3d4, 0x3a, par); + vga_out8(0x3d5, cr3a, par); /* unlock extended seq regs */ - vga_out8 (0x3c4, 0x08, par); - vga_out8 (0x3c5, reg->SR08, par); - vga_out8 (0x3c5, 0x06, par); + vga_out8(0x3c4, 0x08, par); + vga_out8(0x3c5, reg->SR08, par); + vga_out8(0x3c5, 0x06, par); /* now restore all the extended regs we need */ - vga_out8 (0x3d4, 0x31, par); - vga_out8 (0x3d5, reg->CR31, par); - vga_out8 (0x3d4, 0x32, par); - vga_out8 (0x3d5, reg->CR32, par); - vga_out8 (0x3d4, 0x34, par); - vga_out8 (0x3d5, reg->CR34, par); - vga_out8 (0x3d4, 0x36, par); - vga_out8 (0x3d5,reg->CR36, par); - vga_out8 (0x3d4, 0x3a, par); - vga_out8 (0x3d5, reg->CR3A, par); - vga_out8 (0x3d4, 0x40, par); - vga_out8 (0x3d5, reg->CR40, par); - vga_out8 (0x3d4, 0x42, par); - vga_out8 (0x3d5, reg->CR42, par); - vga_out8 (0x3d4, 0x45, par); - vga_out8 (0x3d5, reg->CR45, par); - vga_out8 (0x3d4, 0x50, par); - vga_out8 (0x3d5, reg->CR50, par); - vga_out8 (0x3d4, 0x51, par); - vga_out8 (0x3d5, reg->CR51, par); - vga_out8 (0x3d4, 0x53, par); - vga_out8 (0x3d5, reg->CR53, par); - vga_out8 (0x3d4, 0x58, par); - vga_out8 (0x3d5, reg->CR58, par); - vga_out8 (0x3d4, 0x60, par); - vga_out8 (0x3d5, reg->CR60, par); - vga_out8 (0x3d4, 0x66, par); - vga_out8 (0x3d5, reg->CR66, par); - vga_out8 (0x3d4, 0x67, par); - vga_out8 (0x3d5, reg->CR67, par); - vga_out8 (0x3d4, 0x68, par); - vga_out8 (0x3d5, reg->CR68, par); - vga_out8 (0x3d4, 0x69, par); - vga_out8 (0x3d5, reg->CR69, par); - vga_out8 (0x3d4, 0x6f, par); - vga_out8 (0x3d5, reg->CR6F, par); - - vga_out8 (0x3d4, 0x33, par); - vga_out8 (0x3d5, reg->CR33, par); - vga_out8 (0x3d4, 0x86, par); - vga_out8 (0x3d5, reg->CR86, par); - vga_out8 (0x3d4, 0x88, par); - vga_out8 (0x3d5, reg->CR88, par); - vga_out8 (0x3d4, 0x90, par); - vga_out8 (0x3d5, reg->CR90, par); - vga_out8 (0x3d4, 0x91, par); - vga_out8 (0x3d5, reg->CR91, par); - vga_out8 (0x3d4, 0xb0, par); - vga_out8 (0x3d5, reg->CRB0, par); + vga_out8(0x3d4, 0x31, par); + vga_out8(0x3d5, reg->CR31, par); + vga_out8(0x3d4, 0x32, par); + vga_out8(0x3d5, reg->CR32, par); + vga_out8(0x3d4, 0x34, par); + vga_out8(0x3d5, reg->CR34, par); + vga_out8(0x3d4, 0x36, par); + vga_out8(0x3d5,reg->CR36, par); + vga_out8(0x3d4, 0x3a, par); + vga_out8(0x3d5, reg->CR3A, par); + vga_out8(0x3d4, 0x40, par); + vga_out8(0x3d5, reg->CR40, par); + vga_out8(0x3d4, 0x42, par); + vga_out8(0x3d5, reg->CR42, par); + vga_out8(0x3d4, 0x45, par); + vga_out8(0x3d5, reg->CR45, par); + vga_out8(0x3d4, 0x50, par); + vga_out8(0x3d5, reg->CR50, par); + vga_out8(0x3d4, 0x51, par); + vga_out8(0x3d5, reg->CR51, par); + vga_out8(0x3d4, 0x53, par); + vga_out8(0x3d5, reg->CR53, par); + vga_out8(0x3d4, 0x58, par); + vga_out8(0x3d5, reg->CR58, par); + vga_out8(0x3d4, 0x60, par); + vga_out8(0x3d5, reg->CR60, par); + vga_out8(0x3d4, 0x66, par); + vga_out8(0x3d5, reg->CR66, par); + vga_out8(0x3d4, 0x67, par); + vga_out8(0x3d5, reg->CR67, par); + vga_out8(0x3d4, 0x68, par); + vga_out8(0x3d5, reg->CR68, par); + vga_out8(0x3d4, 0x69, par); + vga_out8(0x3d5, reg->CR69, par); + vga_out8(0x3d4, 0x6f, par); + vga_out8(0x3d5, reg->CR6F, par); + + vga_out8(0x3d4, 0x33, par); + vga_out8(0x3d5, reg->CR33, par); + vga_out8(0x3d4, 0x86, par); + vga_out8(0x3d5, reg->CR86, par); + vga_out8(0x3d4, 0x88, par); + vga_out8(0x3d5, reg->CR88, par); + vga_out8(0x3d4, 0x90, par); + vga_out8(0x3d5, reg->CR90, par); + vga_out8(0x3d4, 0x91, par); + vga_out8(0x3d5, reg->CR91, par); + vga_out8(0x3d4, 0xb0, par); + vga_out8(0x3d5, reg->CRB0, par); /* extended mode timing regs */ - vga_out8 (0x3d4, 0x3b, par); - vga_out8 (0x3d5, reg->CR3B, par); - vga_out8 (0x3d4, 0x3c, par); - vga_out8 (0x3d5, reg->CR3C, par); - vga_out8 (0x3d4, 0x43, par); - vga_out8 (0x3d5, reg->CR43, par); - vga_out8 (0x3d4, 0x5d, par); - vga_out8 (0x3d5, reg->CR5D, par); - vga_out8 (0x3d4, 0x5e, par); - vga_out8 (0x3d5, reg->CR5E, par); - vga_out8 (0x3d4, 0x65, par); - vga_out8 (0x3d5, reg->CR65, par); + vga_out8(0x3d4, 0x3b, par); + vga_out8(0x3d5, reg->CR3B, par); + vga_out8(0x3d4, 0x3c, par); + vga_out8(0x3d5, reg->CR3C, par); + vga_out8(0x3d4, 0x43, par); + vga_out8(0x3d5, reg->CR43, par); + vga_out8(0x3d4, 0x5d, par); + vga_out8(0x3d5, reg->CR5D, par); + vga_out8(0x3d4, 0x5e, par); + vga_out8(0x3d5, reg->CR5E, par); + vga_out8(0x3d4, 0x65, par); + vga_out8(0x3d5, reg->CR65, par); /* save seq extended regs for DCLK PLL programming */ - vga_out8 (0x3c4, 0x0e, par); - vga_out8 (0x3c5, reg->SR0E, par); - vga_out8 (0x3c4, 0x0f, par); - vga_out8 (0x3c5, reg->SR0F, par); - vga_out8 (0x3c4, 0x10, par); - vga_out8 (0x3c5, reg->SR10, par); - vga_out8 (0x3c4, 0x11, par); - vga_out8 (0x3c5, reg->SR11, par); - vga_out8 (0x3c4, 0x12, par); - vga_out8 (0x3c5, reg->SR12, par); - vga_out8 (0x3c4, 0x13, par); - vga_out8 (0x3c5, reg->SR13, par); - vga_out8 (0x3c4, 0x29, par); - vga_out8 (0x3c5, reg->SR29, par); - - vga_out8 (0x3c4, 0x15, par); - vga_out8 (0x3c5, reg->SR15, par); - vga_out8 (0x3c4, 0x30, par); - vga_out8 (0x3c5, reg->SR30, par); - vga_out8 (0x3c4, 0x18, par); - vga_out8 (0x3c5, reg->SR18, par); + vga_out8(0x3c4, 0x0e, par); + vga_out8(0x3c5, reg->SR0E, par); + vga_out8(0x3c4, 0x0f, par); + vga_out8(0x3c5, reg->SR0F, par); + vga_out8(0x3c4, 0x10, par); + vga_out8(0x3c5, reg->SR10, par); + vga_out8(0x3c4, 0x11, par); + vga_out8(0x3c5, reg->SR11, par); + vga_out8(0x3c4, 0x12, par); + vga_out8(0x3c5, reg->SR12, par); + vga_out8(0x3c4, 0x13, par); + vga_out8(0x3c5, reg->SR13, par); + vga_out8(0x3c4, 0x29, par); + vga_out8(0x3c5, reg->SR29, par); + + vga_out8(0x3c4, 0x15, par); + vga_out8(0x3c5, reg->SR15, par); + vga_out8(0x3c4, 0x30, par); + vga_out8(0x3c5, reg->SR30, par); + vga_out8(0x3c4, 0x18, par); + vga_out8(0x3c5, reg->SR18, par); /* Save flat panel expansion regsters. */ if (par->chip == S3_SAVAGE_MX) { int i; for (i = 0; i < 8; i++) { - vga_out8 (0x3c4, 0x54+i, par); - vga_out8 (0x3c5, reg->SR54[i], par); + vga_out8(0x3c4, 0x54+i, par); + vga_out8(0x3c5, reg->SR54[i], par); } } - vga_out8 (0x3d4, 0x66, par); - cr66 = vga_in8 (0x3d5, par); - vga_out8 (0x3d5, cr66 | 0x80, par); - vga_out8 (0x3d4, 0x3a, par); - cr3a = vga_in8 (0x3d5, par); - vga_out8 (0x3d5, cr3a | 0x80, par); + vga_out8(0x3d4, 0x66, par); + cr66 = vga_in8(0x3d5, par); + vga_out8(0x3d5, cr66 | 0x80, par); + vga_out8(0x3d4, 0x3a, par); + cr3a = vga_in8(0x3d5, par); + vga_out8(0x3d5, cr3a | 0x80, par); /* now save MIU regs */ if (par->chip != S3_SAVAGE_MX) { @@ -828,10 +829,10 @@ static void savage_set_default_par(struc savage_out32(MISC_TIMEOUT_REG, reg->MMPR3, par); } - vga_out8 (0x3d4, 0x3a, par); - vga_out8 (0x3d5, cr3a, par); - vga_out8 (0x3d4, 0x66, par); - vga_out8 (0x3d5, cr66, par); + vga_out8(0x3d4, 0x3a, par); + vga_out8(0x3d5, cr3a, par); + vga_out8(0x3d4, 0x66, par); + vga_out8(0x3d5, cr66, par); } static void savage_update_var(struct fb_var_screeninfo *var, struct fb_videomode *modedb) _