From: Alan Cox A couple of cases were mishandled by the PIIX driver because of wrong entries in tables. This caused some ICH chips to select UDMA33 not the correct higher UDMA speed. It could also cause the original ICH to select a mode the controller didn't support and then fail on boot. Signed-off-by: Alan Cox Signed-off-by: Andrew Morton --- drivers/scsi/ata_piix.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff -puN drivers/scsi/ata_piix.c~fixes-for-piix-driver drivers/scsi/ata_piix.c --- a/drivers/scsi/ata_piix.c~fixes-for-piix-driver +++ a/drivers/scsi/ata_piix.c @@ -93,7 +93,7 @@ #include #define DRV_NAME "ata_piix" -#define DRV_VERSION "2.00ac5" +#define DRV_VERSION "2.00ac6" enum { PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ @@ -412,7 +412,7 @@ static struct ata_port_info piix_port_in .host_flags = ATA_FLAG_SRST | ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio 0-4 */ .mwdma_mask = 0x06, /* Check: maybe 0x07 */ - .udma_mask = ATA_UDMA6, /* UDMA133 */ + .udma_mask = ATA_UDMA2, /* UDMA33 */ .port_ops = &ich_pata_ops, }, /* ich_pata_66: 2 ICH controllers up to 66MHz */ @@ -431,8 +431,8 @@ static struct ata_port_info piix_port_in .host_flags = ATA_FLAG_SRST | ATA_FLAG_SLAVE_POSS | PIIX_FLAG_CHECKINTR, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x06, /* mwdma1-2 */ - .udma_mask = 0x3f, /* udma0-5 */ - .port_ops = &piix_pata_ops, + .udma_mask = ATA_UDMA5, /* udma0-5 */ + .port_ops = &ich_pata_ops, }, /* ich_pata_133: 4 ICH with full UDMA6 */ _