From: Andrew Morton Cc: Cc: "Komal Shah" Signed-off-by: Andrew Morton --- drivers/char/watchdog/Kconfig | 4 +-- drivers/char/watchdog/omap_wdt.c | 34 +++++++++++++++++------------ 2 files changed, 22 insertions(+), 16 deletions(-) diff -puN drivers/char/watchdog/Kconfig~omap-add-watchdog-driver-support-tweaks drivers/char/watchdog/Kconfig --- a/drivers/char/watchdog/Kconfig~omap-add-watchdog-driver-support-tweaks +++ a/drivers/char/watchdog/Kconfig @@ -180,8 +180,8 @@ config OMAP_WATCHDOG tristate "OMAP Watchdog" depends on WATCHDOG && (ARCH_OMAP16XX || ARCH_OMAP24XX) help - Support for TI OMAP1610/OMAP1710/OMAP2420 watchdog. Say 'Y' here to enable the - OMAP1610/OMAP1710 watchdog timer. + Support for TI OMAP1610/OMAP1710/OMAP2420 watchdog. Say 'Y' here to + enable the OMAP1610/OMAP1710 watchdog timer. # X86 (i386 + ia64 + x86_64) Architecture diff -puN drivers/char/watchdog/omap_wdt.c~omap-add-watchdog-driver-support-tweaks drivers/char/watchdog/omap_wdt.c --- a/drivers/char/watchdog/omap_wdt.c~omap-add-watchdog-driver-support-tweaks +++ a/drivers/char/watchdog/omap_wdt.c @@ -65,11 +65,13 @@ static unsigned int wdt_trgr_pattern = 0 static void omap_wdt_ping(void) { /* wait for posted write to complete */ - while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08); + while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) + cpu_relax(); wdt_trgr_pattern = ~wdt_trgr_pattern; omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR)); /* wait for posted write to complete */ - while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08); + while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) + cpu_relax(); /* reloaded WCRR from WLDR */ } @@ -77,18 +79,22 @@ static void omap_wdt_enable(void) { /* Sequence to enable the watchdog */ omap_writel(0xBBBB, OMAP_WATCHDOG_SPR); - while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) ; + while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) + cpu_relax(); omap_writel(0x4444, OMAP_WATCHDOG_SPR); - while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) ; + while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) + cpu_relax(); } static void omap_wdt_disable(void) { /* sequence required to disable watchdog */ omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */ - while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) ; + while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) + cpu_relax(); omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */ - while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) ; + while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) + cpu_relax(); } static void omap_wdt_adjust_timeout(unsigned new_timeout) @@ -106,10 +112,10 @@ static void omap_wdt_set_timeout(void) /* just count up at 32 KHz */ while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04) - continue; + cpu_relax(); omap_writel(pre_margin, OMAP_WATCHDOG_LDR); while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04) - continue; + cpu_relax(); } /* @@ -125,16 +131,16 @@ static int omap_wdt_open(struct inode *i clk_enable(armwdt_ck); /* Enable the clock */ if (cpu_is_omap24xx()) { - clk_enable(mpu_wdt_ick); /* Enable the interface clock */ - clk_enable(mpu_wdt_fck); /* Enable the functional clock */ + clk_enable(mpu_wdt_ick); /* Enable the interface clock */ + clk_enable(mpu_wdt_fck); /* Enable the functional clock */ } /* initialize prescaler */ while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01) - continue; + cpu_relax(); omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL); while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01) - continue; + cpu_relax(); omap_wdt_set_timeout(); omap_wdt_enable(); @@ -171,8 +177,8 @@ static int omap_wdt_release(struct inode } static ssize_t -omap_wdt_write(struct file *file, const char __user * data, - size_t len, loff_t * ppos) +omap_wdt_write(struct file *file, const char __user *data, + size_t len, loff_t *ppos) { /* Refresh LOAD_TIME. */ if (len) _