From: "H. Peter Anvin" All Transmeta CPUs ever produced have constant-rate TSCs. Signed-off-by: H. Peter Anvin Cc: Andi Kleen Signed-off-by: Andrew Morton --- arch/i386/kernel/cpu/transmeta.c | 3 +++ 1 file changed, 3 insertions(+) diff -puN arch/i386/kernel/cpu/transmeta.c~all-transmeta-cpus-have-constant-tscs arch/i386/kernel/cpu/transmeta.c --- a/arch/i386/kernel/cpu/transmeta.c~all-transmeta-cpus-have-constant-tscs +++ a/arch/i386/kernel/cpu/transmeta.c @@ -72,6 +72,9 @@ static void __cpuinit init_transmeta(str wrmsr(0x80860004, ~0, uk); c->x86_capability[0] = cpuid_edx(0x00000001); wrmsr(0x80860004, cap_mask, uk); + + /* All Transmeta CPUs have a constant TSC */ + set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); /* If we can run i686 user-space code, call us an i686 */ #define USER686 (X86_FEATURE_TSC|X86_FEATURE_CX8|X86_FEATURE_CMOV) _