From: Thomas Gleixner Some systems have a HPET which is not incrementing, which leads to a complete hang. Detect it during HPET setup. Signed-off-by: Thomas Gleixner Cc: Andi Kleen Cc: john stultz Cc: Signed-off-by: Andrew Morton --- arch/i386/kernel/hpet.c | 24 +++++++++++++++++++++++- 1 files changed, 23 insertions(+), 1 deletion(-) diff -puN arch/i386/kernel/hpet.c~i386-hpet-check-if-the-counter-works arch/i386/kernel/hpet.c --- a/arch/i386/kernel/hpet.c~i386-hpet-check-if-the-counter-works +++ a/arch/i386/kernel/hpet.c @@ -226,7 +226,8 @@ int __init hpet_enable(void) { unsigned long id; uint64_t hpet_freq; - u64 tmp; + u64 tmp, start, now; + cycle_t t1; if (!is_hpet_capable()) return 0; @@ -273,6 +274,27 @@ int __init hpet_enable(void) /* Start the counter */ hpet_start_counter(); + /* Verify whether hpet counter works */ + t1 = read_hpet(); + rdtscll(start); + + /* + * We don't know the TSC frequency yet, but waiting for + * 200000 TSC cycles is safe: + * 4 GHz == 50us + * 1 GHz == 200us + */ + do { + rep_nop(); + rdtscll(now); + } while ((now - start) < 200000UL); + + if (t1 == read_hpet()) { + printk(KERN_WARNING + "HPET counter not counting. HPET disabled\n"); + goto out_nohpet; + } + /* Initialize and register HPET clocksource * * hpet period is in femto seconds per cycle _