GIT 1019765e28b20060082a719c8d34cf0522a8ac2b git://www.linux-mips.org/pub/scm/upstream.git#for-akpm commit Author: Ralf Baechle Date: Thu Nov 15 15:23:14 2007 +0000 [MIPS] Cleanup pcspeaker platform device registration. Move registration into the actual platform code instead of making a desparate attempt at sharing the hand full of likes of code in pcspeaker.c. Signed-off-by: Ralf Baechle commit 03e1522b2fafe45d7da4f3bd2601a43444cc5a38 Author: Ralf Baechle Date: Fri Mar 2 20:42:04 2007 +0000 [MIPS] MT: Scheduler support for SMT Signed-off-by: Ralf Baechle commit 2aedf85077280299826d8e09b3a5d3f2b21574b9 Author: Franck Bui-Huu Date: Thu Oct 18 09:11:17 2007 +0200 [MIPS] tlbex.c: cleanup debug code Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle commit f2da1cb53f751066b175acc4ba9a2f04f9108138 Author: Franck Bui-Huu Date: Thu Oct 18 09:11:16 2007 +0200 [MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle commit 007f159a827f6a49bb24d9533c221f92a9e5ef09 Author: Franck Bui-Huu Date: Thu Oct 18 09:11:15 2007 +0200 [MIPS] tlbex.c: cleanup include files Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle commit 2e05bfb1f3f44b69daa93726246e98aab444b151 Author: Franck Bui-Huu Date: Thu Oct 18 09:11:14 2007 +0200 [MIPS] tlbex.c: Cleanup __init usages. Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle commit 04953504d0aae7ad9fb7948a3880cac12dc3095c Author: Robert P. J. Day Date: Tue Nov 6 01:55:12 2007 -0500 Given that the corresponding source file i2c-yosemite.c file was removed in commit daa4a68f901c4d6491baa1a01f5c869a553c3f6c, and that no one else includes this file, it seems safe to delete it. Signed-off-by: Robert P. J. Day commit 46dcf37ab573a2878e53b4d4b3927fa70b1ddc88 Author: Lucas Woods Date: Tue Nov 6 07:13:47 2007 +1100 [MIPS] Remove duplicate includes. Signed-off-by: Lucas Woods Signed-off-by: Ralf Baechle commit e44cab8290f698a5f3af8f288c293e28f8b1e4a6 Author: Roel Kluin <12o3l@tiscali.nl> Date: Fri Nov 2 19:59:05 2007 +0100 [MIPS] ARC: Use strchr instead of strstr. Use strchr instead of strstr when searching for a single character Signed-off-by: Roel Kluin <12o3l@tiscali.nl> Signed-off-by: Ralf Baechle commit 904a02b209a801e76fc51e169a1140f6f8dab1d8 Author: Ralf Baechle Date: Thu Nov 15 15:23:12 2007 +0000 [MIPS] Remove useless S-cache flushes. Signed-off-by: Ralf Baechle --- commit ec9e9d123d9923fb99d3a8a7c0ecc5479a4c71a3 Author: Ralf Baechle Date: Thu Nov 15 15:23:12 2007 +0000 [MIPS] Use pte_present instead of open coded test for _PAGE_PRESENT. Signed-off-by: Ralf Baechle commit b708e6fc9f274ebaa9625bac6c4c9c5ee222052c Author: Andrew Sharp Date: Wed Oct 31 14:11:24 2007 -0700 [MIPS] Put cast inside macro instead of all the callers Since all the callers of the PHYS_TO_XKPHYS macro call with a constant, put the cast to LL inside the macro where it really should be rather than in all the callers. This makes macros like PHYS_TO_XKSEG_UNCACHED work without gcc whining. Signed-off-by: Andrew Sharp Signed-off-by: Ralf Baechle commit 5960876522420d251701222e736669a590570fd5 Author: Yoichi Yuasa Date: Thu Nov 1 21:35:39 2007 +0900 [MIPS] clean up au1xxx_irqmap.c include files Clean up au1xxx_irqmap.c include files. Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle commit 44e99efc1b0258de7c38c5e80ec9aa0cbd246aca Author: Yoichi Yuasa Date: Fri Oct 26 22:42:31 2007 +0900 [MIPS] remove unused mips_machtype Removed unused mips_machtype. These are only set but not used. Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle commit 41ff7ed17057266877235206b7c688b5e19c556c Author: Christoph Hellwig Date: Mon Oct 29 14:23:43 2007 +0000 [MIPS] CFE: Make code remotely resemble Linux code. Signed-off-by: Ralf Baechle commit 9b7e60ae2d21f7b51822f811db2f7cc66c97db5d Author: Atsushi Nemoto Date: Wed Oct 24 23:16:56 2007 +0900 [MIPS] cleanup tx39/tx49 setup code Remove some unnecessary codes, includes and files. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle commit 4e851224cf4b1dbe1f35a581bcdea1d3e5597279 Author: Maciej W. Rozycki Date: Tue Oct 23 12:43:25 2007 +0100 [MIPS] R4000/R4400 daddiu erratum workaround This complements the generic R4000/R4400 errata workaround code and adds bits for the daddiu problem. In most places it just modifies handwritten assembly code so that the assembler is allowed to use a temporary register as daddiu may now be treated as a macro that expands to a sequence of li and daddu. It is the AT register or, where AT is unavailable or used explicitly for another purpose, an explicitly-named register is selected, using the .set at= feature added recently to gas. This feature is only used if CONFIG_CPU_DADDI_WORKAROUNDS has been set, so if the workaround remains disabled, the required version of binutils stays unchanged. Similarly, daddiu instructions put in branch delay slots in noreorder fragments are now taken out of them and the assembler is allowed to reorder them itself as possible (which it does making the whole idea of scheduling them into delay slots manually questionable). Also in the very few places where such a simple conversion was not possible, a handcoded longer sequence is implemented. Other than that there are changes to code responsible for building the TLB fault and page clear/copy handlers to avoid daddiu as appropriate. These are only effective if the erratum is verified to be present at the run time. Finally there is a trivial update to __delay(), because it uses daddiu in a branch delay slot. Signed-off-by: Maciej W. Rozycki Signed-off-by: Ralf Baechle commit 432f6e46d052a5b915d3b588cbec5c5b527be808 Author: Maciej W. Rozycki Date: Tue Oct 23 12:43:11 2007 +0100 [MIPS] R4000/R4400 errata workarounds This is the gereric part of R4000/R4400 errata workarounds. They include compiler and assembler support as well as some source code modifications to address the problems with some combinations of multiply/divide+shift instructions as well as the daddi and daddiu instructions. Changes included are as follows: 1. New Kconfig options to select workarounds by platforms as necessary. 2. Arch top-level Makefile to pass necessary options to the compiler; also incompatible configurations are detected (-mno-sym32 unsupported as horribly intrusive for little gain). 3. Bug detection updated and shuffled -- the multiply/divide+shift problem is lethal enough that if not worked around it makes the kernel crash in time_init() because of a division by zero; the daddiu erratum might also trigger early potentially, though I have not observed it. On the other hand the daddi detection code requires the exception subsystem to have been initialised (and is there mainly for information). 4. r4k_daddiu_bug() added so that the existence of the erratum can be queried by code at the run time as necessary; useful for generated code like TLB fault and copy/clear page handlers. 5. __udelay() updated as it uses multiplication in inline assembly. Note that -mdaddi requires modified toolchain (which has been maintained by myself and available from my site for ~4years now -- versions covered are GCC 2.95.4 - 4.1.2 and binutils from 2.13 onwards). The -mfix-r4000 and -mfix-r4400 have been standard for a while though. Signed-off-by: Maciej W. Rozycki Signed-off-by: Ralf Baechle commit 3968723db0eb750079b57dae10f0106692c327b9 Author: Alejandro Martinez Ruiz Date: Mon Oct 22 21:36:44 2007 +0200 [MIPS] Converting most array size calculations to use ARRAY_SIZE(). Signed-off-by: Alejandro Martinez Ruiz Signed-off-by: Ralf Baechle commit adabdb347d5090665024239e4aafb229429a3b4e Author: Ralf Baechle Date: Thu Nov 15 15:23:09 2007 +0000 [MIPS] tlbex: Cleanup handling of R2 hazards in TLB handlers. Signed-off-by: Ralf Baechle commit d438faee0b97a73d22a9a85303d756c38c52987e Author: Ralf Baechle Date: Thu Nov 15 15:23:09 2007 +0000 [MIPS] Delete unused CONFIG_64BIT_CONTEXT The merge of the code to use this was never completed so delete it for the time being. Signed-off-by: Ralf Baechle commit 26d413a66e9dbde01728511489de3c9809bf6cac Author: Ralf Baechle Date: Thu Nov 15 15:23:09 2007 +0000 [MIPS] Delete unused CONFIG_DMA_IP32. The functionality of the former dma-ip32.c has been folded into dma-default.c. Signed-off-by: Ralf Baechle arch/mips/Kconfig | 51 +++-- arch/mips/Makefile | 12 +- arch/mips/au1000/common/au1xxx_irqmap.c | 21 +-- arch/mips/au1000/common/dbdma.c | 2 +- arch/mips/au1000/db1x00/init.c | 11 - arch/mips/au1000/mtx-1/init.c | 2 - arch/mips/au1000/pb1000/init.c | 2 - arch/mips/au1000/pb1100/init.c | 2 - arch/mips/au1000/pb1200/init.c | 2 - arch/mips/au1000/pb1500/init.c | 2 - arch/mips/au1000/pb1550/init.c | 2 - arch/mips/au1000/xxs1500/init.c | 2 - arch/mips/basler/excite/excite_prom.c | 2 - arch/mips/fw/arc/cmdline.c | 2 +- arch/mips/fw/cfe/cfe_api.c | 184 +++++---------- arch/mips/fw/cfe/cfe_api_int.h | 186 +++++++-------- arch/mips/gt64120/wrppmc/setup.c | 2 - arch/mips/jazz/setup.c | 7 + arch/mips/jmr3927/rbhma3100/init.c | 4 - arch/mips/jmr3927/rbhma3100/setup.c | 5 - arch/mips/kernel/cpu-bugs64.c | 47 ++-- arch/mips/kernel/genex.S | 8 +- arch/mips/kernel/kspd.c | 3 +- arch/mips/kernel/pcspeaker.c | 28 --- arch/mips/kernel/proc.c | 4 + arch/mips/kernel/rtlx.c | 1 - arch/mips/kernel/setup.c | 4 +- arch/mips/kernel/smp-mt.c | 6 +- arch/mips/kernel/smp.c | 30 +++ arch/mips/kernel/vpe.c | 1 - arch/mips/lemote/lm2e/prom.c | 2 - arch/mips/lib/csum_partial.S | 61 ++++- arch/mips/lib/memcpy-inatomic.S | 25 ++- arch/mips/lib/memcpy.S | 60 ++++- arch/mips/lib/memset.S | 11 +- arch/mips/lib/strncpy_user.S | 4 +- arch/mips/lib/uncached.c | 12 +- arch/mips/mm/c-r4k.c | 11 +- arch/mips/mm/pg-r4k.c | 66 +++--- arch/mips/mm/tlbex.c | 255 +++++++++----------- arch/mips/philips/pnx8550/common/setup.c | 2 +- arch/mips/philips/pnx8550/jbs/init.c | 3 - arch/mips/philips/pnx8550/stb810/prom_init.c | 2 - arch/mips/pmc-sierra/yosemite/i2c-yosemite.h | 96 -------- arch/mips/pmc-sierra/yosemite/prom.c | 2 - arch/mips/qemu/q-setup.c | 15 ++ arch/mips/sni/pcit.c | 7 + arch/mips/tx4927/common/Makefile | 2 +- arch/mips/tx4927/common/tx4927_setup.c | 186 -------------- .../toshiba_rbtx4927/toshiba_rbtx4927_setup.c | 41 +--- arch/mips/tx4938/common/Makefile | 2 +- arch/mips/tx4938/common/setup.c | 45 ---- arch/mips/tx4938/toshiba_rbtx4938/prom.c | 1 - arch/mips/tx4938/toshiba_rbtx4938/setup.c | 6 +- arch/mips/vr41xx/nec-cmbvr4133/setup.c | 4 +- include/asm-mips/addrspace.h | 2 +- include/asm-mips/bootinfo.h | 104 -------- include/asm-mips/bugs.h | 25 ++ include/asm-mips/cpu-info.h | 10 +- include/asm-mips/delay.h | 23 ++- include/asm-mips/fw/cfe/cfe_api.h | 87 +------ include/asm-mips/fw/cfe/cfe_error.h | 19 +- include/asm-mips/smp.h | 3 + include/asm-mips/stackframe.h | 9 + include/asm-mips/topology.h | 16 ++ include/asm-mips/uaccess.h | 13 +- include/asm-mips/war.h | 62 +++++ 67 files changed, 759 insertions(+), 1170 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 2f2ce0c..4f34ff1 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -85,9 +85,12 @@ config MACH_DECSTATION bool "DECstations" select BOOT_ELF32 select CEVT_R4K + select CPU_DADDI_WORKAROUNDS if 64BIT + select CPU_R4000_WORKAROUNDS if 64BIT + select CPU_R4400_WORKAROUNDS if 64BIT select DMA_NONCOHERENT - select NO_IOPORT select IRQ_CPU + select NO_IOPORT select SYS_HAS_CPU_R3000 select SYS_HAS_CPU_R4X00 select SYS_SUPPORTS_32BIT_KERNEL @@ -122,7 +125,6 @@ config MACH_JAZZ select I8253 select I8259 select ISA - select PCSPEAKER select SYS_HAS_CPU_R4X00 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL @@ -358,7 +360,6 @@ config QEMU select I8259 select IRQ_CPU select ISA - select PCSPEAKER select SWAP_IO_SPACE select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_EARLY_PRINTK @@ -564,7 +565,6 @@ config SNI_RM select I8253 select I8259 select ISA - select PCSPEAKER select SWAP_IO_SPACE if CPU_BIG_ENDIAN select SYS_HAS_CPU_R4X00 select SYS_HAS_CPU_R5000 @@ -764,10 +764,6 @@ config DMA_COHERENT config DMA_IP27 bool -config DMA_IP32 - bool - select DMA_NEED_PCI_MAP_STATE - config DMA_NONCOHERENT bool select DMA_NEED_PCI_MAP_STATE @@ -1412,6 +1408,7 @@ config MIPS_MT_SMP select MIPS_MT select NR_CPUS_DEFAULT_2 select SMP + select SYS_SUPPORTS_SCHED_SMT if SMP select SYS_SUPPORTS_SMP help This is a kernel model which is also known a VSMP or lately @@ -1438,6 +1435,19 @@ endchoice config MIPS_MT bool +config SCHED_SMT + bool "SMT (multithreading) scheduler support" + depends on SYS_SUPPORTS_SCHED_SMT + default n + help + SMT scheduler support improves the CPU scheduler's decision making + when dealing with MIPS MT enabled cores at a cost of slightly + increased overhead in some places. If unsure say N here. + +config SYS_SUPPORTS_SCHED_SMT + bool + + config SYS_SUPPORTS_MULTITHREADING bool @@ -1558,15 +1568,6 @@ config CPU_HAS_SMARTMIPS config CPU_HAS_WB bool -config 64BIT_CONTEXT - bool "Save 64bit integer registers" - depends on 32BIT && CPU_LOONGSON2 - help - Loongson2 CPU is 64bit , when used in 32BIT mode, its integer - registers can still be accessed as 64bit, mainly for multimedia - instructions. We must have all 64bit save/restored to make sure - those instructions to get correct result. - # # Vectored interrupt mode is an R2 feature # @@ -1588,6 +1589,19 @@ config GENERIC_CLOCKEVENTS_BROADCAST bool # +# CPU non-features +# +config CPU_DADDI_WORKAROUNDS + bool + +config CPU_R4000_WORKAROUNDS + bool + select CPU_R4400_WORKAROUNDS + +config CPU_R4400_WORKAROUNDS + bool + +# # Use the generic interrupt handling code in kernel/irq/: # config GENERIC_HARDIRQS @@ -1942,9 +1956,6 @@ config MMU config I8253 bool -config PCSPEAKER - bool - source "drivers/pcmcia/Kconfig" source "drivers/pci/hotplug/Kconfig" diff --git a/arch/mips/Makefile b/arch/mips/Makefile index a1f8d8b..c92c716 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -141,6 +141,10 @@ cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \ -Wa,--trap +cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += $(call cc-option,-mfix-r4000,) +cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(call cc-option,-mfix-r4400,) +cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS) += $(call cc-option,-mno-daddi,) + ifdef CONFIG_CPU_SB1 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS MODFLAGS += -msb1-pass1-workarounds @@ -602,10 +606,10 @@ ifdef CONFIG_64BIT endif endif - ifeq ($(KBUILD_SYM32), y) - ifeq ($(call cc-option-yn,-msym32), y) - cflags-y += -msym32 -DKBUILD_64BIT_SYM32 - endif + ifeq ($(KBUILD_SYM32)$(call cc-option-yn,-msym32), yy) + cflags-y += -msym32 -DKBUILD_64BIT_SYM32 + else ifeq ($(CONFIG_CPU_DADDI_WORKAROUNDS), y) + $(error CONFIG_CPU_DADDI_WORKAROUNDS unsupported without -msym32) endif endif diff --git a/arch/mips/au1000/common/au1xxx_irqmap.c b/arch/mips/au1000/common/au1xxx_irqmap.c index 98a4e34..37a10a0 100644 --- a/arch/mips/au1000/common/au1xxx_irqmap.c +++ b/arch/mips/au1000/common/au1xxx_irqmap.c @@ -25,27 +25,10 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include +#include -#include -#include -#include -#include -#include +#include /* The IC0 interrupt table. This is processor, rather than * board dependent, so no reason to keep this info in the board diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c index 9d6ad43..fc900c4 100644 --- a/arch/mips/au1000/common/dbdma.c +++ b/arch/mips/au1000/common/dbdma.c @@ -179,7 +179,7 @@ static dbdev_tab_t dbdev_tab[] = { { 0, 0, 0, 0, 0, 0, 0 }, }; -#define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t)) +#define DBDEV_TAB_SIZE ARRAY_SIZE(dbdev_tab) static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS]; diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/au1000/db1x00/init.c index 43298fd..e822c12 100644 --- a/arch/mips/au1000/db1x00/init.c +++ b/arch/mips/au1000/db1x00/init.c @@ -57,17 +57,6 @@ void __init prom_init(void) prom_argv = (char **) fw_arg1; prom_envp = (char **) fw_arg2; - /* Set the platform # */ -#if defined(CONFIG_MIPS_DB1550) - mips_machtype = MACH_DB1550; -#elif defined(CONFIG_MIPS_DB1500) - mips_machtype = MACH_DB1500; -#elif defined(CONFIG_MIPS_DB1100) - mips_machtype = MACH_DB1100; -#else - mips_machtype = MACH_DB1000; -#endif - prom_init_cmdline(); memsize_str = prom_getenv("memsize"); diff --git a/arch/mips/au1000/mtx-1/init.c b/arch/mips/au1000/mtx-1/init.c index cdeae32..e700fd3 100644 --- a/arch/mips/au1000/mtx-1/init.c +++ b/arch/mips/au1000/mtx-1/init.c @@ -54,8 +54,6 @@ void __init prom_init(void) prom_argv = (char **) fw_arg1; prom_envp = (char **) fw_arg2; - mips_machtype = MACH_MTX1; /* set the platform # */ - prom_init_cmdline(); memsize_str = prom_getenv("memsize"); diff --git a/arch/mips/au1000/pb1000/init.c b/arch/mips/au1000/pb1000/init.c index ddccaf6..2515b9f 100644 --- a/arch/mips/au1000/pb1000/init.c +++ b/arch/mips/au1000/pb1000/init.c @@ -52,8 +52,6 @@ void __init prom_init(void) prom_argv = (char **) fw_arg1; prom_envp = (char **) fw_arg2; - mips_machtype = MACH_PB1000; - prom_init_cmdline(); memsize_str = prom_getenv("memsize"); if (!memsize_str) { diff --git a/arch/mips/au1000/pb1100/init.c b/arch/mips/au1000/pb1100/init.c index c93fd39..490c380 100644 --- a/arch/mips/au1000/pb1100/init.c +++ b/arch/mips/au1000/pb1100/init.c @@ -53,8 +53,6 @@ void __init prom_init(void) prom_argv = (char **) fw_arg1; prom_envp = (char **) fw_arg3; - mips_machtype = MACH_PB1100; - prom_init_cmdline(); memsize_str = prom_getenv("memsize"); diff --git a/arch/mips/au1000/pb1200/init.c b/arch/mips/au1000/pb1200/init.c index c251570..069ed45 100644 --- a/arch/mips/au1000/pb1200/init.c +++ b/arch/mips/au1000/pb1200/init.c @@ -53,8 +53,6 @@ void __init prom_init(void) prom_argv = (char **) fw_arg1; prom_envp = (char **) fw_arg2; - mips_machtype = MACH_PB1200; - prom_init_cmdline(); memsize_str = prom_getenv("memsize"); if (!memsize_str) { diff --git a/arch/mips/au1000/pb1500/init.c b/arch/mips/au1000/pb1500/init.c index 507d4b2..db558c9 100644 --- a/arch/mips/au1000/pb1500/init.c +++ b/arch/mips/au1000/pb1500/init.c @@ -53,8 +53,6 @@ void __init prom_init(void) prom_argv = (char **) fw_arg1; prom_envp = (char **) fw_arg2; - mips_machtype = MACH_PB1500; - prom_init_cmdline(); memsize_str = prom_getenv("memsize"); if (!memsize_str) { diff --git a/arch/mips/au1000/pb1550/init.c b/arch/mips/au1000/pb1550/init.c index b03eee6..b716363 100644 --- a/arch/mips/au1000/pb1550/init.c +++ b/arch/mips/au1000/pb1550/init.c @@ -53,8 +53,6 @@ void __init prom_init(void) prom_argv = (char **) fw_arg1; prom_envp = (char **) fw_arg2; - mips_machtype = MACH_PB1550; - prom_init_cmdline(); memsize_str = prom_getenv("memsize"); if (!memsize_str) { diff --git a/arch/mips/au1000/xxs1500/init.c b/arch/mips/au1000/xxs1500/init.c index 6532939..7e6878c 100644 --- a/arch/mips/au1000/xxs1500/init.c +++ b/arch/mips/au1000/xxs1500/init.c @@ -52,8 +52,6 @@ void __init prom_init(void) prom_argv = (char **) fw_arg1; prom_envp = (char **) fw_arg2; - mips_machtype = MACH_XXS1500; /* set the platform # */ - prom_init_cmdline(); memsize_str = prom_getenv("memsize"); diff --git a/arch/mips/basler/excite/excite_prom.c b/arch/mips/basler/excite/excite_prom.c index 2d752c2..68d8bc5 100644 --- a/arch/mips/basler/excite/excite_prom.c +++ b/arch/mips/basler/excite/excite_prom.c @@ -135,8 +135,6 @@ void __init prom_init(void) #ifdef CONFIG_64BIT # error 64 bit support not implemented #endif /* CONFIG_64BIT */ - - mips_machtype = MACH_TITAN_EXCITE; } /* This is called from free_initmem(), so we need to provide it */ diff --git a/arch/mips/fw/arc/cmdline.c b/arch/mips/fw/arc/cmdline.c index fd604ef..4ca4eef 100644 --- a/arch/mips/fw/arc/cmdline.c +++ b/arch/mips/fw/arc/cmdline.c @@ -52,7 +52,7 @@ static char * __init move_firmware_args(char* cp) strcat(cp, used_arc[i][1]); cp += strlen(used_arc[i][1]); /* ... and now the argument */ - s = strstr(prom_argv(actr), "="); + s = strchr(prom_argv(actr), '='); if (s) { s++; strcpy(cp, s); diff --git a/arch/mips/fw/cfe/cfe_api.c b/arch/mips/fw/cfe/cfe_api.c index a9f69e4..717db74 100644 --- a/arch/mips/fw/cfe/cfe_api.c +++ b/arch/mips/fw/cfe/cfe_api.c @@ -16,19 +16,16 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* ********************************************************************* - * - * Broadcom Common Firmware Environment (CFE) - * - * Device Function stubs File: cfe_api.c - * - * This module contains device function stubs (small routines to - * call the standard "iocb" interface entry point to CFE). - * There should be one routine here per iocb function call. - * - * Authors: Mitch Lichtenberg, Chris Demetriou - * - ********************************************************************* */ +/* + * + * Broadcom Common Firmware Environment (CFE) + * + * This module contains device function stubs (small routines to + * call the standard "iocb" interface entry point to CFE). + * There should be one routine here per iocb function call. + * + * Authors: Mitch Lichtenberg, Chris Demetriou + */ #include #include "cfe_api_int.h" @@ -37,12 +34,8 @@ #define XPTR_FROM_NATIVE(n) ((cfe_xptr_t) (intptr_t) (n)) #define NATIVE_FROM_XPTR(x) ((void *) (intptr_t) (x)) -#ifdef CFE_API_IMPL_NAMESPACE -#define cfe_iocb_dispatch(a) __cfe_iocb_dispatch(a) -#endif -int cfe_iocb_dispatch(cfe_xiocb_t * xiocb); +int cfe_iocb_dispatch(struct cfe_xiocb *xiocb); -#if defined(CFE_API_common) || defined(CFE_API_ALL) /* * Declare the dispatch function with args of "intptr_t". * This makes sure whatever model we're compiling in @@ -53,27 +46,25 @@ int cfe_iocb_dispatch(cfe_xiocb_t * xiocb); */ static int (*cfe_dispfunc) (intptr_t handle, intptr_t xiocb) = 0; -static cfe_xuint_t cfe_handle = 0; +static u64 cfe_handle = 0; -int cfe_init(cfe_xuint_t handle, cfe_xuint_t ept) +int cfe_init(u64 handle, u64 ept) { cfe_dispfunc = NATIVE_FROM_XPTR(ept); cfe_handle = handle; return 0; } -int cfe_iocb_dispatch(cfe_xiocb_t * xiocb) +int cfe_iocb_dispatch(struct cfe_xiocb * xiocb) { if (!cfe_dispfunc) return -1; return (*cfe_dispfunc) ((intptr_t) cfe_handle, (intptr_t) xiocb); } -#endif /* CFE_API_common || CFE_API_ALL */ -#if defined(CFE_API_close) || defined(CFE_API_ALL) int cfe_close(int handle) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_DEV_CLOSE; xiocb.xiocb_status = 0; @@ -86,18 +77,16 @@ int cfe_close(int handle) return xiocb.xiocb_status; } -#endif /* CFE_API_close || CFE_API_ALL */ -#if defined(CFE_API_cpu_start) || defined(CFE_API_ALL) int cfe_cpu_start(int cpu, void (*fn) (void), long sp, long gp, long a1) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL; xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_cpuctl_t); + xiocb.xiocb_psize = sizeof(struct xiocb_cpuctl); xiocb.plist.xiocb_cpuctl.cpu_number = cpu; xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_START; xiocb.plist.xiocb_cpuctl.gp_val = gp; @@ -109,18 +98,16 @@ int cfe_cpu_start(int cpu, void (*fn) (void), long sp, long gp, long a1) return xiocb.xiocb_status; } -#endif /* CFE_API_cpu_start || CFE_API_ALL */ -#if defined(CFE_API_cpu_stop) || defined(CFE_API_ALL) int cfe_cpu_stop(int cpu) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL; xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_cpuctl_t); + xiocb.xiocb_psize = sizeof(struct xiocb_cpuctl); xiocb.plist.xiocb_cpuctl.cpu_number = cpu; xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_STOP; @@ -128,18 +115,16 @@ int cfe_cpu_stop(int cpu) return xiocb.xiocb_status; } -#endif /* CFE_API_cpu_stop || CFE_API_ALL */ -#if defined(CFE_API_enumenv) || defined(CFE_API_ALL) int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_ENV_SET; xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_envbuf_t); + xiocb.xiocb_psize = sizeof(struct xiocb_envbuf); xiocb.plist.xiocb_envbuf.enum_idx = idx; xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name); xiocb.plist.xiocb_envbuf.name_length = namelen; @@ -150,20 +135,17 @@ int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen) return xiocb.xiocb_status; } -#endif /* CFE_API_enumenv || CFE_API_ALL */ -#if defined(CFE_API_enummem) || defined(CFE_API_ALL) int -cfe_enummem(int idx, int flags, cfe_xuint_t * start, cfe_xuint_t * length, - cfe_xuint_t * type) +cfe_enummem(int idx, int flags, u64 *start, u64 *length, u64 *type) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_FW_MEMENUM; xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = flags; - xiocb.xiocb_psize = sizeof(xiocb_meminfo_t); + xiocb.xiocb_psize = sizeof(struct xiocb_meminfo); xiocb.plist.xiocb_meminfo.mi_idx = idx; cfe_iocb_dispatch(&xiocb); @@ -177,30 +159,26 @@ cfe_enummem(int idx, int flags, cfe_xuint_t * start, cfe_xuint_t * length, return 0; } -#endif /* CFE_API_enummem || CFE_API_ALL */ -#if defined(CFE_API_exit) || defined(CFE_API_ALL) int cfe_exit(int warm, int status) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_FW_RESTART; xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = warm ? CFE_FLG_WARMSTART : 0; - xiocb.xiocb_psize = sizeof(xiocb_exitstat_t); + xiocb.xiocb_psize = sizeof(struct xiocb_exitstat); xiocb.plist.xiocb_exitstat.status = status; cfe_iocb_dispatch(&xiocb); return xiocb.xiocb_status; } -#endif /* CFE_API_exit || CFE_API_ALL */ -#if defined(CFE_API_flushcache) || defined(CFE_API_ALL) int cfe_flushcache(int flg) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_FW_FLUSHCACHE; xiocb.xiocb_status = 0; @@ -212,34 +190,30 @@ int cfe_flushcache(int flg) return xiocb.xiocb_status; } -#endif /* CFE_API_flushcache || CFE_API_ALL */ -#if defined(CFE_API_getdevinfo) || defined(CFE_API_ALL) int cfe_getdevinfo(char *name) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_DEV_GETINFO; xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_buffer_t); + xiocb.xiocb_psize = sizeof(struct xiocb_buffer); xiocb.plist.xiocb_buffer.buf_offset = 0; xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(name); - xiocb.plist.xiocb_buffer.buf_length = cfe_strlen(name); + xiocb.plist.xiocb_buffer.buf_length = strlen(name); cfe_iocb_dispatch(&xiocb); if (xiocb.xiocb_status < 0) return xiocb.xiocb_status; - return xiocb.plist.xiocb_buffer.buf_devflags; + return xiocb.plist.xiocb_buffer.buf_ioctlcmd; } -#endif /* CFE_API_getdevinfo || CFE_API_ALL */ -#if defined(CFE_API_getenv) || defined(CFE_API_ALL) int cfe_getenv(char *name, char *dest, int destlen) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; *dest = 0; @@ -247,10 +221,10 @@ int cfe_getenv(char *name, char *dest, int destlen) xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_envbuf_t); + xiocb.xiocb_psize = sizeof(struct xiocb_envbuf); xiocb.plist.xiocb_envbuf.enum_idx = 0; xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name); - xiocb.plist.xiocb_envbuf.name_length = cfe_strlen(name); + xiocb.plist.xiocb_envbuf.name_length = strlen(name); xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(dest); xiocb.plist.xiocb_envbuf.val_length = destlen; @@ -258,18 +232,16 @@ int cfe_getenv(char *name, char *dest, int destlen) return xiocb.xiocb_status; } -#endif /* CFE_API_getenv || CFE_API_ALL */ -#if defined(CFE_API_getfwinfo) || defined(CFE_API_ALL) int cfe_getfwinfo(cfe_fwinfo_t * info) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_FW_GETINFO; xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_fwinfo_t); + xiocb.xiocb_psize = sizeof(struct xiocb_fwinfo); cfe_iocb_dispatch(&xiocb); @@ -292,12 +264,10 @@ int cfe_getfwinfo(cfe_fwinfo_t * info) return 0; } -#endif /* CFE_API_getfwinfo || CFE_API_ALL */ -#if defined(CFE_API_getstdhandle) || defined(CFE_API_ALL) int cfe_getstdhandle(int flg) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_DEV_GETHANDLE; xiocb.xiocb_status = 0; @@ -311,23 +281,17 @@ int cfe_getstdhandle(int flg) return xiocb.xiocb_status; return xiocb.xiocb_handle; } -#endif /* CFE_API_getstdhandle || CFE_API_ALL */ -#if defined(CFE_API_getticks) || defined(CFE_API_ALL) int64_t -#ifdef CFE_API_IMPL_NAMESPACE -__cfe_getticks(void) -#else cfe_getticks(void) -#endif { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_FW_GETTIME; xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_time_t); + xiocb.xiocb_psize = sizeof(struct xiocb_time); xiocb.plist.xiocb_time.ticks = 0; cfe_iocb_dispatch(&xiocb); @@ -335,18 +299,16 @@ cfe_getticks(void) return xiocb.plist.xiocb_time.ticks; } -#endif /* CFE_API_getticks || CFE_API_ALL */ -#if defined(CFE_API_inpstat) || defined(CFE_API_ALL) int cfe_inpstat(int handle) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_DEV_INPSTAT; xiocb.xiocb_status = 0; xiocb.xiocb_handle = handle; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_inpstat_t); + xiocb.xiocb_psize = sizeof(struct xiocb_inpstat); xiocb.plist.xiocb_inpstat.inp_status = 0; cfe_iocb_dispatch(&xiocb); @@ -355,20 +317,18 @@ int cfe_inpstat(int handle) return xiocb.xiocb_status; return xiocb.plist.xiocb_inpstat.inp_status; } -#endif /* CFE_API_inpstat || CFE_API_ALL */ -#if defined(CFE_API_ioctl) || defined(CFE_API_ALL) int cfe_ioctl(int handle, unsigned int ioctlnum, unsigned char *buffer, - int length, int *retlen, cfe_xuint_t offset) + int length, int *retlen, u64 offset) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_DEV_IOCTL; xiocb.xiocb_status = 0; xiocb.xiocb_handle = handle; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_buffer_t); + xiocb.xiocb_psize = sizeof(struct xiocb_buffer); xiocb.plist.xiocb_buffer.buf_offset = offset; xiocb.plist.xiocb_buffer.buf_ioctlcmd = ioctlnum; xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer); @@ -380,21 +340,19 @@ cfe_ioctl(int handle, unsigned int ioctlnum, unsigned char *buffer, *retlen = xiocb.plist.xiocb_buffer.buf_retlen; return xiocb.xiocb_status; } -#endif /* CFE_API_ioctl || CFE_API_ALL */ -#if defined(CFE_API_open) || defined(CFE_API_ALL) int cfe_open(char *name) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_DEV_OPEN; xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_buffer_t); + xiocb.xiocb_psize = sizeof(struct xiocb_buffer); xiocb.plist.xiocb_buffer.buf_offset = 0; xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(name); - xiocb.plist.xiocb_buffer.buf_length = cfe_strlen(name); + xiocb.plist.xiocb_buffer.buf_length = strlen(name); cfe_iocb_dispatch(&xiocb); @@ -402,27 +360,21 @@ int cfe_open(char *name) return xiocb.xiocb_status; return xiocb.xiocb_handle; } -#endif /* CFE_API_open || CFE_API_ALL */ -#if defined(CFE_API_read) || defined(CFE_API_ALL) int cfe_read(int handle, unsigned char *buffer, int length) { return cfe_readblk(handle, 0, buffer, length); } -#endif /* CFE_API_read || CFE_API_ALL */ -#if defined(CFE_API_readblk) || defined(CFE_API_ALL) -int -cfe_readblk(int handle, cfe_xint_t offset, unsigned char *buffer, - int length) +int cfe_readblk(int handle, s64 offset, unsigned char *buffer, int length) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_DEV_READ; xiocb.xiocb_status = 0; xiocb.xiocb_handle = handle; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_buffer_t); + xiocb.xiocb_psize = sizeof(struct xiocb_buffer); xiocb.plist.xiocb_buffer.buf_offset = offset; xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer); xiocb.plist.xiocb_buffer.buf_length = length; @@ -433,62 +385,41 @@ cfe_readblk(int handle, cfe_xint_t offset, unsigned char *buffer, return xiocb.xiocb_status; return xiocb.plist.xiocb_buffer.buf_retlen; } -#endif /* CFE_API_readblk || CFE_API_ALL */ -#if defined(CFE_API_setenv) || defined(CFE_API_ALL) int cfe_setenv(char *name, char *val) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_ENV_SET; xiocb.xiocb_status = 0; xiocb.xiocb_handle = 0; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_envbuf_t); + xiocb.xiocb_psize = sizeof(struct xiocb_envbuf); xiocb.plist.xiocb_envbuf.enum_idx = 0; xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name); - xiocb.plist.xiocb_envbuf.name_length = cfe_strlen(name); + xiocb.plist.xiocb_envbuf.name_length = strlen(name); xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val); - xiocb.plist.xiocb_envbuf.val_length = cfe_strlen(val); + xiocb.plist.xiocb_envbuf.val_length = strlen(val); cfe_iocb_dispatch(&xiocb); return xiocb.xiocb_status; } -#endif /* CFE_API_setenv || CFE_API_ALL */ - -#if (defined(CFE_API_strlen) || defined(CFE_API_ALL)) \ - && !defined(CFE_API_STRLEN_CUSTOM) -int cfe_strlen(char *name) -{ - int count = 0; - - while (*name++) - count++; - return count; -} -#endif /* CFE_API_strlen || CFE_API_ALL */ - -#if defined(CFE_API_write) || defined(CFE_API_ALL) int cfe_write(int handle, unsigned char *buffer, int length) { return cfe_writeblk(handle, 0, buffer, length); } -#endif /* CFE_API_write || CFE_API_ALL */ -#if defined(CFE_API_writeblk) || defined(CFE_API_ALL) -int -cfe_writeblk(int handle, cfe_xint_t offset, unsigned char *buffer, - int length) +int cfe_writeblk(int handle, s64 offset, unsigned char *buffer, int length) { - cfe_xiocb_t xiocb; + struct cfe_xiocb xiocb; xiocb.xiocb_fcode = CFE_CMD_DEV_WRITE; xiocb.xiocb_status = 0; xiocb.xiocb_handle = handle; xiocb.xiocb_flags = 0; - xiocb.xiocb_psize = sizeof(xiocb_buffer_t); + xiocb.xiocb_psize = sizeof(struct xiocb_buffer); xiocb.plist.xiocb_buffer.buf_offset = offset; xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer); xiocb.plist.xiocb_buffer.buf_length = length; @@ -499,4 +430,3 @@ cfe_writeblk(int handle, cfe_xint_t offset, unsigned char *buffer, return xiocb.xiocb_status; return xiocb.plist.xiocb_buffer.buf_retlen; } -#endif /* CFE_API_writeblk || CFE_API_ALL */ diff --git a/arch/mips/fw/cfe/cfe_api_int.h b/arch/mips/fw/cfe/cfe_api_int.h index f7e5a64..d9759e6 100644 --- a/arch/mips/fw/cfe/cfe_api_int.h +++ b/arch/mips/fw/cfe/cfe_api_int.h @@ -15,28 +15,12 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -/* ********************************************************************* - * - * Broadcom Common Firmware Environment (CFE) - * - * Device function prototypes File: cfe_api_int.h - * - * This header defines all internal types and macros for the - * library. This is stuff that's not exported to an app - * using the library. - * - * Authors: Mitch Lichtenberg, Chris Demetriou - * - ********************************************************************* */ - #ifndef CFE_API_INT_H #define CFE_API_INT_H -/* ********************************************************************* - * Constants - ********************************************************************* */ - +/* + * Constants. + */ #define CFE_CMD_FW_GETINFO 0 #define CFE_CMD_FW_RESTART 1 #define CFE_CMD_FW_BOOT 2 @@ -64,89 +48,101 @@ #define CFE_CMD_VENDOR_USE 0x8000 /* codes above this are for customer use */ -/* ********************************************************************* - * Structures - ********************************************************************* */ +/* + * Structures. + */ -typedef uint64_t cfe_xuint_t; -typedef int64_t cfe_xint_t; -typedef int64_t cfe_xptr_t; +/* eeek, signed "pointers" */ +typedef s64 cfe_xptr_t; -typedef struct xiocb_buffer_s { - cfe_xuint_t buf_offset; /* offset on device (bytes) */ +struct xiocb_buffer { + u64 buf_offset; /* offset on device (bytes) */ cfe_xptr_t buf_ptr; /* pointer to a buffer */ - cfe_xuint_t buf_length; /* length of this buffer */ - cfe_xuint_t buf_retlen; /* returned length (for read ops) */ - cfe_xuint_t buf_ioctlcmd; /* IOCTL command (used only for IOCTLs) */ -} xiocb_buffer_t; - -#define buf_devflags buf_ioctlcmd /* returned device info flags */ + u64 buf_length; /* length of this buffer */ + u64 buf_retlen; /* returned length (for read ops) */ + u64 buf_ioctlcmd; /* IOCTL command (used only for IOCTLs) */ +}; -typedef struct xiocb_inpstat_s { - cfe_xuint_t inp_status; /* 1 means input available */ -} xiocb_inpstat_t; +struct xiocb_inpstat { + u64 inp_status; /* 1 means input available */ +}; -typedef struct xiocb_envbuf_s { - cfe_xint_t enum_idx; /* 0-based enumeration index */ +struct xiocb_envbuf { + s64 enum_idx; /* 0-based enumeration index */ cfe_xptr_t name_ptr; /* name string buffer */ - cfe_xint_t name_length; /* size of name buffer */ + s64 name_length; /* size of name buffer */ cfe_xptr_t val_ptr; /* value string buffer */ - cfe_xint_t val_length; /* size of value string buffer */ -} xiocb_envbuf_t; - -typedef struct xiocb_cpuctl_s { - cfe_xuint_t cpu_number; /* cpu number to control */ - cfe_xuint_t cpu_command; /* command to issue to CPU */ - cfe_xuint_t start_addr; /* CPU start address */ - cfe_xuint_t gp_val; /* starting GP value */ - cfe_xuint_t sp_val; /* starting SP value */ - cfe_xuint_t a1_val; /* starting A1 value */ -} xiocb_cpuctl_t; - -typedef struct xiocb_time_s { - cfe_xint_t ticks; /* current time in ticks */ -} xiocb_time_t; - -typedef struct xiocb_exitstat_s { - cfe_xint_t status; -} xiocb_exitstat_t; - -typedef struct xiocb_meminfo_s { - cfe_xint_t mi_idx; /* 0-based enumeration index */ - cfe_xint_t mi_type; /* type of memory block */ - cfe_xuint_t mi_addr; /* physical start address */ - cfe_xuint_t mi_size; /* block size */ -} xiocb_meminfo_t; - -typedef struct xiocb_fwinfo_s { - cfe_xint_t fwi_version; /* major, minor, eco version */ - cfe_xint_t fwi_totalmem; /* total installed mem */ - cfe_xint_t fwi_flags; /* various flags */ - cfe_xint_t fwi_boardid; /* board ID */ - cfe_xint_t fwi_bootarea_va; /* VA of boot area */ - cfe_xint_t fwi_bootarea_pa; /* PA of boot area */ - cfe_xint_t fwi_bootarea_size; /* size of boot area */ - cfe_xint_t fwi_reserved1; - cfe_xint_t fwi_reserved2; - cfe_xint_t fwi_reserved3; -} xiocb_fwinfo_t; - -typedef struct cfe_xiocb_s { - cfe_xuint_t xiocb_fcode; /* IOCB function code */ - cfe_xint_t xiocb_status; /* return status */ - cfe_xint_t xiocb_handle; /* file/device handle */ - cfe_xuint_t xiocb_flags; /* flags for this IOCB */ - cfe_xuint_t xiocb_psize; /* size of parameter list */ + s64 val_length; /* size of value string buffer */ +}; + +struct xiocb_cpuctl { + u64 cpu_number; /* cpu number to control */ + u64 cpu_command; /* command to issue to CPU */ + u64 start_addr; /* CPU start address */ + u64 gp_val; /* starting GP value */ + u64 sp_val; /* starting SP value */ + u64 a1_val; /* starting A1 value */ +}; + +struct xiocb_time { + s64 ticks; /* current time in ticks */ +}; + +struct xiocb_exitstat{ + s64 status; +}; + +struct xiocb_meminfo { + s64 mi_idx; /* 0-based enumeration index */ + s64 mi_type; /* type of memory block */ + u64 mi_addr; /* physical start address */ + u64 mi_size; /* block size */ +}; + +struct xiocb_fwinfo { + s64 fwi_version; /* major, minor, eco version */ + s64 fwi_totalmem; /* total installed mem */ + s64 fwi_flags; /* various flags */ + s64 fwi_boardid; /* board ID */ + s64 fwi_bootarea_va; /* VA of boot area */ + s64 fwi_bootarea_pa; /* PA of boot area */ + s64 fwi_bootarea_size; /* size of boot area */ + s64 fwi_reserved1; + s64 fwi_reserved2; + s64 fwi_reserved3; +}; + +struct cfe_xiocb { + u64 xiocb_fcode; /* IOCB function code */ + s64 xiocb_status; /* return status */ + s64 xiocb_handle; /* file/device handle */ + u64 xiocb_flags; /* flags for this IOCB */ + u64 xiocb_psize; /* size of parameter list */ union { - xiocb_buffer_t xiocb_buffer; /* buffer parameters */ - xiocb_inpstat_t xiocb_inpstat; /* input status parameters */ - xiocb_envbuf_t xiocb_envbuf; /* environment function parameters */ - xiocb_cpuctl_t xiocb_cpuctl; /* CPU control parameters */ - xiocb_time_t xiocb_time; /* timer parameters */ - xiocb_meminfo_t xiocb_meminfo; /* memory arena info parameters */ - xiocb_fwinfo_t xiocb_fwinfo; /* firmware information */ - xiocb_exitstat_t xiocb_exitstat; /* Exit Status */ + /* buffer parameters */ + struct xiocb_buffer xiocb_buffer; + + /* input status parameters */ + struct xiocb_inpstat xiocb_inpstat; + + /* environment function parameters */ + struct xiocb_envbuf xiocb_envbuf; + + /* CPU control parameters */ + struct xiocb_cpuctl xiocb_cpuctl; + + /* timer parameters */ + struct xiocb_time xiocb_time; + + /* memory arena info parameters */ + struct xiocb_meminfo xiocb_meminfo; + + /* firmware information */ + struct xiocb_fwinfo xiocb_fwinfo; + + /* Exit Status */ + struct xiocb_exitstat xiocb_exitstat; } plist; -} cfe_xiocb_t; +}; -#endif /* CFE_API_INT_H */ +#endif /* CFE_API_INT_H */ diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c index 51f6b78..728ef6a 100644 --- a/arch/mips/gt64120/wrppmc/setup.c +++ b/arch/mips/gt64120/wrppmc/setup.c @@ -121,8 +121,6 @@ const char *get_system_type(void) */ void __init prom_init(void) { - mips_machtype = MACH_WRPPMC; - add_memory_region(WRPPMC_SDRAM_SCS0_BASE, WRPPMC_SDRAM_SCS0_SIZE, BOOT_MEM_RAM); add_memory_region(WRPPMC_BOOTROM_BASE, WRPPMC_BOOTROM_SIZE, BOOT_MEM_ROM_DATA); diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c index a785797..a794719 100644 --- a/arch/mips/jazz/setup.c +++ b/arch/mips/jazz/setup.c @@ -200,12 +200,19 @@ static struct platform_device jazz_cmos_pdev = { .resource = jazz_cmos_rsrc }; +static struct platform_device pcspeaker_pdev = { + .name = "pcspkr", + .id = -1, +}; + static int __init jazz_setup_devinit(void) { platform_device_register(&jazz_serial8250_device); platform_device_register(&jazz_esp_pdev); platform_device_register(&jazz_sonic_pdev); platform_device_register(&jazz_cmos_pdev); + platform_device_register(&pcspeaker_pdev); + return 0; } diff --git a/arch/mips/jmr3927/rbhma3100/init.c b/arch/mips/jmr3927/rbhma3100/init.c index b643f75..700b9cf 100644 --- a/arch/mips/jmr3927/rbhma3100/init.c +++ b/arch/mips/jmr3927/rbhma3100/init.c @@ -52,10 +52,6 @@ void __init prom_init(void) puts("Warning: TX3927 TLB off\n"); #endif -#ifdef CONFIG_TOSHIBA_JMR3927 - mips_machtype = MACH_TOSHIBA_JMR3927; -#endif - prom_init_cmdline(); add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM); } diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index 06e01c8..75cfe65 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c @@ -29,21 +29,16 @@ #include #include -#include #include #include -#include #include #include #include #include #ifdef CONFIG_SERIAL_TXX9 -#include -#include #include #endif -#include #include #include #include diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c index af78456..417bb3e 100644 --- a/arch/mips/kernel/cpu-bugs64.c +++ b/arch/mips/kernel/cpu-bugs64.c @@ -18,6 +18,15 @@ #include #include +static char bug64hit[] __initdata = + "reliable operation impossible!\n%s"; +static char nowar[] __initdata = + "Please report to ."; +static char r4kwar[] __initdata = + "Enable CPU_R4000_WORKAROUNDS to rectify."; +static char daddiwar[] __initdata = + "Enable CPU_DADDI_WORKAROUNDS to rectify."; + static inline void align_mod(const int align, const int mod) { asm volatile( @@ -155,13 +164,7 @@ static inline void check_mult_sh(void) } printk("no.\n"); - panic("Reliable operation impossible!\n" -#ifndef CONFIG_CPU_R4000 - "Configure for R4000 to enable the workaround." -#else - "Please report to ." -#endif - ); + panic(bug64hit, !R4000_WAR ? r4kwar : nowar); } static volatile int daddi_ov __initdata = 0; @@ -233,15 +236,11 @@ static inline void check_daddi(void) } printk("no.\n"); - panic("Reliable operation impossible!\n" -#if !defined(CONFIG_CPU_R4000) && !defined(CONFIG_CPU_R4400) - "Configure for R4000 or R4400 to enable the workaround." -#else - "Please report to ." -#endif - ); + panic(bug64hit, !DADDI_WAR ? daddiwar : nowar); } +int daddiu_bug __initdata = -1; + static inline void check_daddiu(void) { long v, w, tmp; @@ -281,7 +280,9 @@ static inline void check_daddiu(void) : "=&r" (v), "=&r" (w), "=&r" (tmp) : "I" (0xffffffffffffdb9aUL), "I" (0x1234)); - if (v == w) { + daddiu_bug = v != w; + + if (!daddiu_bug) { printk("no.\n"); return; } @@ -303,18 +304,16 @@ static inline void check_daddiu(void) } printk("no.\n"); - panic("Reliable operation impossible!\n" -#if !defined(CONFIG_CPU_R4000) && !defined(CONFIG_CPU_R4400) - "Configure for R4000 or R4400 to enable the workaround." -#else - "Please report to ." -#endif - ); + panic(bug64hit, !DADDI_WAR ? daddiwar : nowar); } -void __init check_bugs64(void) +void __init check_bugs64_early(void) { check_mult_sh(); - check_daddi(); check_daddiu(); } + +void __init check_bugs64(void) +{ + check_daddi(); +} diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index e76a76b..c6ada98 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -6,7 +6,7 @@ * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle * Copyright (C) 1999, 2000 Silicon Graphics, Inc. * Copyright (C) 2001 MIPS Technologies, Inc. - * Copyright (C) 2002 Maciej W. Rozycki + * Copyright (C) 2002, 2007 Maciej W. Rozycki */ #include @@ -471,7 +471,13 @@ NESTED(nmi_handler, PT_SIZE, sp) jr k0 rfe #else +#ifndef CONFIG_CPU_DADDI_WORKAROUNDS LONG_ADDIU k0, 4 /* stall on $k0 */ +#else + .set at=v1 + LONG_ADDIU k0, 4 + .set noat +#endif MTC0 k0, CP0_EPC /* I hope three instructions between MTC0 and ERET are enough... */ ori k1, _THREAD_MASK diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c index d2c2e00..f6704ab 100644 --- a/arch/mips/kernel/kspd.c +++ b/arch/mips/kernel/kspd.c @@ -161,8 +161,7 @@ static unsigned int translate_open_flags(int flags) int i; unsigned int ret = 0; - for (i = 0; i < (sizeof(open_flags_table) / sizeof(struct apsp_table)); - i++) { + for (i = 0; i < ARRAY_SIZE(open_flags_table); i++) { if( (flags & open_flags_table[i].sp) ) { ret |= open_flags_table[i].ap; } diff --git a/arch/mips/kernel/pcspeaker.c b/arch/mips/kernel/pcspeaker.c deleted file mode 100644 index 475df69..0000000 --- a/arch/mips/kernel/pcspeaker.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2006 IBM Corporation - * - * Implements device information for i8253 timer chip - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License version - * 2 as published by the Free Software Foundation - */ - -#include - -static __init int add_pcspkr(void) -{ - struct platform_device *pd; - int ret; - - pd = platform_device_alloc("pcspkr", -1); - if (!pd) - return -ENOMEM; - - ret = platform_device_add(pd); - if (ret) - platform_device_put(pd); - - return ret; -} -device_initcall(add_pcspkr); diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 6e6e947..18eb81c 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -60,8 +60,12 @@ static int show_cpuinfo(struct seq_file *m, void *v) cpu_has_dsp ? " dsp" : "", cpu_has_mipsmt ? " mt" : "" ); +<<<<<<< HEAD:arch/mips/kernel/proc.c seq_printf(m, "shadow register sets\t: %d\n", cpu_data[n].srsets); +======= + seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); +>>>>>>> FETCH_HEAD:arch/mips/kernel/proc.c sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", cpu_has_vce ? "%u" : "not available"); diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c index 1ba00c1..0233798 100644 --- a/arch/mips/kernel/rtlx.c +++ b/arch/mips/kernel/rtlx.c @@ -40,7 +40,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index a06a27d..e84961a 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -8,7 +8,7 @@ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 Ralf Baechle * Copyright (C) 1996 Stoned Elipot * Copyright (C) 1999 Silicon Graphics, Inc. - * Copyright (C) 2000 2001, 2002 Maciej W. Rozycki + * Copyright (C) 2000, 2001, 2002, 2007 Maciej W. Rozycki */ #include #include @@ -24,6 +24,7 @@ #include #include +#include #include #include #include @@ -533,6 +534,7 @@ void __init setup_arch(char **cmdline_p) } #endif cpu_report(); + check_bugs_early(); #if defined(CONFIG_VT) #if defined(CONFIG_VGA_CONSOLE) diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 94e210c..2ab0b7e 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -30,7 +31,6 @@ #include #include #include -#include #include #include #include @@ -223,6 +223,7 @@ static void __init smp_tc_init(unsigned int tc, unsigned int mvpconf0) void __init plat_smp_setup(void) { unsigned int mvpconf0, ntc, tc, ncpu = 0; + unsigned int nvpe; #ifdef CONFIG_MIPS_MT_FPAFF /* If we have an FPU, enroll ourselves in the FPU-full mask */ @@ -242,6 +243,9 @@ void __init plat_smp_setup(void) mvpconf0 = read_c0_mvpconf0(); ntc = (mvpconf0 & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT; + nvpe = ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1; + smp_num_siblings = nvpe; + /* we'll always have more TC's than VPE's, so loop setting everything to a sensible state */ for (tc = 0; tc <= ntc; tc++) { diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 63989e9..335be9b 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -56,6 +56,34 @@ EXPORT_SYMBOL(cpu_online_map); extern void __init calibrate_delay(void); extern void cpu_idle(void); +/* Number of TCs (or siblings in Intel speak) per CPU core */ +int smp_num_siblings = 1; +EXPORT_SYMBOL(smp_num_siblings); + +/* representing the TCs (or siblings in Intel speak) of each logical CPU */ +cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly; +EXPORT_SYMBOL(cpu_sibling_map); + +/* representing cpus for which sibling maps can be computed */ +static cpumask_t cpu_sibling_setup_map; + +static inline void set_cpu_sibling_map(int cpu) +{ + int i; + + cpu_set(cpu, cpu_sibling_setup_map); + + if (smp_num_siblings > 1) { + for_each_cpu_mask(i, cpu_sibling_setup_map) { + if (cpu_data[cpu].core == cpu_data[i].core) { + cpu_set(i, cpu_sibling_map[cpu]); + cpu_set(cpu, cpu_sibling_map[i]); + } + } + } else + cpu_set(cpu, cpu_sibling_map[cpu]); +} + /* * First C code run on the secondary CPUs after being started up by * the master. @@ -85,6 +113,7 @@ asmlinkage __cpuinit void start_secondary(void) cpu_data[cpu].udelay_val = loops_per_jiffy; prom_smp_finish(); + set_cpu_sibling_map(cpu); cpu_set(cpu, cpu_callin_map); @@ -258,6 +287,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) init_new_context(current, &init_mm); current_thread_info()->cpu = 0; plat_prepare_cpus(max_cpus); + set_cpu_sibling_map(0); #ifndef CONFIG_HOTPLUG_CPU cpu_present_map = cpu_possible_map; #endif diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 38bd33f..fd8b8c5 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -53,7 +53,6 @@ #include #include #include -#include typedef void *vpe_handle; diff --git a/arch/mips/lemote/lm2e/prom.c b/arch/mips/lemote/lm2e/prom.c index 8243368..7edc15d 100644 --- a/arch/mips/lemote/lm2e/prom.c +++ b/arch/mips/lemote/lm2e/prom.c @@ -57,8 +57,6 @@ void __init prom_init(void) arg = (int *)fw_arg1; env = (int *)fw_arg2; - mips_machtype = MACH_LEMOTE_FULONG; - prom_init_cmdline(); if ((strstr(arcs_cmdline, "console=")) == NULL) diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S index c0a77fe..957a824 100644 --- a/arch/mips/lib/csum_partial.S +++ b/arch/mips/lib/csum_partial.S @@ -7,6 +7,7 @@ * * Copyright (C) 1998, 1999 Ralf Baechle * Copyright (C) 1999 Silicon Graphics, Inc. + * Copyright (C) 2007 Maciej W. Rozycki */ #include #include @@ -52,9 +53,12 @@ #define UNIT(unit) ((unit)*NBYTES) #define ADDC(sum,reg) \ + .set push; \ + .set noat; \ ADD sum, reg; \ sltu v1, sum, reg; \ - ADD sum, v1 + ADD sum, v1; \ + .set pop #define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \ LOAD _t0, (offset + UNIT(0))(src); \ @@ -178,8 +182,10 @@ move_128bytes: CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4) CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4) LONG_SUBU t8, t8, 0x01 + .set reorder /* DADDI_WAR */ + PTR_ADDU src, src, 0x80 bnez t8, move_128bytes - PTR_ADDU src, src, 0x80 + .set noreorder 1: beqz t2, 1f @@ -208,8 +214,10 @@ end_words: lw t0, (src) LONG_SUBU t8, t8, 0x1 ADDC(sum, t0) + .set reorder /* DADDI_WAR */ + PTR_ADDU src, src, 0x4 bnez t8, end_words - PTR_ADDU src, src, 0x4 + .set noreorder /* unknown src alignment and < 8 bytes to go */ small_csumcpy: @@ -246,6 +254,8 @@ small_csumcpy: 1: ADDC(sum, t1) /* fold checksum */ + .set push + .set noat #ifdef USE_DOUBLE dsll32 v1, sum, 0 daddu sum, v1 @@ -266,6 +276,7 @@ small_csumcpy: srl sum, sum, 8 or sum, v1 andi sum, 0xffff + .set pop 1: .set reorder /* Add the passed partial csum. */ @@ -373,7 +384,11 @@ small_csumcpy: #define ADDRMASK (NBYTES-1) +#ifndef CONFIG_CPU_DADDI_WORKAROUNDS .set noat +#else + .set at=v1 +#endif LEAF(__csum_partial_copy_user) PTR_ADDU AT, src, len /* See (1) above. */ @@ -441,8 +456,10 @@ EXC( STORE t6, UNIT(6)(dst), s_exc) ADDC(sum, t6) EXC( STORE t7, UNIT(7)(dst), s_exc) ADDC(sum, t7) + .set reorder /* DADDI_WAR */ + ADD dst, dst, 8*NBYTES bgez len, 1b - ADD dst, dst, 8*NBYTES + .set noreorder ADD len, 8*NBYTES # revert len (see above) /* @@ -471,8 +488,10 @@ EXC( STORE t2, UNIT(2)(dst), s_exc) ADDC(sum, t2) EXC( STORE t3, UNIT(3)(dst), s_exc) ADDC(sum, t3) + .set reorder /* DADDI_WAR */ + ADD dst, dst, 4*NBYTES beqz len, done - ADD dst, dst, 4*NBYTES + .set noreorder less_than_4units: /* * rem = len % NBYTES @@ -485,8 +504,10 @@ EXC( LOAD t0, 0(src), l_exc) SUB len, len, NBYTES EXC( STORE t0, 0(dst), s_exc) ADDC(sum, t0) + .set reorder /* DADDI_WAR */ + ADD dst, dst, NBYTES bne rem, len, 1b - ADD dst, dst, NBYTES + .set noreorder /* * src and dst are aligned, need to copy rem bytes (rem < NBYTES) @@ -572,8 +593,10 @@ EXC( STORE t2, UNIT(2)(dst), s_exc) ADDC(sum, t2) EXC( STORE t3, UNIT(3)(dst), s_exc) ADDC(sum, t3) + .set reorder /* DADDI_WAR */ + ADD dst, dst, 4*NBYTES bne len, rem, 1b - ADD dst, dst, 4*NBYTES + .set noreorder cleanup_src_unaligned: beqz len, done @@ -587,8 +610,10 @@ EXC( LDREST t0, REST(0)(src), l_exc_copy) SUB len, len, NBYTES EXC( STORE t0, 0(dst), s_exc) ADDC(sum, t0) + .set reorder /* DADDI_WAR */ + ADD dst, dst, NBYTES bne len, rem, 1b - ADD dst, dst, NBYTES + .set noreorder copy_bytes_checklen: beqz len, done @@ -631,6 +656,8 @@ copy_bytes_done: ADDC(sum, t2) done: /* fold checksum */ + .set push + .set noat #ifdef USE_DOUBLE dsll32 v1, sum, 0 daddu sum, v1 @@ -651,6 +678,7 @@ done: srl sum, sum, 8 or sum, v1 andi sum, 0xffff + .set pop 1: .set reorder ADDC(sum, psum) @@ -678,8 +706,10 @@ EXC( lbu t1, 0(src), l_exc) SLLV t1, t1, t2 addu t2, SHIFT_INC ADDC(sum, t1) + .set reorder /* DADDI_WAR */ + ADD dst, dst, 1 bne src, t0, 1b - ADD dst, dst, 1 + .set noreorder l_exc: LOAD t0, TI_TASK($28) nop @@ -697,12 +727,22 @@ l_exc: * Clear len bytes starting at dst. Can't call __bzero because it * might modify len. An inefficient loop for these rare times... */ + .set reorder /* DADDI_WAR */ + SUB src, len, 1 beqz len, done - SUB src, len, 1 + .set noreorder 1: sb zero, 0(dst) ADD dst, dst, 1 + .set push + .set noat +#ifndef CONFIG_CPU_DADDI_WORKAROUNDS bnez src, 1b SUB src, src, 1 +#else + li v1, 1 + bnez src, 1b + SUB src, src, v1 +#endif li v1, -EFAULT b done sw v1, (errptr) @@ -712,4 +752,5 @@ s_exc: li v1, -EFAULT jr ra sw v1, (errptr) + .set pop END(__csum_partial_copy_user) diff --git a/arch/mips/lib/memcpy-inatomic.S b/arch/mips/lib/memcpy-inatomic.S index 3a534b2..d1b08f5 100644 --- a/arch/mips/lib/memcpy-inatomic.S +++ b/arch/mips/lib/memcpy-inatomic.S @@ -9,6 +9,7 @@ * Copyright (C) 1999, 2000, 01, 2002 Silicon Graphics, Inc. * Copyright (C) 2002 Broadcom, Inc. * memcpy/copy_user author: Mark Vandevoorde + * Copyright (C) 2007 Maciej W. Rozycki * * Mnemonic names for arguments to memcpy/__copy_user */ @@ -175,7 +176,11 @@ .text .set noreorder +#ifndef CONFIG_CPU_DADDI_WORKAROUNDS .set noat +#else + .set at=v1 +#endif /* * A combined memcpy/__copy_user @@ -268,8 +273,10 @@ EXC( LOAD t3, UNIT(3)(src), l_exc_copy) STORE t1, UNIT(1)(dst) STORE t2, UNIT(2)(dst) STORE t3, UNIT(3)(dst) + .set reorder /* DADDI_WAR */ + ADD dst, dst, 4*NBYTES beqz len, done - ADD dst, dst, 4*NBYTES + .set noreorder less_than_4units: /* * rem = len % NBYTES @@ -281,8 +288,10 @@ EXC( LOAD t0, 0(src), l_exc) ADD src, src, NBYTES SUB len, len, NBYTES STORE t0, 0(dst) + .set reorder /* DADDI_WAR */ + ADD dst, dst, NBYTES bne rem, len, 1b - ADD dst, dst, NBYTES + .set noreorder /* * src and dst are aligned, need to copy rem bytes (rem < NBYTES) @@ -361,8 +370,10 @@ EXC( LDREST t3, REST(3)(src), l_exc_copy) STORE t2, UNIT(2)(dst) STORE t3, UNIT(3)(dst) PREF( 1, 9*32(dst) ) # 1 is PREF_STORE (not streamed) + .set reorder /* DADDI_WAR */ + ADD dst, dst, 4*NBYTES bne len, rem, 1b - ADD dst, dst, 4*NBYTES + .set noreorder cleanup_src_unaligned: beqz len, done @@ -375,8 +386,10 @@ EXC( LDREST t0, REST(0)(src), l_exc_copy) ADD src, src, NBYTES SUB len, len, NBYTES STORE t0, 0(dst) + .set reorder /* DADDI_WAR */ + ADD dst, dst, NBYTES bne len, rem, 1b - ADD dst, dst, NBYTES + .set noreorder copy_bytes_checklen: beqz len, done @@ -424,8 +437,10 @@ l_exc_copy: EXC( lb t1, 0(src), l_exc) ADD src, src, 1 sb t1, 0(dst) # can't fault -- we're copy_from_user + .set reorder /* DADDI_WAR */ + ADD dst, dst, 1 bne src, t0, 1b - ADD dst, dst, 1 + .set noreorder l_exc: LOAD t0, TI_TASK($28) nop diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S index a526c62..aded7b1 100644 --- a/arch/mips/lib/memcpy.S +++ b/arch/mips/lib/memcpy.S @@ -9,6 +9,7 @@ * Copyright (C) 1999, 2000, 01, 2002 Silicon Graphics, Inc. * Copyright (C) 2002 Broadcom, Inc. * memcpy/copy_user author: Mark Vandevoorde + * Copyright (C) 2007 Maciej W. Rozycki * * Mnemonic names for arguments to memcpy/__copy_user */ @@ -175,7 +176,11 @@ .text .set noreorder +#ifndef CONFIG_CPU_DADDI_WORKAROUNDS .set noat +#else + .set at=v1 +#endif /* * A combined memcpy/__copy_user @@ -271,8 +276,10 @@ EXC( STORE t0, UNIT(0)(dst), s_exc_p4u) EXC( STORE t1, UNIT(1)(dst), s_exc_p3u) EXC( STORE t2, UNIT(2)(dst), s_exc_p2u) EXC( STORE t3, UNIT(3)(dst), s_exc_p1u) + .set reorder /* DADDI_WAR */ + ADD dst, dst, 4*NBYTES beqz len, done - ADD dst, dst, 4*NBYTES + .set noreorder less_than_4units: /* * rem = len % NBYTES @@ -284,8 +291,10 @@ EXC( LOAD t0, 0(src), l_exc) ADD src, src, NBYTES SUB len, len, NBYTES EXC( STORE t0, 0(dst), s_exc_p1u) + .set reorder /* DADDI_WAR */ + ADD dst, dst, NBYTES bne rem, len, 1b - ADD dst, dst, NBYTES + .set noreorder /* * src and dst are aligned, need to copy rem bytes (rem < NBYTES) @@ -364,8 +373,10 @@ EXC( STORE t1, UNIT(1)(dst), s_exc_p3u) EXC( STORE t2, UNIT(2)(dst), s_exc_p2u) EXC( STORE t3, UNIT(3)(dst), s_exc_p1u) PREF( 1, 9*32(dst) ) # 1 is PREF_STORE (not streamed) + .set reorder /* DADDI_WAR */ + ADD dst, dst, 4*NBYTES bne len, rem, 1b - ADD dst, dst, 4*NBYTES + .set noreorder cleanup_src_unaligned: beqz len, done @@ -378,8 +389,10 @@ EXC( LDREST t0, REST(0)(src), l_exc_copy) ADD src, src, NBYTES SUB len, len, NBYTES EXC( STORE t0, 0(dst), s_exc_p1u) + .set reorder /* DADDI_WAR */ + ADD dst, dst, NBYTES bne len, rem, 1b - ADD dst, dst, NBYTES + .set noreorder copy_bytes_checklen: beqz len, done @@ -427,8 +440,10 @@ l_exc_copy: EXC( lb t1, 0(src), l_exc) ADD src, src, 1 sb t1, 0(dst) # can't fault -- we're copy_from_user + .set reorder /* DADDI_WAR */ + ADD dst, dst, 1 bne src, t0, 1b - ADD dst, dst, 1 + .set noreorder l_exc: LOAD t0, TI_TASK($28) nop @@ -446,20 +461,33 @@ l_exc: * Clear len bytes starting at dst. Can't call __bzero because it * might modify len. An inefficient loop for these rare times... */ + .set reorder /* DADDI_WAR */ + SUB src, len, 1 beqz len, done - SUB src, len, 1 + .set noreorder 1: sb zero, 0(dst) ADD dst, dst, 1 +#ifndef CONFIG_CPU_DADDI_WORKAROUNDS bnez src, 1b SUB src, src, 1 +#else + .set push + .set noat + li v1, 1 + bnez src, 1b + SUB src, src, v1 + .set pop +#endif jr ra nop -#define SEXC(n) \ -s_exc_p ## n ## u: \ - jr ra; \ - ADD len, len, n*NBYTES +#define SEXC(n) \ + .set reorder; /* DADDI_WAR */ \ +s_exc_p ## n ## u: \ + ADD len, len, n*NBYTES; \ + jr ra; \ + .set noreorder SEXC(8) SEXC(7) @@ -471,8 +499,10 @@ SEXC(2) SEXC(1) s_exc_p1: + .set reorder /* DADDI_WAR */ + ADD len, len, 1 jr ra - ADD len, len, 1 + .set noreorder s_exc: jr ra nop @@ -502,8 +532,10 @@ r_end_bytes: SUB a2, a2, 0x1 sb t0, -1(a0) SUB a1, a1, 0x1 + .set reorder /* DADDI_WAR */ + SUB a0, a0, 0x1 bnez a2, r_end_bytes - SUB a0, a0, 0x1 + .set noreorder r_out: jr ra @@ -514,8 +546,10 @@ r_end_bytes_up: SUB a2, a2, 0x1 sb t0, (a0) ADD a1, a1, 0x1 + .set reorder /* DADDI_WAR */ + ADD a0, a0, 0x1 bnez a2, r_end_bytes_up - ADD a0, a0, 0x1 + .set noreorder jr ra move a2, zero diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S index 3f8b8b3..3bf3842 100644 --- a/arch/mips/lib/memset.S +++ b/arch/mips/lib/memset.S @@ -5,6 +5,7 @@ * * Copyright (C) 1998, 1999, 2000 by Ralf Baechle * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + * Copyright (C) 2007 Maciej W. Rozycki */ #include #include @@ -74,8 +75,16 @@ FEXPORT(__bzero) bnez t0, small_memset andi t0, a0, LONGMASK /* aligned? */ +#ifndef CONFIG_CPU_DADDI_WORKAROUNDS beqz t0, 1f PTR_SUBU t0, LONGSIZE /* alignment in bytes */ +#else + .set noat + li AT, LONGSIZE + beqz t0, 1f + PTR_SUBU t0, AT /* alignment in bytes */ + .set at +#endif #ifdef __MIPSEB__ EX(LONG_S_L, a1, (a0), first_fixup) /* make word/dword aligned */ @@ -106,7 +115,7 @@ memset_partial: .set noat LONG_SRL AT, t0, 1 PTR_SUBU t1, AT - .set noat + .set at #endif jr t1 PTR_ADDU a0, t0 /* dest ptr */ diff --git a/arch/mips/lib/strncpy_user.S b/arch/mips/lib/strncpy_user.S index d16c76f..5c8fb9d 100644 --- a/arch/mips/lib/strncpy_user.S +++ b/arch/mips/lib/strncpy_user.S @@ -41,9 +41,9 @@ FEXPORT(__strncpy_from_user_nocheck_asm) beqz t0, 2f sb t0, (a0) PTR_ADDIU v0, 1 - bne v0, a2, 1b - PTR_ADDIU a0, 1 .set reorder + PTR_ADDIU a0, 1 + bne v0, a2, 1b 2: PTR_ADDU t0, a1, v0 xor t0, a1 bltz t0, fault diff --git a/arch/mips/lib/uncached.c b/arch/mips/lib/uncached.c index 58d14f4..27b012d 100644 --- a/arch/mips/lib/uncached.c +++ b/arch/mips/lib/uncached.c @@ -46,9 +46,9 @@ unsigned long __init run_uncached(void *func) if (sp >= (long)CKSEG0 && sp < (long)CKSEG2) usp = CKSEG1ADDR(sp); #ifdef CONFIG_64BIT - else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0LL, 0) && - (long long)sp < (long long)PHYS_TO_XKPHYS(8LL, 0)) - usp = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED, + else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0, 0) && + (long long)sp < (long long)PHYS_TO_XKPHYS(8, 0)) + usp = PHYS_TO_XKPHYS(K_CALG_UNCACHED, XKPHYS_TO_PHYS((long long)sp)); #endif else { @@ -58,9 +58,9 @@ unsigned long __init run_uncached(void *func) if (lfunc >= (long)CKSEG0 && lfunc < (long)CKSEG2) ufunc = CKSEG1ADDR(lfunc); #ifdef CONFIG_64BIT - else if ((long long)lfunc >= (long long)PHYS_TO_XKPHYS(0LL, 0) && - (long long)lfunc < (long long)PHYS_TO_XKPHYS(8LL, 0)) - ufunc = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED, + else if ((long long)lfunc >= (long long)PHYS_TO_XKPHYS(0, 0) && + (long long)lfunc < (long long)PHYS_TO_XKPHYS(8, 0)) + ufunc = PHYS_TO_XKPHYS(K_CALG_UNCACHED, XKPHYS_TO_PHYS((long long)lfunc)); #endif else { diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 9355f1c..c91b596 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -449,7 +449,7 @@ static inline void local_r4k_flush_cache_page(void *args) * If the page isn't marked valid, the page cannot possibly be * in the cache. */ - if (!(pte_val(*ptep) & _PAGE_PRESENT)) + if (!(pte_present(*ptep))) return; if ((mm == current->active_mm) && (pte_val(*ptep) & _PAGE_VALID)) @@ -468,8 +468,6 @@ static inline void local_r4k_flush_cache_page(void *args) if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) { r4k_blast_dcache_page(addr); - if (exec && !cpu_icache_snoops_remote_store) - r4k_blast_scache_page(addr); } if (exec) { if (vaddr && cpu_has_vtag_icache && mm == current->active_mm) { @@ -533,13 +531,6 @@ static inline void local_r4k_flush_icache_range(void *args) R4600_HIT_CACHEOP_WAR_IMPL; protected_blast_dcache_range(start, end); } - - if (!cpu_icache_snoops_remote_store && scache_size) { - if (end - start > scache_size) - r4k_blast_scache(); - else - protected_blast_scache_range(start, end); - } } if (end - start > icache_size) diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c index 4f770ac..9185fbf 100644 --- a/arch/mips/mm/pg-r4k.c +++ b/arch/mips/mm/pg-r4k.c @@ -4,6 +4,7 @@ * for more details. * * Copyright (C) 2003, 04, 05 Ralf Baechle (ralf@linux-mips.org) + * Copyright (C) 2007 Maciej W. Rozycki */ #include #include @@ -12,6 +13,7 @@ #include #include +#include #include #include #include @@ -255,64 +257,58 @@ static inline void build_store_reg(int reg) __build_store_reg(reg); } -static inline void build_addiu_a2_a0(unsigned long offset) +static inline void build_addiu_rt_rs(unsigned int rt, unsigned int rs, + unsigned long offset) { union mips_instruction mi; BUG_ON(offset > 0x7fff); - mi.i_format.opcode = cpu_has_64bit_gp_regs ? daddiu_op : addiu_op; - mi.i_format.rs = 4; /* $a0 */ - mi.i_format.rt = 6; /* $a2 */ - mi.i_format.simmediate = offset; + if (cpu_has_64bit_gp_regs && DADDI_WAR && r4k_daddiu_bug()) { + mi.i_format.opcode = addiu_op; + mi.i_format.rs = 0; /* $zero */ + mi.i_format.rt = 25; /* $t9 */ + mi.i_format.simmediate = offset; + emit_instruction(mi); + mi.r_format.opcode = spec_op; + mi.r_format.rs = rs; + mi.r_format.rt = 25; /* $t9 */ + mi.r_format.rd = rt; + mi.r_format.re = 0; + mi.r_format.func = daddu_op; + } else { + mi.i_format.opcode = cpu_has_64bit_gp_regs ? + daddiu_op : addiu_op; + mi.i_format.rs = rs; + mi.i_format.rt = rt; + mi.i_format.simmediate = offset; + } emit_instruction(mi); } -static inline void build_addiu_a2(unsigned long offset) +static inline void build_addiu_a2_a0(unsigned long offset) { - union mips_instruction mi; - - BUG_ON(offset > 0x7fff); - - mi.i_format.opcode = cpu_has_64bit_gp_regs ? daddiu_op : addiu_op; - mi.i_format.rs = 6; /* $a2 */ - mi.i_format.rt = 6; /* $a2 */ - mi.i_format.simmediate = offset; + build_addiu_rt_rs(6, 4, offset); /* $a2, $a0, offset */ +} - emit_instruction(mi); +static inline void build_addiu_a2(unsigned long offset) +{ + build_addiu_rt_rs(6, 6, offset); /* $a2, $a2, offset */ } static inline void build_addiu_a1(unsigned long offset) { - union mips_instruction mi; - - BUG_ON(offset > 0x7fff); - - mi.i_format.opcode = cpu_has_64bit_gp_regs ? daddiu_op : addiu_op; - mi.i_format.rs = 5; /* $a1 */ - mi.i_format.rt = 5; /* $a1 */ - mi.i_format.simmediate = offset; + build_addiu_rt_rs(5, 5, offset); /* $a1, $a1, offset */ load_offset -= offset; - - emit_instruction(mi); } static inline void build_addiu_a0(unsigned long offset) { - union mips_instruction mi; - - BUG_ON(offset > 0x7fff); - - mi.i_format.opcode = cpu_has_64bit_gp_regs ? daddiu_op : addiu_op; - mi.i_format.rs = 4; /* $a0 */ - mi.i_format.rt = 4; /* $a0 */ - mi.i_format.simmediate = offset; + build_addiu_rt_rs(4, 4, offset); /* $a0, $a0, offset */ store_offset -= offset; - - emit_instruction(mi); } static inline void build_bne(unsigned int *dest) diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index a61246d..98e17e2 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -6,7 +6,7 @@ * Synthesize TLB refill handlers at runtime. * * Copyright (C) 2004,2005,2006 by Thiemo Seufer - * Copyright (C) 2005 Maciej W. Rozycki + * Copyright (C) 2005, 2007 Maciej W. Rozycki * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) * * ... and the days got worse and worse and now you see @@ -19,20 +19,15 @@ * (Condolences to Napoleon XIV) */ -#include - -#include #include #include #include #include -#include -#include +#include #include #include #include -#include #include static inline int r45k_bvahwbug(void) @@ -66,7 +61,7 @@ static inline int __maybe_unused r10000_llsc_war(void) * why; it's not an issue caused by the core RTL. * */ -static __init int __attribute__((unused)) m4kc_tlbp_war(void) +static int __init m4kc_tlbp_war(void) { return (current_cpu_data.processor_id & 0xffff00) == (PRID_COMP_MIPS | PRID_IMP_4KC); @@ -140,7 +135,7 @@ struct insn { | (e) << RE_SH \ | (f) << FUNC_SH) -static __initdata struct insn insn_table[] = { +static struct insn insn_table[] __initdata = { { insn_addiu, M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, { insn_addu, M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD }, { insn_and, M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD }, @@ -193,7 +188,7 @@ static __initdata struct insn insn_table[] = { #undef M -static __init u32 build_rs(u32 arg) +static u32 __init build_rs(u32 arg) { if (arg & ~RS_MASK) printk(KERN_WARNING "TLB synthesizer field overflow\n"); @@ -201,7 +196,7 @@ static __init u32 build_rs(u32 arg) return (arg & RS_MASK) << RS_SH; } -static __init u32 build_rt(u32 arg) +static u32 __init build_rt(u32 arg) { if (arg & ~RT_MASK) printk(KERN_WARNING "TLB synthesizer field overflow\n"); @@ -209,7 +204,7 @@ static __init u32 build_rt(u32 arg) return (arg & RT_MASK) << RT_SH; } -static __init u32 build_rd(u32 arg) +static u32 __init build_rd(u32 arg) { if (arg & ~RD_MASK) printk(KERN_WARNING "TLB synthesizer field overflow\n"); @@ -217,7 +212,7 @@ static __init u32 build_rd(u32 arg) return (arg & RD_MASK) << RD_SH; } -static __init u32 build_re(u32 arg) +static u32 __init build_re(u32 arg) { if (arg & ~RE_MASK) printk(KERN_WARNING "TLB synthesizer field overflow\n"); @@ -225,7 +220,7 @@ static __init u32 build_re(u32 arg) return (arg & RE_MASK) << RE_SH; } -static __init u32 build_simm(s32 arg) +static u32 __init build_simm(s32 arg) { if (arg > 0x7fff || arg < -0x8000) printk(KERN_WARNING "TLB synthesizer field overflow\n"); @@ -233,7 +228,7 @@ static __init u32 build_simm(s32 arg) return arg & 0xffff; } -static __init u32 build_uimm(u32 arg) +static u32 __init build_uimm(u32 arg) { if (arg & ~IMM_MASK) printk(KERN_WARNING "TLB synthesizer field overflow\n"); @@ -241,7 +236,7 @@ static __init u32 build_uimm(u32 arg) return arg & IMM_MASK; } -static __init u32 build_bimm(s32 arg) +static u32 __init build_bimm(s32 arg) { if (arg > 0x1ffff || arg < -0x20000) printk(KERN_WARNING "TLB synthesizer field overflow\n"); @@ -252,7 +247,7 @@ static __init u32 build_bimm(s32 arg) return ((arg < 0) ? (1 << 15) : 0) | ((arg >> 2) & 0x7fff); } -static __init u32 build_jimm(u32 arg) +static u32 __init build_jimm(u32 arg) { if (arg & ~((JIMM_MASK) << 2)) printk(KERN_WARNING "TLB synthesizer field overflow\n"); @@ -260,7 +255,7 @@ static __init u32 build_jimm(u32 arg) return (arg >> 2) & JIMM_MASK; } -static __init u32 build_func(u32 arg) +static u32 __init build_func(u32 arg) { if (arg & ~FUNC_MASK) printk(KERN_WARNING "TLB synthesizer field overflow\n"); @@ -268,7 +263,7 @@ static __init u32 build_func(u32 arg) return arg & FUNC_MASK; } -static __init u32 build_set(u32 arg) +static u32 __init build_set(u32 arg) { if (arg & ~SET_MASK) printk(KERN_WARNING "TLB synthesizer field overflow\n"); @@ -293,7 +288,7 @@ static void __init build_insn(u32 **buf, enum opcode opc, ...) break; } - if (!ip) + if (!ip || (opc == insn_daddiu && r4k_daddiu_bug())) panic("Unsupported TLB synthesizer instruction %d", opc); op = ip->match; @@ -315,69 +310,69 @@ static void __init build_insn(u32 **buf, enum opcode opc, ...) } #define I_u1u2u3(op) \ - static inline void __init i##op(u32 **buf, unsigned int a, \ + static void __init __maybe_unused i##op(u32 **buf, unsigned int a, \ unsigned int b, unsigned int c) \ { \ build_insn(buf, insn##op, a, b, c); \ } #define I_u2u1u3(op) \ - static inline void __init i##op(u32 **buf, unsigned int a, \ + static void __init __maybe_unused i##op(u32 **buf, unsigned int a, \ unsigned int b, unsigned int c) \ { \ build_insn(buf, insn##op, b, a, c); \ } #define I_u3u1u2(op) \ - static inline void __init i##op(u32 **buf, unsigned int a, \ + static void __init __maybe_unused i##op(u32 **buf, unsigned int a, \ unsigned int b, unsigned int c) \ { \ build_insn(buf, insn##op, b, c, a); \ } #define I_u1u2s3(op) \ - static inline void __init i##op(u32 **buf, unsigned int a, \ + static void __init __maybe_unused i##op(u32 **buf, unsigned int a, \ unsigned int b, signed int c) \ { \ build_insn(buf, insn##op, a, b, c); \ } #define I_u2s3u1(op) \ - static inline void __init i##op(u32 **buf, unsigned int a, \ + static void __init __maybe_unused i##op(u32 **buf, unsigned int a, \ signed int b, unsigned int c) \ { \ build_insn(buf, insn##op, c, a, b); \ } #define I_u2u1s3(op) \ - static inline void __init i##op(u32 **buf, unsigned int a, \ + static void __init __maybe_unused i##op(u32 **buf, unsigned int a, \ unsigned int b, signed int c) \ { \ build_insn(buf, insn##op, b, a, c); \ } #define I_u1u2(op) \ - static inline void __init i##op(u32 **buf, unsigned int a, \ + static void __init __maybe_unused i##op(u32 **buf, unsigned int a, \ unsigned int b) \ { \ build_insn(buf, insn##op, a, b); \ } #define I_u1s2(op) \ - static inline void __init i##op(u32 **buf, unsigned int a, \ + static void __init __maybe_unused i##op(u32 **buf, unsigned int a, \ signed int b) \ { \ build_insn(buf, insn##op, a, b); \ } #define I_u1(op) \ - static inline void __init i##op(u32 **buf, unsigned int a) \ + static void __init __maybe_unused i##op(u32 **buf, unsigned int a) \ { \ build_insn(buf, insn##op, a); \ } #define I_0(op) \ - static inline void __init i##op(u32 **buf) \ + static void __init __maybe_unused i##op(u32 **buf) \ { \ build_insn(buf, insn##op); \ } @@ -457,7 +452,7 @@ struct label { enum label_id lab; }; -static __init void build_label(struct label **lab, u32 *addr, +static void __init build_label(struct label **lab, u32 *addr, enum label_id l) { (*lab)->addr = addr; @@ -466,7 +461,7 @@ static __init void build_label(struct label **lab, u32 *addr, } #define L_LA(lb) \ - static inline void l##lb(struct label **lab, u32 *addr) \ + static inline void __init l##lb(struct label **lab, u32 *addr) \ { \ build_label(lab, addr, label##lb); \ } @@ -525,37 +520,46 @@ L_LA(_r3000_write_probe_fail) #define i_ssnop(buf) i_sll(buf, 0, 0, 1) #define i_ehb(buf) i_sll(buf, 0, 0, 3) -#ifdef CONFIG_64BIT -static __init int __maybe_unused in_compat_space_p(long addr) +static int __init __maybe_unused in_compat_space_p(long addr) { /* Is this address in 32bit compat space? */ +#ifdef CONFIG_64BIT return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L); +#else + return 1; +#endif } -static __init int __maybe_unused rel_highest(long val) +static int __init __maybe_unused rel_highest(long val) { +#ifdef CONFIG_64BIT return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000; +#else + return 0; +#endif } -static __init int __maybe_unused rel_higher(long val) +static int __init __maybe_unused rel_higher(long val) { +#ifdef CONFIG_64BIT return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000; -} +#else + return 0; #endif +} -static __init int rel_hi(long val) +static int __init rel_hi(long val) { return ((((val + 0x8000L) >> 16) & 0xffff) ^ 0x8000) - 0x8000; } -static __init int rel_lo(long val) +static int __init rel_lo(long val) { return ((val & 0xffff) ^ 0x8000) - 0x8000; } -static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr) +static void __init i_LA_mostly(u32 **buf, unsigned int rs, long addr) { -#ifdef CONFIG_64BIT if (!in_compat_space_p(addr)) { i_lui(buf, rs, rel_highest(addr)); if (rel_higher(addr)) @@ -567,16 +571,18 @@ static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr) } else i_dsll32(buf, rs, rs, 0); } else -#endif i_lui(buf, rs, rel_hi(addr)); } -static __init void __maybe_unused i_LA(u32 **buf, unsigned int rs, - long addr) +static void __init __maybe_unused i_LA(u32 **buf, unsigned int rs, long addr) { i_LA_mostly(buf, rs, addr); - if (rel_lo(addr)) - i_ADDIU(buf, rs, rs, rel_lo(addr)); + if (rel_lo(addr)) { + if (!in_compat_space_p(addr)) + i_daddiu(buf, rs, rs, rel_lo(addr)); + else + i_addiu(buf, rs, rs, rel_lo(addr)); + } } /* @@ -589,7 +595,7 @@ struct reloc { enum label_id lab; }; -static __init void r_mips_pc16(struct reloc **rel, u32 *addr, +static void __init r_mips_pc16(struct reloc **rel, u32 *addr, enum label_id l) { (*rel)->addr = addr; @@ -614,7 +620,7 @@ static inline void __resolve_relocs(struct reloc *rel, struct label *lab) } } -static __init void resolve_relocs(struct reloc *rel, struct label *lab) +static void __init resolve_relocs(struct reloc *rel, struct label *lab) { struct label *l; @@ -624,7 +630,7 @@ static __init void resolve_relocs(struct reloc *rel, struct label *lab) __resolve_relocs(rel, l); } -static __init void move_relocs(struct reloc *rel, u32 *first, u32 *end, +static void __init move_relocs(struct reloc *rel, u32 *first, u32 *end, long off) { for (; rel->lab != label_invalid; rel++) @@ -632,7 +638,7 @@ static __init void move_relocs(struct reloc *rel, u32 *first, u32 *end, rel->addr += off; } -static __init void move_labels(struct label *lab, u32 *first, u32 *end, +static void __init move_labels(struct label *lab, u32 *first, u32 *end, long off) { for (; lab->lab != label_invalid; lab++) @@ -640,7 +646,7 @@ static __init void move_labels(struct label *lab, u32 *first, u32 *end, lab->addr += off; } -static __init void copy_handler(struct reloc *rel, struct label *lab, +static void __init copy_handler(struct reloc *rel, struct label *lab, u32 *first, u32 *end, u32 *target) { long off = (long)(target - first); @@ -651,7 +657,7 @@ static __init void copy_handler(struct reloc *rel, struct label *lab, move_labels(lab, first, end, off); } -static __init int __maybe_unused insn_has_bdelay(struct reloc *rel, +static int __init __maybe_unused insn_has_bdelay(struct reloc *rel, u32 *addr) { for (; rel->lab != label_invalid; rel++) { @@ -714,6 +720,22 @@ il_bgez(u32 **p, struct reloc **r, unsigned int reg, enum label_id l) i_bgez(p, reg, 0); } +/* + * For debug purposes. + */ +static inline void dump_handler(const u32 *handler, int count) +{ + int i; + + pr_debug("\t.set push\n"); + pr_debug("\t.set noreorder\n"); + + for (i = 0; i < count; i++) + pr_debug("\t%p\t.word 0x%08x\n", &handler[i], handler[i]); + + pr_debug("\t.set pop\n"); +} + /* The only general purpose registers allowed in TLB handlers. */ #define K0 26 #define K1 27 @@ -743,11 +765,11 @@ il_bgez(u32 **p, struct reloc **r, unsigned int reg, enum label_id l) * We deliberately chose a buffer size of 128, so we won't scribble * over anything important on overflow before we panic. */ -static __initdata u32 tlb_handler[128]; +static u32 tlb_handler[128] __initdata; /* simply assume worst case size for labels and relocs */ -static __initdata struct label labels[128]; -static __initdata struct reloc relocs[128]; +static struct label labels[128] __initdata; +static struct reloc relocs[128] __initdata; /* * The R3000 TLB handler is simple. @@ -756,7 +778,6 @@ static void __init build_r3000_tlb_refill_handler(void) { long pgdc = (long)pgd_current; u32 *p; - int i; memset(tlb_handler, 0, sizeof(tlb_handler)); p = tlb_handler; @@ -785,13 +806,9 @@ static void __init build_r3000_tlb_refill_handler(void) pr_info("Synthesized TLB refill handler (%u instructions).\n", (unsigned int)(p - tlb_handler)); - pr_debug("\t.set push\n"); - pr_debug("\t.set noreorder\n"); - for (i = 0; i < (p - tlb_handler); i++) - pr_debug("\t.word 0x%08x\n", tlb_handler[i]); - pr_debug("\t.set pop\n"); - memcpy((void *)ebase, tlb_handler, 0x80); + + dump_handler((u32 *)ebase, 32); } /* @@ -801,7 +818,7 @@ static void __init build_r3000_tlb_refill_handler(void) * other one.To keep things simple, we first assume linear space, * then we relocate it to the final handler layout as needed. */ -static __initdata u32 final_handler[64]; +static u32 final_handler[64] __initdata; /* * Hazards @@ -825,7 +842,7 @@ static __initdata u32 final_handler[64]; * * As if we MIPS hackers wouldn't know how to nop pipelines happy ... */ -static __init void __maybe_unused build_tlb_probe_entry(u32 **p) +static void __init __maybe_unused build_tlb_probe_entry(u32 **p) { switch (current_cpu_type()) { /* Found by experiment: R4600 v2.0 needs this, too. */ @@ -849,7 +866,7 @@ static __init void __maybe_unused build_tlb_probe_entry(u32 **p) */ enum tlb_write_entry { tlb_random, tlb_indexed }; -static __init void build_tlb_write_entry(u32 **p, struct label **l, +static void __init build_tlb_write_entry(u32 **p, struct label **l, struct reloc **r, enum tlb_write_entry wmode) { @@ -935,14 +952,6 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, tlbw(p); break; - case CPU_4KEC: - case CPU_24K: - case CPU_34K: - case CPU_74K: - i_ehb(p); - tlbw(p); - break; - case CPU_RM9000: /* * When the JTLB is updated by tlbwi or tlbwr, a subsequent @@ -982,9 +991,14 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, break; default: - panic("No TLB refill handler yet (CPU type: %d)", - current_cpu_data.cputype); - break; + if (cpu_has_mips_r2) { + i_ehb(p); + tlbw(p); + break; + } + + panic("No TLB refill handler yet for CPU type: %s", + cpu_name_string()); } } @@ -993,7 +1007,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, * TMP and PTR are scratch. * TMP will be clobbered, PTR will hold the pmd entry. */ -static __init void +static void __init build_get_pmde64(u32 **p, struct label **l, struct reloc **r, unsigned int tmp, unsigned int ptr) { @@ -1054,7 +1068,7 @@ build_get_pmde64(u32 **p, struct label **l, struct reloc **r, * BVADDR is the faulting address, PTR is scratch. * PTR will hold the pgd for vmalloc. */ -static __init void +static void __init build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r, unsigned int bvaddr, unsigned int ptr) { @@ -1087,7 +1101,10 @@ build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r, } else { i_LA_mostly(p, ptr, modd); il_b(p, r, label_vmalloc_done); - i_daddiu(p, ptr, ptr, rel_lo(modd)); + if (in_compat_space_p(modd)) + i_addiu(p, ptr, ptr, rel_lo(modd)); + else + i_daddiu(p, ptr, ptr, rel_lo(modd)); } l_vmalloc(l, *p); @@ -1108,7 +1125,10 @@ build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r, } else { i_LA_mostly(p, ptr, swpd); il_b(p, r, label_vmalloc_done); - i_daddiu(p, ptr, ptr, rel_lo(swpd)); + if (in_compat_space_p(swpd)) + i_addiu(p, ptr, ptr, rel_lo(swpd)); + else + i_daddiu(p, ptr, ptr, rel_lo(swpd)); } } @@ -1118,7 +1138,7 @@ build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r, * TMP and PTR are scratch. * TMP will be clobbered, PTR will hold the pgd entry. */ -static __init void __maybe_unused +static void __init __maybe_unused build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr) { long pgdc = (long)pgd_current; @@ -1153,7 +1173,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr) #endif /* !CONFIG_64BIT */ -static __init void build_adjust_context(u32 **p, unsigned int ctx) +static void __init build_adjust_context(u32 **p, unsigned int ctx) { unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12; unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1); @@ -1179,7 +1199,7 @@ static __init void build_adjust_context(u32 **p, unsigned int ctx) i_andi(p, ctx, ctx, mask); } -static __init void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr) +static void __init build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr) { /* * Bug workaround for the Nevada. It seems as if under certain @@ -1204,7 +1224,7 @@ static __init void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr) i_ADDU(p, ptr, ptr, tmp); /* add in offset */ } -static __init void build_update_entries(u32 **p, unsigned int tmp, +static void __init build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep) { /* @@ -1254,7 +1274,6 @@ static void __init build_r4000_tlb_refill_handler(void) struct reloc *r = relocs; u32 *f; unsigned int final_len; - int i; memset(tlb_handler, 0, sizeof(tlb_handler)); memset(labels, 0, sizeof(labels)); @@ -1356,20 +1375,9 @@ static void __init build_r4000_tlb_refill_handler(void) pr_info("Synthesized TLB refill handler (%u instructions).\n", final_len); - f = final_handler; -#if defined(CONFIG_64BIT) && !defined(CONFIG_CPU_LOONGSON2) - if (final_len > 32) - final_len = 64; - else - f = final_handler + 32; -#endif /* CONFIG_64BIT */ - pr_debug("\t.set push\n"); - pr_debug("\t.set noreorder\n"); - for (i = 0; i < final_len; i++) - pr_debug("\t.word 0x%08x\n", f[i]); - pr_debug("\t.set pop\n"); - memcpy((void *)ebase, final_handler, 0x100); + + dump_handler((u32 *)ebase, 64); } /* @@ -1381,18 +1389,15 @@ static void __init build_r4000_tlb_refill_handler(void) extern void tlb_do_page_fault_0(void); extern void tlb_do_page_fault_1(void); -#define __tlb_handler_align \ - __attribute__((__aligned__(1 << CONFIG_MIPS_L1_CACHE_SHIFT))) - /* * 128 instructions for the fastpath handler is generous and should * never be exceeded. */ #define FASTPATH_SIZE 128 -u32 __tlb_handler_align handle_tlbl[FASTPATH_SIZE]; -u32 __tlb_handler_align handle_tlbs[FASTPATH_SIZE]; -u32 __tlb_handler_align handle_tlbm[FASTPATH_SIZE]; +u32 handle_tlbl[FASTPATH_SIZE] __cacheline_aligned; +u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned; +u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned; static void __init iPTE_LW(u32 **p, struct label **l, unsigned int pte, unsigned int ptr) @@ -1600,7 +1605,6 @@ static void __init build_r3000_tlb_load_handler(void) u32 *p = handle_tlbl; struct label *l = labels; struct reloc *r = relocs; - int i; memset(handle_tlbl, 0, sizeof(handle_tlbl)); memset(labels, 0, sizeof(labels)); @@ -1623,11 +1627,7 @@ static void __init build_r3000_tlb_load_handler(void) pr_info("Synthesized TLB load handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbl)); - pr_debug("\t.set push\n"); - pr_debug("\t.set noreorder\n"); - for (i = 0; i < (p - handle_tlbl); i++) - pr_debug("\t.word 0x%08x\n", handle_tlbl[i]); - pr_debug("\t.set pop\n"); + dump_handler(handle_tlbl, ARRAY_SIZE(handle_tlbl)); } static void __init build_r3000_tlb_store_handler(void) @@ -1635,7 +1635,6 @@ static void __init build_r3000_tlb_store_handler(void) u32 *p = handle_tlbs; struct label *l = labels; struct reloc *r = relocs; - int i; memset(handle_tlbs, 0, sizeof(handle_tlbs)); memset(labels, 0, sizeof(labels)); @@ -1658,11 +1657,7 @@ static void __init build_r3000_tlb_store_handler(void) pr_info("Synthesized TLB store handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbs)); - pr_debug("\t.set push\n"); - pr_debug("\t.set noreorder\n"); - for (i = 0; i < (p - handle_tlbs); i++) - pr_debug("\t.word 0x%08x\n", handle_tlbs[i]); - pr_debug("\t.set pop\n"); + dump_handler(handle_tlbs, ARRAY_SIZE(handle_tlbs)); } static void __init build_r3000_tlb_modify_handler(void) @@ -1670,7 +1665,6 @@ static void __init build_r3000_tlb_modify_handler(void) u32 *p = handle_tlbm; struct label *l = labels; struct reloc *r = relocs; - int i; memset(handle_tlbm, 0, sizeof(handle_tlbm)); memset(labels, 0, sizeof(labels)); @@ -1693,11 +1687,7 @@ static void __init build_r3000_tlb_modify_handler(void) pr_info("Synthesized TLB modify handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbm)); - pr_debug("\t.set push\n"); - pr_debug("\t.set noreorder\n"); - for (i = 0; i < (p - handle_tlbm); i++) - pr_debug("\t.word 0x%08x\n", handle_tlbm[i]); - pr_debug("\t.set pop\n"); + dump_handler(handle_tlbm, ARRAY_SIZE(handle_tlbm)); } /* @@ -1750,7 +1740,6 @@ static void __init build_r4000_tlb_load_handler(void) u32 *p = handle_tlbl; struct label *l = labels; struct reloc *r = relocs; - int i; memset(handle_tlbl, 0, sizeof(handle_tlbl)); memset(labels, 0, sizeof(labels)); @@ -1783,11 +1772,7 @@ static void __init build_r4000_tlb_load_handler(void) pr_info("Synthesized TLB load handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbl)); - pr_debug("\t.set push\n"); - pr_debug("\t.set noreorder\n"); - for (i = 0; i < (p - handle_tlbl); i++) - pr_debug("\t.word 0x%08x\n", handle_tlbl[i]); - pr_debug("\t.set pop\n"); + dump_handler(handle_tlbl, ARRAY_SIZE(handle_tlbl)); } static void __init build_r4000_tlb_store_handler(void) @@ -1795,7 +1780,6 @@ static void __init build_r4000_tlb_store_handler(void) u32 *p = handle_tlbs; struct label *l = labels; struct reloc *r = relocs; - int i; memset(handle_tlbs, 0, sizeof(handle_tlbs)); memset(labels, 0, sizeof(labels)); @@ -1819,11 +1803,7 @@ static void __init build_r4000_tlb_store_handler(void) pr_info("Synthesized TLB store handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbs)); - pr_debug("\t.set push\n"); - pr_debug("\t.set noreorder\n"); - for (i = 0; i < (p - handle_tlbs); i++) - pr_debug("\t.word 0x%08x\n", handle_tlbs[i]); - pr_debug("\t.set pop\n"); + dump_handler(handle_tlbs, ARRAY_SIZE(handle_tlbs)); } static void __init build_r4000_tlb_modify_handler(void) @@ -1831,7 +1811,6 @@ static void __init build_r4000_tlb_modify_handler(void) u32 *p = handle_tlbm; struct label *l = labels; struct reloc *r = relocs; - int i; memset(handle_tlbm, 0, sizeof(handle_tlbm)); memset(labels, 0, sizeof(labels)); @@ -1856,11 +1835,7 @@ static void __init build_r4000_tlb_modify_handler(void) pr_info("Synthesized TLB modify handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbm)); - pr_debug("\t.set push\n"); - pr_debug("\t.set noreorder\n"); - for (i = 0; i < (p - handle_tlbm); i++) - pr_debug("\t.word 0x%08x\n", handle_tlbm[i]); - pr_debug("\t.set pop\n"); + dump_handler(handle_tlbm, ARRAY_SIZE(handle_tlbm)); } void __init build_tlb_refill_handler(void) diff --git a/arch/mips/philips/pnx8550/common/setup.c b/arch/mips/philips/pnx8550/common/setup.c index 2ce298f..92d764c 100644 --- a/arch/mips/philips/pnx8550/common/setup.c +++ b/arch/mips/philips/pnx8550/common/setup.c @@ -74,7 +74,7 @@ struct resource standard_io_resources[] = { }, }; -#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource)) +#define STANDARD_IO_RESOURCES ARRAY_SIZE(standard_io_resources) extern struct resource pci_io_resource; extern struct resource pci_mem_resource; diff --git a/arch/mips/philips/pnx8550/jbs/init.c b/arch/mips/philips/pnx8550/jbs/init.c index cfd90fa..90b4d35 100644 --- a/arch/mips/philips/pnx8550/jbs/init.c +++ b/arch/mips/philips/pnx8550/jbs/init.c @@ -45,11 +45,8 @@ const char *get_system_type(void) void __init prom_init(void) { - unsigned long memsize; - mips_machtype = MACH_PHILIPS_JBS; - //memsize = 0x02800000; /* Trimedia uses memory above */ memsize = 0x08000000; /* Trimedia uses memory above */ add_memory_region(0, memsize, BOOT_MEM_RAM); diff --git a/arch/mips/philips/pnx8550/stb810/prom_init.c b/arch/mips/philips/pnx8550/stb810/prom_init.c index fdb33ed..832dd60 100644 --- a/arch/mips/philips/pnx8550/stb810/prom_init.c +++ b/arch/mips/philips/pnx8550/stb810/prom_init.c @@ -41,8 +41,6 @@ void __init prom_init(void) prom_init_cmdline(); - mips_machtype = MACH_PHILIPS_STB810; - memsize = 0x08000000; /* Trimedia uses memory above */ add_memory_region(0, memsize, BOOT_MEM_RAM); } diff --git a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h deleted file mode 100644 index 31c5523..0000000 --- a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * arch/mips/pmc-sierra/yosemite/i2c-yosemite.h - * - * Copyright (C) 2003 PMC-Sierra Inc. - * Author: Manish Lachwani (lachwani@pmc-sierra.com) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __I2C_YOSEMITE_H -#define __I2C_YOSEMITE_H - -/* Read and Write operations to the chip */ - -#define TITAN_I2C_BASE 0xbb000000 /* XXX Needs to change */ - -#define TITAN_I2C_WRITE(offset, data) \ - *(volatile unsigned long *)(TITAN_I2C_BASE + offset) = data - -#define TITAN_I2C_READ(offset) *(volatile unsigned long *)(TITAN_I2C_BASE + offset) - - -/* Local constansts*/ -#define TITAN_I2C_MAX_FILTER 15 -#define TITAN_I2C_MAX_CLK 1023 -#define TITAN_I2C_MAX_ARBF 15 -#define TITAN_I2C_MAX_NAK 15 -#define TITAN_I2C_MAX_MASTERCODE 7 -#define TITAN_I2C_MAX_WORDS_PER_RW 4 -#define TITAN_I2C_MAX_POLL 100 - -/* Registers used for I2C work */ -#define TITAN_I2C_SCMB_CONTROL 0x0180 /* SCMB Control */ -#define TITAN_I2C_SCMB_CLOCK_A 0x0184 /* SCMB Clock A */ -#define TITAN_I2C_SCMB_CLOCK_B 0x0188 /* SCMB Clock B */ -#define TITAN_I2C_CONFIG 0x01A0 /* I2C Config */ -#define TITAN_I2C_COMMAND 0x01A4 /* I2C Command */ -#define TITAN_I2C_SLAVE_ADDRESS 0x01A8 /* I2C Slave Address */ -#define TITAN_I2C_DATA 0x01AC /* I2C Data [15:0] */ -#define TITAN_I2C_INTERRUPTS 0x01BC /* I2C Interrupts */ - -/* Error */ -#define TITAN_I2C_ERR_ARB_LOST (-9220) -#define TITAN_I2C_ERR_NO_RESP (-9221) -#define TITAN_I2C_ERR_DATA_COLLISION (-9222) -#define TITAN_I2C_ERR_TIMEOUT (-9223) -#define TITAN_I2C_ERR_OK 0 - -/* I2C Command Type */ -typedef enum { - TITAN_I2C_CMD_WRITE = 0, - TITAN_I2C_CMD_READ = 1, - TITAN_I2C_CMD_READ_WRITE = 2 -} titan_i2c_cmd_type; - -/* I2C structures */ -typedef struct { - int filtera; /* Register 0x0184, bits 15 - 12 */ - int clka; /* Register 0x0184, bits 9 - 0 */ - int filterb; /* Register 0x0188, bits 15 - 12 */ - int clkb; /* Register 0x0188, bits 9 - 0 */ -} titan_i2c_config; - -/* I2C command type */ -typedef struct { - titan_i2c_cmd_type type; /* Type of command */ - int num_arb; /* Register 0x01a0, bits 15 - 12 */ - int num_nak; /* Register 0x01a0, bits 11 - 8 */ - int addr_size; /* Register 0x01a0, bit 7 */ - int mst_code; /* Register 0x01a0, bits 6 - 4 */ - int arb_en; /* Register 0x01a0, bit 1 */ - int speed; /* Register 0x01a0, bit 0 */ - int slave_addr; /* Register 0x01a8 */ - int write_size; /* Register 0x01a4, bits 10 - 8 */ - unsigned int *data; /* Register 0x01ac */ -} titan_i2c_command; - -#endif /* __I2C_YOSEMITE_H */ diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c index 9b9936d..96d3ff0 100644 --- a/arch/mips/pmc-sierra/yosemite/prom.c +++ b/arch/mips/pmc-sierra/yosemite/prom.c @@ -126,8 +126,6 @@ void __init prom_init(void) env++; } - mips_machtype = MACH_TITAN_YOSEMITE; - prom_grab_secondary(); } diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c index 969cedc..9f0c2d3 100644 --- a/arch/mips/qemu/q-setup.c +++ b/arch/mips/qemu/q-setup.c @@ -1,4 +1,5 @@ #include +#include #include #include @@ -20,3 +21,17 @@ void __init plat_mem_setup(void) { qemu_reboot_setup(); } + +static struct platform_device pcspeaker_pdev = { + .name = "pcspkr", + .id = -1, +}; + +static int __init qemu_platform_devinit(void) +{ + platform_device_register(&pcspeaker_pdev); + + return 0; +} + +device_initcall(qemu_platform_devinit); diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index 416f397..e5f12cf 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c @@ -76,6 +76,11 @@ static struct platform_device pcit_cmos_device = { .resource = pcit_cmos_rsrc }; +static struct platform_device pcit_pcspeaker_pdev = { + .name = "pcspkr", + .id = -1, +}; + static struct resource sni_io_resource = { .start = 0x00000000UL, .end = 0x03bfffffUL, @@ -277,11 +282,13 @@ static int __init snirm_pcit_setup_devinit(void) case SNI_BRD_PCI_TOWER: platform_device_register(&pcit_serial8250_device); platform_device_register(&pcit_cmos_device); + platform_device_register(&pcit_pcspeaker_pdev); break; case SNI_BRD_PCI_TOWER_CPLUS: platform_device_register(&pcit_cplus_serial8250_device); platform_device_register(&pcit_cmos_device); + platform_device_register(&pcit_pcspeaker_pdev); break; } return 0; diff --git a/arch/mips/tx4927/common/Makefile b/arch/mips/tx4927/common/Makefile index 1837578..e4a5e46 100644 --- a/arch/mips/tx4927/common/Makefile +++ b/arch/mips/tx4927/common/Makefile @@ -6,7 +6,7 @@ # unless it's something special (ie not a .c file). # -obj-y += tx4927_prom.o tx4927_setup.o tx4927_irq.o +obj-y += tx4927_prom.o tx4927_irq.o obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o obj-$(CONFIG_KGDB) += tx4927_dbgio.o diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c deleted file mode 100644 index 36c5f20..0000000 --- a/arch/mips/tx4927/common/tx4927_setup.c +++ /dev/null @@ -1,186 +0,0 @@ -/* - * Author: MontaVista Software, Inc. - * source@mvista.com - * - * Copyright 2001-2002 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -#undef DEBUG - -void dump_cp0(char *key); - - -void __init plat_mem_setup(void) -{ -#ifdef CONFIG_TOSHIBA_RBTX4927 - { - extern void toshiba_rbtx4927_setup(void); - toshiba_rbtx4927_setup(); - } -#endif -} - -void __init plat_time_init(void) -{ -#ifdef CONFIG_TOSHIBA_RBTX4927 - { - extern void toshiba_rbtx4927_time_init(void); - toshiba_rbtx4927_time_init(); - } -#endif -} - -#ifdef DEBUG -void print_cp0(char *key, int num, char *name, u32 val) -{ - printk("%s cp0:%02d:%s=0x%08x\n", key, num, name, val); - return; -} - -void -dump_cp0(char *key) -{ - if (key == NULL) - key = ""; - - print_cp0(key, 0, "INDEX ", read_c0_index()); - print_cp0(key, 2, "ENTRYLO1", read_c0_entrylo0()); - print_cp0(key, 3, "ENTRYLO2", read_c0_entrylo1()); - print_cp0(key, 4, "CONTEXT ", read_c0_context()); - print_cp0(key, 5, "PAGEMASK", read_c0_pagemask()); - print_cp0(key, 6, "WIRED ", read_c0_wired()); - //print_cp0(key, 8, "BADVADDR", read_c0_badvaddr()); - print_cp0(key, 9, "COUNT ", read_c0_count()); - print_cp0(key, 10, "ENTRYHI ", read_c0_entryhi()); - print_cp0(key, 11, "COMPARE ", read_c0_compare()); - print_cp0(key, 12, "STATUS ", read_c0_status()); - print_cp0(key, 13, "CAUSE ", read_c0_cause() & 0xffff87ff); - print_cp0(key, 16, "CONFIG ", read_c0_config()); - return; -} - -void print_pic(char *key, unsigned long reg, char *name) -{ - printk(KERN_INFO "%s pic:0x%08lx:%s=0x%08x\n", key, reg, name, - __raw_readl((void __iomem *)reg)); - return; -} - - -void dump_pic(char *key) -{ - if (key == NULL) - key = ""; - - print_pic(key, 0xff1ff600, "IRDEN "); - print_pic(key, 0xff1ff604, "IRDM0 "); - print_pic(key, 0xff1ff608, "IRDM1 "); - - print_pic(key, 0xff1ff610, "IRLVL0 "); - print_pic(key, 0xff1ff614, "IRLVL1 "); - print_pic(key, 0xff1ff618, "IRLVL2 "); - print_pic(key, 0xff1ff61c, "IRLVL3 "); - print_pic(key, 0xff1ff620, "IRLVL4 "); - print_pic(key, 0xff1ff624, "IRLVL5 "); - print_pic(key, 0xff1ff628, "IRLVL6 "); - print_pic(key, 0xff1ff62c, "IRLVL7 "); - - print_pic(key, 0xff1ff640, "IRMSK "); - print_pic(key, 0xff1ff660, "IREDC "); - print_pic(key, 0xff1ff680, "IRPND "); - print_pic(key, 0xff1ff6a0, "IRCS "); - - print_pic(key, 0xff1ff514, "IRFLAG1 "); /* don't read IRLAG0 -- it hangs system */ - - print_pic(key, 0xff1ff518, "IRPOL "); - print_pic(key, 0xff1ff51c, "IRRCNT "); - print_pic(key, 0xff1ff520, "IRMASKINT"); - print_pic(key, 0xff1ff524, "IRMASKEXT"); - - return; -} - - -void print_addr(char *hdr, char *key, unsigned long addr) -{ - printk(KERN_INFO "%s %s:0x%08lx=0x%08x\n", hdr, key, addr, - __raw_readl((void __iomem *)addr)); - return; -} - - -void dump_180(char *key) -{ - u32 i; - - for (i = 0x80000180; i < 0x80000180 + 0x80; i += 4) { - print_addr("180", key, i); - } - return; -} - - -void dump_eh0(char *key) -{ - int i; - extern unsigned long exception_handlers[]; - - for (i = (int) exception_handlers; - i < (int) (exception_handlers + 20); i += 4) { - print_addr("eh0", key, i); - } - - return; -} - -void pk0(void) -{ - volatile u32 val; - - __asm__ __volatile__("ori %0, $26, 0":"=r"(val) - ); - printk("k0=[0x%08x]\n", val); -} -#endif diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c index 0299595..c29a528 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c @@ -45,27 +45,18 @@ #include #include #include -#include -#include #include -#include #include #include -#include #include #include #include -#include #include -#include -#include #include #include #include #include -#include -#include #ifdef CONFIG_TOSHIBA_FPCIB0 #include #endif @@ -73,42 +64,26 @@ #ifdef CONFIG_PCI #include #endif -#ifdef CONFIG_BLK_DEV_IDEPCI -#include -#include -#endif #ifdef CONFIG_SERIAL_TXX9 -#include -#include #include #endif #undef TOSHIBA_RBTX4927_SETUP_DEBUG #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG -#define TOSHIBA_RBTX4927_SETUP_NONE 0x00000000 - -#define TOSHIBA_RBTX4927_SETUP_INFO ( 1 << 0 ) -#define TOSHIBA_RBTX4927_SETUP_WARN ( 1 << 1 ) -#define TOSHIBA_RBTX4927_SETUP_EROR ( 1 << 2 ) - -#define TOSHIBA_RBTX4927_SETUP_EFWFU ( 1 << 3 ) #define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 ) #define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 ) #define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 ) #define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 ) -#define TOSHIBA_RBTX4927_SETUP_PCI66 ( 1 << 10 ) #define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff #endif #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG static const u32 toshiba_rbtx4927_setup_debug_flag = - (TOSHIBA_RBTX4927_SETUP_NONE | TOSHIBA_RBTX4927_SETUP_INFO | - TOSHIBA_RBTX4927_SETUP_WARN | TOSHIBA_RBTX4927_SETUP_EROR | - TOSHIBA_RBTX4927_SETUP_EFWFU | TOSHIBA_RBTX4927_SETUP_SETUP | + (TOSHIBA_RBTX4927_SETUP_SETUP | | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 | - TOSHIBA_RBTX4927_SETUP_PCI2 | TOSHIBA_RBTX4927_SETUP_PCI66); + TOSHIBA_RBTX4927_SETUP_PCI2); #endif #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG @@ -718,7 +693,7 @@ void toshiba_rbtx4927_power_off(void) /* no return */ } -void __init toshiba_rbtx4927_setup(void) +void __init plat_mem_setup(void) { int i; u32 cp0_config; @@ -741,13 +716,6 @@ void __init toshiba_rbtx4927_setup(void) cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC); write_c0_config(cp0_config); -#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG - { - extern void dump_cp0(char *); - dump_cp0("toshiba_rbtx4927_early_fw_fixup"); - } -#endif - set_io_port_base(KSEG1 + TBTX4927_ISA_IO_OFFSET); TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP, ":mips_io_port_base=0x%08lx\n", @@ -936,8 +904,7 @@ void __init toshiba_rbtx4927_setup(void) "+\n"); } -void __init -toshiba_rbtx4927_time_init(void) +void __init plat_time_init(void) { mips_hpt_frequency = tx4927_cpu_clock / 2; if (tx4927_ccfgptr->ccfg & TX4927_CCFG_TINTDIS) diff --git a/arch/mips/tx4938/common/Makefile b/arch/mips/tx4938/common/Makefile index 8352eca..c5c6cea 100644 --- a/arch/mips/tx4938/common/Makefile +++ b/arch/mips/tx4938/common/Makefile @@ -6,7 +6,7 @@ # unless it's something special (ie not a .c file). # -obj-y += prom.o setup.o irq.o +obj-y += prom.o irq.o obj-$(CONFIG_KGDB) += dbgio.o EXTRA_CFLAGS += -Werror diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c deleted file mode 100644 index 3ba4101..0000000 --- a/arch/mips/tx4938/common/setup.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * linux/arch/mips/tx4938/common/setup.c - * - * common tx4938 setup routines - * - * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is - * licensed "as is" without any warranty of any kind, whether express - * or implied. - * - * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern void toshiba_rbtx4938_setup(void); - -void __init tx4938_setup(void); -void dump_cp0(char *key); - -void __init -plat_mem_setup(void) -{ - toshiba_rbtx4938_setup(); -} diff --git a/arch/mips/tx4938/toshiba_rbtx4938/prom.c b/arch/mips/tx4938/toshiba_rbtx4938/prom.c index 69f21c1..1644bff 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/prom.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/prom.c @@ -47,7 +47,6 @@ void __init prom_init(void) #ifndef CONFIG_TX4938_NAND_BOOT prom_init_cmdline(); #endif - mips_machtype = MACH_TOSHIBA_RBTX4938; msize = tx4938_get_mem_size(); add_memory_region(0, msize << 20, BOOT_MEM_RAM); diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c index 4a81523..d13af99 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c @@ -24,16 +24,12 @@ #include #include -#include #include #include -#include #include #include #include #ifdef CONFIG_SERIAL_TXX9 -#include -#include #include #endif #include @@ -855,7 +851,7 @@ void __init plat_time_init(void) txx9_gbus_clock / 2); } -void __init toshiba_rbtx4938_setup(void) +void __init plat_mem_setup(void) { unsigned long long pcfg; char *argptr; diff --git a/arch/mips/vr41xx/nec-cmbvr4133/setup.c b/arch/mips/vr41xx/nec-cmbvr4133/setup.c index 58e4768..7723d20 100644 --- a/arch/mips/vr41xx/nec-cmbvr4133/setup.c +++ b/arch/mips/vr41xx/nec-cmbvr4133/setup.c @@ -50,7 +50,7 @@ static struct mtd_partition cmbvr4133_mtd_parts[] = { } }; -#define number_partitions (sizeof(cmbvr4133_mtd_parts)/sizeof(struct mtd_partition)) +#define number_partitions ARRAY_SIZE(cmbvr4133_mtd_parts) #endif extern void i8259_init(void); @@ -64,8 +64,6 @@ static void __init nec_cmbvr4133_setup(void) #endif set_io_port_base(KSEG1ADDR(0x16000000)); - mips_machtype = MACH_NEC_CMBVR4133; - #ifdef CONFIG_PCI #ifdef CONFIG_ROCKHOPPER ali_m5229_preinit(); diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 0bb7a93..569f80a 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -127,7 +127,7 @@ #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p)) #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) #define PHYS_TO_XKPHYS(cm, a) (_CONST64_(0x8000000000000000) | \ - ((cm)<<59) | (a)) + (_CONST64_(cm) << 59) | (a)) /* * The ultimate limited of the 64-bit MIPS architecture: 2 bits for selecting diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index b2dd9b3..8e9bb16 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -48,22 +48,11 @@ #define MACH_DS5900 10 /* DECsystem 5900 */ /* - * Valid machtype for group ARC - */ -#define MACH_DESKSTATION_RPC44 0 /* Deskstation rPC44 */ -#define MACH_DESKSTATION_TYNE 1 /* Deskstation Tyne */ - -/* * Valid machtype for group SNI_RM */ #define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */ /* - * Valid machtype for group ACN - */ -#define MACH_ACN_MIPS_BOARD 0 /* ACN MIPS single board */ - -/* * Valid machtype for group SGI */ #define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */ @@ -73,44 +62,6 @@ #define MACH_SGI_IP30 4 /* Octane, Octane2 */ /* - * Valid machtype for group COBALT - */ -#define MACH_COBALT_27 0 /* Proto "27" hardware */ - -/* - * Valid machtype for group BAGET - */ -#define MACH_BAGET201 0 /* BT23-201 */ -#define MACH_BAGET202 1 /* BT23-202 */ - -/* - * Cosine boards. - */ -#define MACH_COSINE_ORION 0 - -/* - * Valid machtype for group MOMENCO - */ -#define MACH_MOMENCO_OCELOT 0 -#define MACH_MOMENCO_OCELOT_G 1 /* no more supported (may 2007) */ -#define MACH_MOMENCO_OCELOT_C 2 /* no more supported (jun 2007) */ -#define MACH_MOMENCO_JAGUAR_ATX 3 /* no more supported (may 2007) */ -#define MACH_MOMENCO_OCELOT_3 4 - -/* - * Valid machtype for group PHILIPS - */ -#define MACH_PHILIPS_NINO 0 /* Nino */ -#define MACH_PHILIPS_VELO 1 /* Velo */ -#define MACH_PHILIPS_JBS 2 /* JBS */ -#define MACH_PHILIPS_STB810 3 /* STB810 */ - -/* - * Valid machtype for group SIBYTE - */ -#define MACH_SWARM 0 - -/* * Valid machtypes for group Toshiba */ #define MACH_PALLAS 0 @@ -122,64 +73,17 @@ #define MACH_TOSHIBA_RBTX4938 6 /* - * Valid machtype for group Alchemy - */ -#define MACH_PB1000 0 /* Au1000-based eval board */ -#define MACH_PB1100 1 /* Au1100-based eval board */ -#define MACH_PB1500 2 /* Au1500-based eval board */ -#define MACH_DB1000 3 /* Au1000-based eval board */ -#define MACH_DB1100 4 /* Au1100-based eval board */ -#define MACH_DB1500 5 /* Au1500-based eval board */ -#define MACH_XXS1500 6 /* Au1500-based eval board */ -#define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */ -#define MACH_PB1550 8 /* Au1550-based eval board */ -#define MACH_DB1550 9 /* Au1550-based eval board */ -#define MACH_PB1200 10 /* Au1200-based eval board */ -#define MACH_DB1200 11 /* Au1200-based eval board */ - -/* - * Valid machtype for group NEC_VR41XX - * - * Various NEC-based devices. - * - * FIXME: MACH_GROUPs should be by _MANUFACTURER_ of * the device, not by - * technical properties, so no new additions to this group. - */ -#define MACH_NEC_OSPREY 0 /* Osprey eval board */ -#define MACH_NEC_EAGLE 1 /* NEC Eagle/Hawk board */ -#define MACH_ZAO_CAPCELLA 2 /* ZAO Networks Capcella */ -#define MACH_VICTOR_MPC30X 3 /* Victor MP-C303/304 */ -#define MACH_IBM_WORKPAD 4 /* IBM WorkPad z50 */ -#define MACH_CASIO_E55 5 /* CASIO CASSIOPEIA E-10/15/55/65 */ -#define MACH_TANBAC_TB0226 6 /* TANBAC TB0226 (Mbase) */ -#define MACH_TANBAC_TB0229 7 /* TANBAC TB0229 (VR4131DIMM) */ -#define MACH_NEC_CMBVR4133 8 /* CMB VR4133 Board */ - -#define MACH_HP_LASERJET 1 - -/* * Valid machtype for group LASAT */ #define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */ #define MACH_LASAT_200 1 /* Masquerade PRO/SP200 */ /* - * Valid machtype for group TITAN - */ -#define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */ -#define MACH_TITAN_EXCITE 2 /* Basler eXcite */ - -/* * Valid machtype for group NEC EMMA2RH */ #define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */ /* - * Valid machtype for group LEMOTE - */ -#define MACH_LEMOTE_FULONG 0 - -/* * Valid machtype for group PMC-MSP */ #define MACH_MSP4200_EVAL 0 /* PMC-Sierra MSP4200 Evaluation */ @@ -190,14 +94,6 @@ #define MACH_MSP7120_FPGA 5 /* PMC-Sierra MSP7120 Emulation */ #define MACH_MSP_OTHER 255 /* PMC-Sierra unknown board type */ -#define MACH_WRPPMC 1 - -/* - * Valid machtype for group Broadcom - */ -#define MACH_GROUP_BRCM 23 /* Broadcom */ -#define MACH_BCM47XX 1 /* Broadcom BCM47XX */ - #define CL_SIZE COMMAND_LINE_SIZE const char *get_system_type(void); diff --git a/include/asm-mips/bugs.h b/include/asm-mips/bugs.h index 0d7f9c1..9dc10df 100644 --- a/include/asm-mips/bugs.h +++ b/include/asm-mips/bugs.h @@ -1,19 +1,34 @@ /* * This is included by init/main.c to check for architecture-dependent bugs. * + * Copyright (C) 2007 Maciej W. Rozycki + * * Needs: * void check_bugs(void); */ #ifndef _ASM_BUGS_H #define _ASM_BUGS_H +#include #include + #include #include +extern int daddiu_bug; + +extern void check_bugs64_early(void); + extern void check_bugs32(void); extern void check_bugs64(void); +static inline void check_bugs_early(void) +{ +#ifdef CONFIG_64BIT + check_bugs64_early(); +#endif +} + static inline void check_bugs(void) { unsigned int cpu = smp_processor_id(); @@ -25,4 +40,14 @@ static inline void check_bugs(void) #endif } +static inline int r4k_daddiu_bug(void) +{ +#ifdef CONFIG_64BIT + WARN_ON(daddiu_bug < 0); + return daddiu_bug != 0; +#else + return 0; +#endif +} + #endif /* _ASM_BUGS_H */ diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h index ed5c02c..f974140 100644 --- a/include/asm-mips/cpu-info.h +++ b/include/asm-mips/cpu-info.h @@ -54,8 +54,14 @@ struct cpuinfo_mips { struct cache_desc dcache; /* Primary D or combined I/D cache */ struct cache_desc scache; /* Secondary cache */ struct cache_desc tcache; /* Tertiary/split secondary cache */ +<<<<<<< HEAD:include/asm-mips/cpu-info.h int srsets; /* Shadow register sets */ #if defined(CONFIG_MIPS_MT_SMTC) +======= + + int core; /* physical core number */ +#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) +>>>>>>> FETCH_HEAD:include/asm-mips/cpu-info.h /* * In the MIPS MT "SMTC" model, each TC is considered * to be a "CPU" for the purposes of scheduling, but @@ -63,8 +69,10 @@ struct cpuinfo_mips { * to all TCs within the same VPE. */ int vpe_id; /* Virtual Processor number */ - int tc_id; /* Thread Context number */ #endif /* CONFIG_MIPS_MT */ +#ifdef CONFIG_MIPS_MT_SMTC + int tc_id; /* Thread Context number */ +#endif void *data; /* Additional data */ } __attribute__((aligned(SMP_CACHE_BYTES))); diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h index fab3213..b0bccd2 100644 --- a/include/asm-mips/delay.h +++ b/include/asm-mips/delay.h @@ -6,13 +6,16 @@ * Copyright (C) 1994 by Waldorf Electronics * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + * Copyright (C) 2007 Maciej W. Rozycki */ #ifndef _ASM_DELAY_H #define _ASM_DELAY_H #include #include + #include +#include static inline void __delay(unsigned long loops) { @@ -25,7 +28,7 @@ static inline void __delay(unsigned long loops) " .set reorder \n" : "=r" (loops) : "0" (loops)); - else if (sizeof(long) == 8) + else if (sizeof(long) == 8 && !DADDI_WAR) __asm__ __volatile__ ( " .set noreorder \n" " .align 3 \n" @@ -34,6 +37,15 @@ static inline void __delay(unsigned long loops) " .set reorder \n" : "=r" (loops) : "0" (loops)); + else if (sizeof(long) == 8 && DADDI_WAR) + __asm__ __volatile__ ( + " .set noreorder \n" + " .align 3 \n" + "1: bnez %0, 1b \n" + " dsubu %0, %2 \n" + " .set reorder \n" + : "=r" (loops) + : "0" (loops), "r" (1)); } @@ -50,7 +62,7 @@ static inline void __delay(unsigned long loops) static inline void __udelay(unsigned long usecs, unsigned long lpj) { - unsigned long lo; + unsigned long hi, lo; /* * The rates of 128 is rounded wrongly by the catchall case @@ -70,11 +82,16 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj) : "=h" (usecs), "=l" (lo) : "r" (usecs), "r" (lpj) : GCC_REG_ACCUM); - else if (sizeof(long) == 8) + else if (sizeof(long) == 8 && !R4000_WAR) __asm__("dmultu\t%2, %3" : "=h" (usecs), "=l" (lo) : "r" (usecs), "r" (lpj) : GCC_REG_ACCUM); + else if (sizeof(long) == 8 && R4000_WAR) + __asm__("dmultu\t%3, %4\n\tmfhi\t%0" + : "=r" (usecs), "=h" (hi), "=l" (lo) + : "r" (usecs), "r" (lpj) + : GCC_REG_ACCUM); __delay(usecs); } diff --git a/include/asm-mips/fw/cfe/cfe_api.h b/include/asm-mips/fw/cfe/cfe_api.h index 1003e71..0995575 100644 --- a/include/asm-mips/fw/cfe/cfe_api.h +++ b/include/asm-mips/fw/cfe/cfe_api.h @@ -15,49 +15,27 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -/* ********************************************************************* - * - * Broadcom Common Firmware Environment (CFE) - * - * Device function prototypes File: cfe_api.h - * - * This file contains declarations for doing callbacks to - * cfe from an application. It should be the only header - * needed by the application to use this library - * - * Authors: Mitch Lichtenberg, Chris Demetriou - * - ********************************************************************* */ - +/* + * Broadcom Common Firmware Environment (CFE) + * + * This file contains declarations for doing callbacks to + * cfe from an application. It should be the only header + * needed by the application to use this library + * + * Authors: Mitch Lichtenberg, Chris Demetriou + */ #ifndef CFE_API_H #define CFE_API_H -/* - * Apply customizations here for different OSes. These need to: - * * typedef uint64_t, int64_t, intptr_t, uintptr_t. - * * define cfe_strlen() if use of an existing function is desired. - * * define CFE_API_IMPL_NAMESPACE if API functions are to use - * names in the implementation namespace. - * Also, optionally, if the build environment does not do so automatically, - * CFE_API_* can be defined here as desired. - */ -/* Begin customization. */ #include #include typedef long intptr_t; -#define cfe_strlen strlen -#define CFE_API_ALL -#define CFE_API_STRLEN_CUSTOM -/* End customization. */ - - -/* ********************************************************************* - * Constants - ********************************************************************* */ +/* + * Constants + */ /* Seal indicating CFE's presence, passed to user program. */ #define CFE_EPTSEAL 0x43464531 @@ -109,54 +87,13 @@ typedef struct { /* - * cfe_strlen is handled specially: If already defined, it has been - * overridden in this environment with a standard strlen-like function. - */ -#ifdef cfe_strlen -# define CFE_API_STRLEN_CUSTOM -#else -# ifdef CFE_API_IMPL_NAMESPACE -# define cfe_strlen(a) __cfe_strlen(a) -# endif -int cfe_strlen(char *name); -#endif - -/* * Defines and prototypes for functions which take no arguments. */ -#ifdef CFE_API_IMPL_NAMESPACE -int64_t __cfe_getticks(void); -#define cfe_getticks() __cfe_getticks() -#else int64_t cfe_getticks(void); -#endif /* * Defines and prototypes for the rest of the functions. */ -#ifdef CFE_API_IMPL_NAMESPACE -#define cfe_close(a) __cfe_close(a) -#define cfe_cpu_start(a, b, c, d, e) __cfe_cpu_start(a, b, c, d, e) -#define cfe_cpu_stop(a) __cfe_cpu_stop(a) -#define cfe_enumenv(a, b, d, e, f) __cfe_enumenv(a, b, d, e, f) -#define cfe_enummem(a, b, c, d, e) __cfe_enummem(a, b, c, d, e) -#define cfe_exit(a, b) __cfe_exit(a, b) -#define cfe_flushcache(a) __cfe_cacheflush(a) -#define cfe_getdevinfo(a) __cfe_getdevinfo(a) -#define cfe_getenv(a, b, c) __cfe_getenv(a, b, c) -#define cfe_getfwinfo(a) __cfe_getfwinfo(a) -#define cfe_getstdhandle(a) __cfe_getstdhandle(a) -#define cfe_init(a, b) __cfe_init(a, b) -#define cfe_inpstat(a) __cfe_inpstat(a) -#define cfe_ioctl(a, b, c, d, e, f) __cfe_ioctl(a, b, c, d, e, f) -#define cfe_open(a) __cfe_open(a) -#define cfe_read(a, b, c) __cfe_read(a, b, c) -#define cfe_readblk(a, b, c, d) __cfe_readblk(a, b, c, d) -#define cfe_setenv(a, b) __cfe_setenv(a, b) -#define cfe_write(a, b, c) __cfe_write(a, b, c) -#define cfe_writeblk(a, b, c, d) __cfe_writeblk(a, b, c, d) -#endif /* CFE_API_IMPL_NAMESPACE */ - int cfe_close(int handle); int cfe_cpu_start(int cpu, void (*fn) (void), long sp, long gp, long a1); int cfe_cpu_stop(int cpu); diff --git a/include/asm-mips/fw/cfe/cfe_error.h b/include/asm-mips/fw/cfe/cfe_error.h index 975f000..b803746 100644 --- a/include/asm-mips/fw/cfe/cfe_error.h +++ b/include/asm-mips/fw/cfe/cfe_error.h @@ -16,18 +16,13 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* ********************************************************************* - * - * Broadcom Common Firmware Environment (CFE) - * - * Error codes File: cfe_error.h - * - * CFE's global error code list is here. - * - * Author: Mitch Lichtenberg - * - ********************************************************************* */ - +/* + * Broadcom Common Firmware Environment (CFE) + * + * CFE's global error code list is here. + * + * Author: Mitch Lichtenberg + */ #define CFE_OK 0 #define CFE_ERR -1 /* generic error */ diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h index dc77002..2326587 100644 --- a/include/asm-mips/smp.h +++ b/include/asm-mips/smp.h @@ -20,6 +20,9 @@ #include #include +extern int smp_num_siblings; +extern cpumask_t cpu_sibling_map[]; + #define raw_smp_processor_id() (current_thread_info()->cpu) /* Map from cpu id to sequential logical cpu number. This will only diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h index fb41a8d..051e1af 100644 --- a/include/asm-mips/stackframe.h +++ b/include/asm-mips/stackframe.h @@ -6,6 +6,7 @@ * Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle * Copyright (C) 1994, 1995, 1996 Paul M. Antoine. * Copyright (C) 1999 Silicon Graphics, Inc. + * Copyright (C) 2007 Maciej W. Rozycki */ #ifndef _ASM_STACKFRAME_H #define _ASM_STACKFRAME_H @@ -145,8 +146,16 @@ .set reorder /* Called from user mode, new stack. */ get_saved_sp +#ifndef CONFIG_CPU_DADDI_WORKAROUNDS 8: move k0, sp PTR_SUBU sp, k1, PT_SIZE +#else + .set at=k0 +8: PTR_SUBU k1, PT_SIZE + .set noat + move k0, sp + move sp, k1 +#endif LONG_S k0, PT_R29(sp) LONG_S $3, PT_R3(sp) /* diff --git a/include/asm-mips/topology.h b/include/asm-mips/topology.h index 0440fb9..259145e 100644 --- a/include/asm-mips/topology.h +++ b/include/asm-mips/topology.h @@ -1 +1,17 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2007 by Ralf Baechle + */ +#ifndef __ASM_TOPOLOGY_H +#define __ASM_TOPOLOGY_H + #include + +#ifdef CONFIG_SMP +#define smt_capable() (smp_num_siblings > 1) +#endif + +#endif /* __ASM_TOPOLOGY_H */ diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h index c30c718..66523d6 100644 --- a/include/asm-mips/uaccess.h +++ b/include/asm-mips/uaccess.h @@ -5,6 +5,7 @@ * * Copyright (C) 1996, 1997, 1998, 1999, 2000, 03, 04 by Ralf Baechle * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + * Copyright (C) 2007 Maciej W. Rozycki */ #ifndef _ASM_UACCESS_H #define _ASM_UACCESS_H @@ -387,6 +388,12 @@ extern void __put_user_unknown(void); "jal\t" #destination "\n\t" #endif +#ifndef CONFIG_CPU_DADDI_WORKAROUNDS +#define DADDI_SCRATCH "$0" +#else +#define DADDI_SCRATCH "$3" +#endif + extern size_t __copy_user(void *__to, const void *__from, size_t __n); #define __invoke_copy_to_user(to, from, n) \ @@ -403,7 +410,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) \ : \ : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \ - "memory"); \ + DADDI_SCRATCH, "memory"); \ __cu_len_r; \ }) @@ -512,7 +519,7 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) \ : \ : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \ - "memory"); \ + DADDI_SCRATCH, "memory"); \ __cu_len_r; \ }) @@ -535,7 +542,7 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) \ : \ : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \ - "memory"); \ + DADDI_SCRATCH, "memory"); \ __cu_len_r; \ }) diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h index d2808ed..22361d5 100644 --- a/include/asm-mips/war.h +++ b/include/asm-mips/war.h @@ -4,6 +4,7 @@ * for more details. * * Copyright (C) 2002, 2004, 2007 by Ralf Baechle + * Copyright (C) 2007 Maciej W. Rozycki */ #ifndef _ASM_WAR_H #define _ASM_WAR_H @@ -11,6 +12,67 @@ #include /* + * Work around certain R4000 CPU errata (as implemented by GCC): + * + * - A double-word or a variable shift may give an incorrect result + * if executed immediately after starting an integer division: + * "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", + * erratum #28 + * "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum + * #19 + * + * - A double-word or a variable shift may give an incorrect result + * if executed while an integer multiplication is in progress: + * "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", + * errata #16 & #28 + * + * - An integer division may give an incorrect result if started in + * a delay slot of a taken branch or a jump: + * "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", + * erratum #52 + */ +#ifdef CONFIG_CPU_R4000_WORKAROUNDS +#define R4000_WAR 1 +#else +#define R4000_WAR 0 +#endif + +/* + * Work around certain R4400 CPU errata (as implemented by GCC): + * + * - A double-word or a variable shift may give an incorrect result + * if executed immediately after starting an integer division: + * "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10 + * "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4 + */ +#ifdef CONFIG_CPU_R4400_WORKAROUNDS +#define R4400_WAR 1 +#else +#define R4400_WAR 0 +#endif + +/* + * Work around the "daddi" and "daddiu" CPU errata: + * + * - The `daddi' instruction fails to trap on overflow. + * "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", + * erratum #23 + * + * - The `daddiu' instruction can produce an incorrect result. + * "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", + * erratum #41 + * "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum + * #15 + * "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7 + * "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5 + */ +#ifdef CONFIG_CPU_DADDI_WORKAROUNDS +#define DADDI_WAR 1 +#else +#define DADDI_WAR 0 +#endif + +/* * Another R4600 erratum. Due to the lack of errata information the exact * technical details aren't known. I've experimentally found that disabling * interrupts during indexed I-cache flushes seems to be sufficient to deal