GIT 40e5b80832994938b7909cdcb97014b26369e8a3 git+ssh://master.kernel.org/pub/scm/linux/kernel/git/czankel/xtensa-2.6.git#testing commit Author: Chris Zankel Date: Wed Feb 13 10:47:26 2008 -0800 [XTENSA] Prompt for Xtensa cpu variant name when custom variant selected Among list of supported Xtensa cpu variants is the entry 'custom'. When this is selected, prompt further for the custom variant name. This allows multiple variants to be added in include/asm-xtensa/variant- without other kernel changes. Also make cross-compilation check a bit more consistent with other arches. Should no longer be necessary to specify CROSS_COMPILE on make cmdline. Signed-off-by: Marc Gauthier Signed-off-by: Chris Zankel commit 42086cec3263b8c015ca3faa01e8190f0e3ff445 Author: Chris Zankel Date: Mon Jan 28 15:55:01 2008 -0800 [XTENSA] Allow debugger to modify the WINDOWBASE register. For the 'return' command, GDB needs to adjust WINDOWBASE. In case WB is different from 0, we need to rotate the window register file and update WINDOWSTART and WMASK. This patch also removes some ret|= statements for __get_user/__put_user as the address range was alrady checked a couple of lines earlier. Signed-off-by: Chris Zankel commit bdd362ff4ff8dc0c697ce87dbb337f3b7341fc46 Author: Bob Wilson Date: Fri Feb 1 16:56:32 2008 -0800 [XTENSA] Fix makefile to work with binutils-2.18. When building with binutils-2.18, vmlinux includes .note.gnu.build-id sections that need to be stripped out when building the binary image. The old .xt.insn sections haven't been used for a long time, so don't bother stripping them. Signed-off-by: Bob Wilson Signed-off-by: Chris Zankel commit e1088430626b2ec4cd64f2fb7d9fd7c6df5d5824 Author: Chris Zankel Date: Tue Jan 22 00:45:25 2008 -0800 [XTENSA] Fix register corruption for certain processor configurations For processor configurations that have optional registers (compiler-used but non-coprocessor), user space registers might get corrupted when there are only 4 registers in the current window-frame, ie. register a4 belongs to the oldest frame in the register file. Signed-off-by: Chris Zankel commit 9f8fcf38e8928cccf8c7b32668d146e457f2ccf2 Author: Chris Zankel Date: Fri Jan 18 16:15:29 2008 -0800 [XTENSA] Fix cache flush macro for D$/I$ aliasing/non-aliasing For configurations that have aliasing in the data cache but not in the instruction cache, we don't need to flush the instruction cache. Thus, we didn't define the macros to flush the instruction cache. Some cache-flush functions, howerver, were using those macros. Signed-off-by: Chris Zankel commit 679262578ba975037901556b2ddc6b17a77cf671 Author: Chris Zankel Date: Tue Jan 15 09:49:18 2008 -0800 [XTENSA] Exclude thread-global registers from the xtregs structures. Signed-off-by: Chris Zankel commit 44c64e6b15ceab6a4927f54e1081a74ba096b95a Author: Chris Zankel Date: Fri Jan 11 11:44:17 2008 -0800 [XTENSA] Add support for the sa_restorer function Supporting the sa_restorer function allows for better security since the sigreturn system call doesn't need to be placed on the stack, so the stack doesn't need to be executable. This requires support from the c-library as it has to provide the restorer function. Signed-off-by: Chris Zankel commit c658eac628aa8df040dfe614556d95e6da3a9ffb Author: Chris Zankel Date: Tue Feb 12 13:17:07 2008 -0800 [XTENSA] Add support for configurable registers and coprocessors The Xtensa architecture allows to define custom instructions and registers. Registers that are bound to a coprocessor are only accessible if the corresponding enable bit is set, which allows to implement a 'lazy' context switch mechanism. Other registers needs to be saved and restore at the time of the context switch or during interrupt handling. This patch adds support for these additional states: - save and restore registers that are used by the compiler upon interrupt entry and exit. - context switch additional registers unbound to any coprocessor - 'lazy' context switch of registers bound to a coprocessor - ptrace interface to provide access to additional registers - update configuration files in include/asm-xtensa/variant-fsf Signed-off-by: Chris Zankel commit 71d28e6c285548106f551fde13ca6d589433d843 Author: Bob Wilson Date: Tue Oct 16 16:43:00 2007 -0700 [XTENSA] Clean up stat structs. Avoid using typedefs for stat fields. Make stat64.st_blocks an unsigned long long to avoid endian-specific padding with 32-bit values. Clean up signed vs. unsigned and int vs. long types to be consistent with other uses of these values. Signed-off-by: Bob Wilson Signed-off-by: Chris Zankel commit 36dffadb7f19671aab58be43c5896ea87d5fb1bf Author: Chris Zankel Date: Tue Feb 12 13:14:17 2008 -0800 [XTENSA] Use preprocessor to generate the linker script for the ELF boot image Signed-off-by: Marc Gauthier Signed-off-by: Chris Zankel commit 6d15d109632ff01e13c26893030e2ed9e6c4e3fd Author: Marc Gauthier Date: Sun Dec 30 22:00:54 2007 -0800 [XTENSA] Add missing RELOCATE_ENTRY for debug vector We also need to relocate the debug vector if in RAM. Signed-off-by: Marc Gauthier commit de6b03456e2e11cbff9f4bb147177374b260d04e Author: Chris Zankel Date: Wed Dec 19 10:21:50 2007 -0800 [XTENSA] Add volatile keyword to asm statements accessing counter registers The compiler get's sometimes to smart and doesn't reread the counter registers and the kernel doesn't schedule until the counter wraps around. Signed-off-by: Chris Zankel commit 03dfa442e5aaf644bb9b3b506abbd76786867eb1 Author: Chris Zankel Date: Tue Feb 12 13:10:40 2008 -0800 [XTENSA] Remove unused code We will never (need to) support signal handling coming from a double exception. There are too many things that could go wrong and delivering signals is not the fastest method for IPC, anyway. Signed-off-by: Chris Zankel commit 3b4a49e21b0d8a69629623815a8caff3eb4cf9f7 Author: Chris Zankel Date: Mon Jan 7 16:42:21 2008 -0800 [XTENSA] Fix modules for non-exec processor configurations We need to use vmalloc_exec for module loading. Also remove the definitions MODULE_START and MODULE_END, which wasn't used, and increase the VMALLOC memory range accordingly. Signed-off-by: Chris Zankel commit 3e92501a4e10e640786de10786c434834a0c1651 Author: Marc Gauthier Date: Tue Dec 11 15:28:07 2007 -0800 [XTENSA] Add missing cast in elf.h ELF_CORE_COPY_REGS() Avoids compiler warning. Signed-off-by: Marc Gauthier commit ea0b6b066304d9f7e24b273c71fab5d67ce54f96 Author: Chris Zankel Date: Wed Jan 9 09:22:36 2008 -0800 [XTENSA] Fix comments regarding the number of frames to save Signed-off-by: Marc Gauthier Signed-off-by: Chris Zankel commit 50c0716aa2f49a9d34589e380fad73402464c088 Author: Chris Zankel Date: Wed Nov 14 13:47:02 2007 -0800 [XTENSA] Add missing a2 register restore in register spill routine Register a2 is saved in depc but wasn't getting restored before returning from _spill_registers when there weren't any registers to spill. The mask to cut the top bit from the rotated WINDOWMASK register was also one bit short. Signed-off-by: CHris Zankel commit ed3174d93c342b8b2eeba6bbd124707d55304a7b Author: Marc Gauthier Date: Tue Oct 23 16:40:24 2007 -0700 [XTENSA] adjust boot linker script start addresses Move boot-redboot load address from 0xD0200000 to 0xD1000000 to make space for larger kernel images, in particular those with an embedded initramfs filesystem. Also properly set the ELF start address in boot-elf images so that PC need not be set manually when loading them using GDB. Signed-off-by: Marc Gauthier commit 3befce8f0f79be8322aba885ed052b8ad927913d Author: Chris Zankel Date: Tue Feb 12 12:22:15 2008 -0800 [XTENSA] Remove oldmask from sigcontext and fix register flush Remove oldmask from the sigcontext structure. Also update wmask and windowstart when we flush the AR registers to stack. Signed-off-by: Chris Zankel commit 8d7e8240e66cecc84a375aceb26942d02b291198 Author: Chris Zankel Date: Tue Feb 12 11:55:32 2008 -0800 [XTENSA] Clean up elf-gregset. Remove additional registers from the ELF gregset structure that are only used by the kernel or are not required or invalid in user-space. The ar registers are always aligned to a windowbase value of 0, and the WB register is always assumed to be 0. Increase the size of the structure to 128 entries. This will provide enough space in future. Signed-off-by: Chris Zankel commit 0b2c3afdaaaa3e577300b2235df43eb8af00020b Author: Chris Zankel Date: Tue Feb 12 10:11:45 2008 -0800 [XTENSA] Fix icache flush for cache aliasing Set the execution bit in the temporary TLB when we flush the instruction cache. Signed-off-by: Chris Zankel commit 70e137eb48f62e59dfa5e06d0d01f123e9464f9a Author: Chris Zankel Date: Tue Oct 23 10:58:53 2007 -0700 [XTENSA] Fix clobbered register in asm macro We dangerously re-used an input operand to an asm macro without defining a constraint. By defining a separate output operand (instead of input/output operand), the compiler is more flexible during register allocation. Signed-off-by: Chris Zankel commit c865415838146d83c92e4c1ae69aff45ef9f35f8 Author: Marc Gauthier Date: Fri Sep 21 16:38:09 2007 -0700 [XTENSA] Prevent inlining ISS platform asm constructs The simcall asm macro assumes Windowed ABI parameter passing in registers, and doesn't work if its containing function gets inlined. This fix prevents that from happening. Signed-off-by: Marc Gauthier commit b67360db143448be1f6d68835c6d0cc43837667f Author: Chris Zankel Date: Thu Sep 6 01:38:18 2007 -0700 [XTENSA] Flush the page-address in update-mmu instead of user-address The TLB entry for the user address doesn't exist at the time we want to flush the caches, so use the page address. Note that processor configurations with cache-aliasing issues are treated separately. Signed-off-by: Chris Zankel commit 49883224f6665e2b056fc3e7325b3bba9d1ff2c4 Author: Chris Zankel Date: Wed Nov 14 13:39:40 2007 -0800 [XTENSA] Fix argument list for pgd_ctor constructor. The argument list for ctor function element in the kmem_cache structure has changed. Signed-off-by: Chris Zankel commit b26d0ab0e6fa3a886d2799bf89eb05dd52f8b7c2 Author: Chris Zankel Date: Thu Sep 13 13:44:07 2007 -0700 [XTENSA] Concentrate platforms into one platforms directory. Create arch/xtensa/platforms/ directory to concentrate all platforms under that subdirectory and moves the ISS platform to that directory. Signed-off-by: Chris Zankel commit 4f8d98ff4825336b23372bb552852625fc90d3b1 Author: Chris Zankel Date: Wed Feb 13 16:44:19 2008 -0800 [XTENSA] Add .literal sections for various init sectiont to linker script Xtensa requires separate .literal section for each .text section. Adding addition init sections for cpuinit, meminit, and devinit, broke the Xtensa linker script, so, add these literal sections manually for now. Signed-off-by: Chris Zankel commit e584d85fb1cba2b08c266348b58eb4a881a88b40 Author: Chris Zankel Date: Wed Feb 13 16:25:09 2008 -0800 [XTENSA] Fix non-existent pte_token_t typedef to pgtable_t This bug was introduced in 2f569afd9ced9ebec9a6eb3dbf6f83429be0a7b4. (CONFIG_HIGHPTE vs. sub-page page tables) Signed-off-by: Chris Zankel commit 78c5bbc15bc467ec98cf4db55ae9c57522c1b77b Author: Adrian Bunk Date: Fri Dec 7 17:14:47 2007 -0800 [XTENSA] Remove dead code reported by Robert P. J. Day. Signed-off-by: Adrian Bunk Signed-off-by: Christian Zankel Signed-off-by: Andrew Morton commit 1e12e3919ea83ce28f8c017b83f68739485fef81 Author: Chris Zankel Date: Fri Jan 18 14:26:55 2008 -0800 [XTENSA] Remove duplicate includes. Signed-off-by: Lucas Woods Signed-off-by: Andrew Morton Signed-off-by: Christian Zankel arch/xtensa/Kconfig | 34 +- arch/xtensa/Makefile | 45 ++- arch/xtensa/boot/boot-elf/Makefile | 9 +- arch/xtensa/boot/boot-elf/boot.ld | 71 --- arch/xtensa/boot/boot-elf/boot.lds.S | 73 +++ arch/xtensa/boot/boot-redboot/Makefile | 2 +- arch/xtensa/boot/boot-redboot/boot.ld | 2 +- arch/xtensa/kernel/asm-offsets.c | 17 +- arch/xtensa/kernel/coprocessor.S | 443 +++++++++++------ arch/xtensa/kernel/entry.S | 355 +++---------- arch/xtensa/kernel/module.c | 2 +- arch/xtensa/kernel/process.c | 306 ++++-------- arch/xtensa/kernel/ptrace.c | 351 +++++++------ arch/xtensa/kernel/setup.c | 5 - arch/xtensa/kernel/signal.c | 89 ++-- arch/xtensa/kernel/traps.c | 20 +- arch/xtensa/kernel/vmlinux.lds.S | 6 +- arch/xtensa/mm/cache.c | 7 +- arch/xtensa/mm/init.c | 2 +- arch/xtensa/mm/misc.S | 2 +- arch/xtensa/platform-iss/Makefile | 8 - arch/xtensa/platform-iss/console.c | 296 ----------- arch/xtensa/platform-iss/io.c | 32 -- arch/xtensa/platform-iss/network.c | 823 ------------------------------ arch/xtensa/platform-iss/setup.c | 110 ---- arch/xtensa/platforms/iss/Makefile | 8 + arch/xtensa/platforms/iss/console.c | 297 +++++++++++ arch/xtensa/platforms/iss/io.c | 32 ++ arch/xtensa/platforms/iss/network.c | 823 ++++++++++++++++++++++++++++++ arch/xtensa/platforms/iss/setup.c | 110 ++++ include/asm-xtensa/cacheflush.h | 2 + include/asm-xtensa/coprocessor.h | 214 ++++++--- include/asm-xtensa/elf.h | 110 +---- include/asm-xtensa/module.h | 4 +- include/asm-xtensa/pgalloc.h | 2 +- include/asm-xtensa/pgtable.h | 8 +- include/asm-xtensa/processor.h | 13 +- include/asm-xtensa/ptrace.h | 44 +- include/asm-xtensa/regs.h | 9 +- include/asm-xtensa/sigcontext.h | 4 +- include/asm-xtensa/stat.h | 36 +- include/asm-xtensa/system.h | 39 +-- include/asm-xtensa/thread_info.h | 21 + include/asm-xtensa/timex.h | 8 +- include/asm-xtensa/uaccess.h | 99 ++-- include/asm-xtensa/variant-fsf/tie-asm.h | 70 +++ include/asm-xtensa/variant-fsf/tie.h | 75 +++- 47 files changed, 2600 insertions(+), 2538 deletions(-) diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 9fc8551..65a310e 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -20,8 +20,8 @@ config XTENSA primarily for embedded systems. These processors are both configurable and extensible. The Linux port to the Xtensa architecture supports all processor configurations and extensions, - with reasonable minimum requirements. The Xtensa Linux project has - a home page at . + with reasonable minimum requirements. The Xtensa Linux project + has a home page at . config RWSEM_XCHGADD_ALGORITHM bool @@ -63,15 +63,38 @@ choice default XTENSA_VARIANT_FSF config XTENSA_VARIANT_FSF - bool "fsf" + bool "fsf - default (not generic) configuration" + +config XTENSA_VARIANT_CUSTOM + bool "Custom Xtensa processor configuration" + help + Select this variant to use a custom Xtensa processor configuration. + You will be prompted for a processor variant name. + endchoice +config XTENSA_VARIANT_CUSTOM_NAME + string "Xtensa Processor Custom Variant Name" + depends on XTENSA_VARIANT_CUSTOM + default "" + help + Provide the name of a custom Xtensa processor variant. + The name should match what was provided to the overlay generation + script. This same NAME selects include/asm-xtensa/variant-NAME + and the xtensa_NAME prefix for the toolchain. + +config XTENSA_VARIANT_NAME + string + depends on XTENSA_VARIANT_CUSTOM + default "fsf" if XTENSA_VARIANT_FSF + default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM + config MMU bool default y config XTENSA_UNALIGNED_USER - bool "Unaligned memory access in use space" + bool "Unaligned memory access in user space" ---help--- The Xtensa architecture currently does not handle unaligned memory accesses in hardware but through an exception handler. @@ -119,9 +142,6 @@ config XTENSA_PLATFORM_XT2000 XT2000 is the name of Tensilica's feature-rich emulation platform. This hardware is capable of running a full Linux distribution. -endchoice - - config XTENSA_CALIBRATE_CCOUNT bool "Auto calibration of the CPU clock rate" ---help--- diff --git a/arch/xtensa/Makefile b/arch/xtensa/Makefile index 56685a8..b64ec3d 100644 --- a/arch/xtensa/Makefile +++ b/arch/xtensa/Makefile @@ -3,7 +3,7 @@ # License. See the file "COPYING" in the main directory of this archive # for more details. # -# Copyright (C) 2001 - 2005 Tensilica Inc. +# Copyright (C) 2001 - 2008 Tensilica Inc. # # This file is included by the global makefile so that you can add your own # architecture-specific flags and dependencies. Remember to do have actions @@ -11,13 +11,32 @@ # this architecture # Core configuration. -# (Use VAR= to use another default compiler.) -variant-$(CONFIG_XTENSA_VARIANT_FSF) := fsf -variant-$(CONFIG_XTENSA_VARIANT_LINUX_CUSTOM) := custom +VARIANT := $(strip $(subst ", ,$(CONFIG_XTENSA_VARIANT_NAME))) -VARIANT = $(variant-y) -export VARIANT +ifeq ($(strip $(VARIANT)),) +ifeq ($(CONFIG_XTENSA_VARIANT_CUSTOM),y) +$(error Xtensa processor variant name cannot be empty.) +endif +# We are being invoked without config info (e.g. during 'make menuconfig'). +# However we need config info to know which Xtensa toolchain to invoke. +# Is a working CC important at this point? +# (The top-level Makefile may invoke CC via cc-option -- does its +# derivation persist?...) +# We don't yet know the VARIANT name (e.g. when invoking 'make menuconfig'). +# In this case, just select any toolchain found on the PATH: +somegcc := $(firstword $(wildcard $(addsuffix /xtensa_*-linux*-gcc,$(subst :, ,$(PATH))))) +ifeq ($(somegcc),) +$(error No Xtensa toolchain found on PATH.) +else +VARIANT := $(subst xtensa_,,$(word 1,$(subst -, ,$(notdir $(somegcc))))) +# $(warning Picked variant .$(VARIANT).) +endif +endif + +fullarch := xtensa_$(VARIANT) +UTS_MACHINE := $(fullarch) +# $(warning Selected arch $(fullarch).) # Platform configuration @@ -42,24 +61,22 @@ core-$(CONFIG_EMBEDDED_RAMDISK) += arch/xtensa/boot/ramdisk/ # Test for cross compiling -ifneq ($(VARIANT),) - COMPILE_ARCH = $(shell uname -m) - - ifneq ($(COMPILE_ARCH), xtensa) - ifndef CROSS_COMPILE - CROSS_COMPILE = xtensa_$(VARIANT)- - endif +ifneq ($(SUBARCH),$(ARCH)) + ifeq ($(CROSS_COMPILE),) + CROSS_COMPILE := $(call cc-cross-prefix, $(fullarch)-linux-uclibc- $(fullarch)-linux-gnu-) endif endif # +ifneq ($(strip $(VARIANT)),) LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) +endif head-y := arch/xtensa/kernel/head.o core-y += arch/xtensa/kernel/ arch/xtensa/mm/ ifneq ($(PLATFORM),) -core-y += arch/xtensa/platform-$(PLATFORM)/ +core-y += arch/xtensa/platforms/$(PLATFORM)/ endif libs-y += arch/xtensa/lib/ $(LIBGCC) diff --git a/arch/xtensa/boot/boot-elf/Makefile b/arch/xtensa/boot/boot-elf/Makefile index 734db7f..08e8814 100644 --- a/arch/xtensa/boot/boot-elf/Makefile +++ b/arch/xtensa/boot/boot-elf/Makefile @@ -14,25 +14,26 @@ OBJCOPY_ARGS := -O elf32-xtensa-le endif export OBJCOPY_ARGS +export CPPFLAGS_boot.lds += -P -C boot-y := bootstrap.o OBJS := $(addprefix $(obj)/,$(boot-y)) -Image: vmlinux $(OBJS) - $(OBJCOPY) --strip-all -R .comment -R .xt.insn -O binary \ +Image: vmlinux $(OBJS) arch/$(ARCH)/boot/boot-elf/boot.lds + $(OBJCOPY) --strip-all -R .comment -R .note.gnu.build-id -O binary \ vmlinux vmlinux.tmp $(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \ --add-section image=vmlinux.tmp \ --set-section-flags image=contents,alloc,load,load,data \ $(OBJS) $@.tmp $(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) \ - -T $(srctree)/arch/$(ARCH)/boot/boot-elf/boot.ld \ + -T arch/$(ARCH)/boot/boot-elf/boot.lds \ -o arch/$(ARCH)/boot/$@.elf $@.tmp rm -f $@.tmp vmlinux.tmp Image.initrd: vmlinux $(OBJS) - $(OBJCOPY) --strip-all -R .comment -R .xt.insn -O binary \ + $(OBJCOPY) --strip-all -R .comment -R .note.gnu.build-id -O binary \ --add-section .initrd=arch/$(ARCH)/boot/ramdisk \ --set-section-flags .initrd=contents,alloc,load,load,data \ vmlinux vmlinux.tmp diff --git a/arch/xtensa/boot/boot-elf/boot.ld b/arch/xtensa/boot/boot-elf/boot.ld deleted file mode 100644 index 4ab06a0..0000000 --- a/arch/xtensa/boot/boot-elf/boot.ld +++ /dev/null @@ -1,71 +0,0 @@ -OUTPUT_ARCH(xtensa) - -SECTIONS -{ - .start 0xD0000000 : { *(.start) } - - .text 0xD0000000: - { - __reloc_start = . ; - _text_start = . ; - *(.literal .text.literal .text) - _text_end = . ; - } - - .rodata ALIGN(0x04): - { - *(.rodata) - *(.rodata1) - } - - .data ALIGN(0x04): - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.got.plt) - *(.got) - *(.dynamic) - } - - __reloc_end = . ; - - .initrd ALIGN(0x10) : - { - boot_initrd_start = . ; - *(.initrd) - boot_initrd_end = .; - } - - . = ALIGN(0x10); - __image_load = . ; - .image 0xd0001000: - { - _image_start = .; - *(image) - . = (. + 3) & ~ 3; - _image_end = . ; - } - - - .bss ((LOADADDR(.image) + SIZEOF(.image) + 3) & ~ 3): - { - __bss_start = .; - *(.sbss) - *(.scommon) - *(.dynbss) - *(.bss) - __bss_end = .; - } - _end = .; - _param_start = .; - - .ResetVector.text 0xfe000020 : - { - *(.ResetVector.text) - } - - - PROVIDE (end = .); -} diff --git a/arch/xtensa/boot/boot-elf/boot.lds.S b/arch/xtensa/boot/boot-elf/boot.lds.S new file mode 100644 index 0000000..849dfca --- /dev/null +++ b/arch/xtensa/boot/boot-elf/boot.lds.S @@ -0,0 +1,73 @@ +#include +OUTPUT_ARCH(xtensa) +ENTRY(_ResetVector) + +SECTIONS +{ + .start 0xD0000000 : { *(.start) } + + .text 0xD0000000: + { + __reloc_start = . ; + _text_start = . ; + *(.literal .text.literal .text) + _text_end = . ; + } + + .rodata ALIGN(0x04): + { + *(.rodata) + *(.rodata1) + } + + .data ALIGN(0x04): + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.got.plt) + *(.got) + *(.dynamic) + } + + __reloc_end = . ; + + .initrd ALIGN(0x10) : + { + boot_initrd_start = . ; + *(.initrd) + boot_initrd_end = .; + } + + . = ALIGN(0x10); + __image_load = . ; + .image 0xd0001000: + { + _image_start = .; + *(image) + . = (. + 3) & ~ 3; + _image_end = . ; + } + + + .bss ((LOADADDR(.image) + SIZEOF(.image) + 3) & ~ 3): + { + __bss_start = .; + *(.sbss) + *(.scommon) + *(.dynbss) + *(.bss) + __bss_end = .; + } + _end = .; + _param_start = .; + + .ResetVector.text XCHAL_RESET_VECTOR_VADDR : + { + *(.ResetVector.text) + } + + + PROVIDE (end = .); +} diff --git a/arch/xtensa/boot/boot-redboot/Makefile b/arch/xtensa/boot/boot-redboot/Makefile index 74d15d0..872029b 100644 --- a/arch/xtensa/boot/boot-redboot/Makefile +++ b/arch/xtensa/boot/boot-redboot/Makefile @@ -22,7 +22,7 @@ LIBS := arch/xtensa/boot/lib/lib.a arch/xtensa/lib/lib.a LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) zImage: vmlinux $(OBJS) $(LIBS) - $(OBJCOPY) --strip-all -R .comment -R .xt.insn -O binary \ + $(OBJCOPY) --strip-all -R .comment -R .note.gnu.build-id -O binary \ vmlinux vmlinux.tmp gzip -vf9 vmlinux.tmp $(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \ diff --git a/arch/xtensa/boot/boot-redboot/boot.ld b/arch/xtensa/boot/boot-redboot/boot.ld index 65b7264..774db20 100644 --- a/arch/xtensa/boot/boot-redboot/boot.ld +++ b/arch/xtensa/boot/boot-redboot/boot.ld @@ -2,7 +2,7 @@ OUTPUT_ARCH(xtensa) SECTIONS { - .start 0xD0200000 : { *(.start) } + .start 0xD1000000 : { *(.start) } .text : { diff --git a/arch/xtensa/kernel/asm-offsets.c b/arch/xtensa/kernel/asm-offsets.c index d5ffe7b..ef63ada 100644 --- a/arch/xtensa/kernel/asm-offsets.c +++ b/arch/xtensa/kernel/asm-offsets.c @@ -21,7 +21,6 @@ #include #include -#include #include #define DEFINE(sym, val) asm volatile("\n->" #sym " %0 " #val : : "i" (val)) @@ -64,6 +63,8 @@ int main(void) DEFINE(PT_SIZE, sizeof(struct pt_regs)); DEFINE(PT_AREG_END, offsetof (struct pt_regs, areg[XCHAL_NUM_AREGS])); DEFINE(PT_USER_SIZE, offsetof(struct pt_regs, areg[XCHAL_NUM_AREGS])); + DEFINE(PT_XTREGS_OPT, offsetof(struct pt_regs, xtregs_opt)); + DEFINE(XTREGS_OPT_SIZE, sizeof(xtregs_opt_t)); /* struct task_struct */ DEFINE(TASK_PTRACE, offsetof (struct task_struct, ptrace)); @@ -77,7 +78,19 @@ int main(void) /* struct thread_info (offset from start_struct) */ DEFINE(THREAD_RA, offsetof (struct task_struct, thread.ra)); DEFINE(THREAD_SP, offsetof (struct task_struct, thread.sp)); - DEFINE(THREAD_CP_SAVE, offsetof (struct task_struct, thread.cp_save)); + DEFINE(THREAD_CPENABLE, offsetof (struct thread_info, cpenable)); +#if XTENSA_HAVE_COPROCESSORS + DEFINE(THREAD_XTREGS_CP0, offsetof (struct thread_info, xtregs_cp)); + DEFINE(THREAD_XTREGS_CP1, offsetof (struct thread_info, xtregs_cp)); + DEFINE(THREAD_XTREGS_CP2, offsetof (struct thread_info, xtregs_cp)); + DEFINE(THREAD_XTREGS_CP3, offsetof (struct thread_info, xtregs_cp)); + DEFINE(THREAD_XTREGS_CP4, offsetof (struct thread_info, xtregs_cp)); + DEFINE(THREAD_XTREGS_CP5, offsetof (struct thread_info, xtregs_cp)); + DEFINE(THREAD_XTREGS_CP6, offsetof (struct thread_info, xtregs_cp)); + DEFINE(THREAD_XTREGS_CP7, offsetof (struct thread_info, xtregs_cp)); +#endif + DEFINE(THREAD_XTREGS_USER, offsetof (struct thread_info, xtregs_user)); + DEFINE(XTREGS_USER_SIZE, sizeof(xtregs_user_t)); DEFINE(THREAD_CURRENT_DS, offsetof (struct task_struct, thread.current_ds)); /* struct mm_struct */ diff --git a/arch/xtensa/kernel/coprocessor.S b/arch/xtensa/kernel/coprocessor.S index 01bcb9f..2bc1e14 100644 --- a/arch/xtensa/kernel/coprocessor.S +++ b/arch/xtensa/kernel/coprocessor.S @@ -8,193 +8,328 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2003 - 2005 Tensilica Inc. - * - * Marc Gauthier + * Copyright (C) 2003 - 2007 Tensilica Inc. */ -/* - * This module contains a table that describes the layout of the various - * custom registers and states associated with each coprocessor, as well - * as those not associated with any coprocessor ("extra state"). - * This table is included with core dumps and is available via the ptrace - * interface, allowing the layout of such register/state information to - * be modified in the kernel without affecting the debugger. Each - * register or state is identified using a 32-bit "libdb target number" - * assigned when the Xtensa processor is generated. - */ #include +#include #include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include -#if XCHAL_HAVE_CP +/* + * Entry condition: + * + * a0: trashed, original value saved on stack (PT_AREG0) + * a1: a1 + * a2: new stack pointer, original in DEPC + * a3: dispatch table + * depc: a2, original value saved on stack (PT_DEPC) + * excsave_1: a3 + * + * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC + * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception + */ -#define CP_LAST ((XCHAL_CP_MAX - 1) * COPROCESSOR_INFO_SIZE) +/* IO protection is currently unsupported. */ -ENTRY(release_coprocessors) +ENTRY(fast_io_protect) + wsr a0, EXCSAVE_1 + movi a0, unrecoverable_exception + callx0 a0 - entry a1, 16 - # a2: task - movi a3, 1 << XCHAL_CP_MAX # a3: coprocessor-bit - movi a4, coprocessor_info+CP_LAST # a4: owner-table - # a5: tmp - movi a6, 0 # a6: 0 - rsil a7, LOCKLEVEL # a7: PS +#if XTENSA_HAVE_COPROCESSORS -1: /* Check if task is coprocessor owner of coprocessor[i]. */ +/* + * Macros for lazy context switch. + */ - l32i a5, a4, COPROCESSOR_INFO_OWNER - srli a3, a3, 1 - beqz a3, 1f - addi a4, a4, -8 - beq a2, a5, 1b +#define SAVE_CP_REGS(x) \ + .align 4; \ + .Lsave_cp_regs_cp##x: \ + .if XTENSA_HAVE_COPROCESSOR(x); \ + xchal_cp##x##_store a2 a4 a5 a6 a7; \ + .endif; \ + jx a0 - /* Found an entry: Clear entry CPENABLE bit to disable CP. */ +#define SAVE_CP_REGS_TAB(x) \ + .if XTENSA_HAVE_COPROCESSOR(x); \ + .long .Lsave_cp_regs_cp##x - .Lsave_cp_regs_jump_table; \ + .else; \ + .long 0; \ + .endif; \ + .long THREAD_XTREGS_CP##x - rsr a5, CPENABLE - s32i a6, a4, COPROCESSOR_INFO_OWNER - xor a5, a3, a5 - wsr a5, CPENABLE - bnez a3, 1b +#define LOAD_CP_REGS(x) \ + .align 4; \ + .Lload_cp_regs_cp##x: \ + .if XTENSA_HAVE_COPROCESSOR(x); \ + xchal_cp##x##_load a2 a4 a5 a6 a7; \ + .endif; \ + jx a0 -1: wsr a7, PS - rsync - retw +#define LOAD_CP_REGS_TAB(x) \ + .if XTENSA_HAVE_COPROCESSOR(x); \ + .long .Lload_cp_regs_cp##x - .Lload_cp_regs_jump_table; \ + .else; \ + .long 0; \ + .endif; \ + .long THREAD_XTREGS_CP##x + SAVE_CP_REGS(0) + SAVE_CP_REGS(1) + SAVE_CP_REGS(2) + SAVE_CP_REGS(3) + SAVE_CP_REGS(4) + SAVE_CP_REGS(5) + SAVE_CP_REGS(6) + SAVE_CP_REGS(7) -ENTRY(disable_coprocessor) - entry sp, 16 - rsil a7, LOCKLEVEL - rsr a3, CPENABLE - movi a4, 1 - ssl a2 - sll a4, a4 - and a4, a3, a4 - xor a3, a3, a4 - wsr a3, CPENABLE - wsr a7, PS - rsync - retw + LOAD_CP_REGS(0) + LOAD_CP_REGS(1) + LOAD_CP_REGS(2) + LOAD_CP_REGS(3) + LOAD_CP_REGS(4) + LOAD_CP_REGS(5) + LOAD_CP_REGS(6) + LOAD_CP_REGS(7) -ENTRY(enable_coprocessor) - entry sp, 16 - rsil a7, LOCKLEVEL - rsr a3, CPENABLE - movi a4, 1 - ssl a2 - sll a4, a4 - or a3, a3, a4 - wsr a3, CPENABLE - wsr a7, PS - rsync - retw + .align 4 +.Lsave_cp_regs_jump_table: + SAVE_CP_REGS_TAB(0) + SAVE_CP_REGS_TAB(1) + SAVE_CP_REGS_TAB(2) + SAVE_CP_REGS_TAB(3) + SAVE_CP_REGS_TAB(4) + SAVE_CP_REGS_TAB(5) + SAVE_CP_REGS_TAB(6) + SAVE_CP_REGS_TAB(7) +.Lload_cp_regs_jump_table: + LOAD_CP_REGS_TAB(0) + LOAD_CP_REGS_TAB(1) + LOAD_CP_REGS_TAB(2) + LOAD_CP_REGS_TAB(3) + LOAD_CP_REGS_TAB(4) + LOAD_CP_REGS_TAB(5) + LOAD_CP_REGS_TAB(6) + LOAD_CP_REGS_TAB(7) -ENTRY(save_coprocessor_extra) - entry sp, 16 - xchal_extra_store_funcbody - retw +/* + * coprocessor_save(buffer, index) + * a2 a3 + * coprocessor_load(buffer, index) + * a2 a3 + * + * Save or load coprocessor registers for coprocessor 'index'. + * The register values are saved to or loaded from them 'buffer' address. + * + * Note that these functions don't update the coprocessor_owner information! + * + */ -ENTRY(restore_coprocessor_extra) - entry sp, 16 - xchal_extra_load_funcbody +ENTRY(coprocessor_save) + entry a1, 32 + s32i a0, a1, 0 + movi a0, .Lsave_cp_regs_jump_table + addx8 a3, a3, a0 + l32i a3, a3, 0 + beqz a3, 1f + add a0, a0, a3 + callx0 a0 +1: l32i a0, a1, 0 retw -ENTRY(save_coprocessor_registers) - entry sp, 16 - xchal_cpi_store_funcbody +ENTRY(coprocessor_load) + entry a1, 32 + s32i a0, a1, 0 + movi a0, .Lload_cp_regs_jump_table + addx4 a3, a3, a0 + l32i a3, a3, 0 + beqz a3, 1f + add a0, a0, a3 + callx0 a0 +1: l32i a0, a1, 0 retw -ENTRY(restore_coprocessor_registers) - entry sp, 16 - xchal_cpi_load_funcbody +/* + * coprocessor_flush(struct task_info*, index) + * a2 a3 + * coprocessor_restore(struct task_info*, index) + * a2 a3 + * + * Save or load coprocessor registers for coprocessor 'index'. + * The register values are saved to or loaded from the coprocessor area + * inside the task_info structure. + * + * Note that these functions don't update the coprocessor_owner information! + * + */ + + +ENTRY(coprocessor_flush) + entry a1, 32 + s32i a0, a1, 0 + movi a0, .Lsave_cp_regs_jump_table + addx8 a3, a3, a0 + l32i a4, a3, 4 + l32i a3, a3, 0 + add a2, a2, a4 + beqz a3, 1f + add a0, a0, a3 + callx0 a0 +1: l32i a0, a1, 0 retw +ENTRY(coprocessor_restore) + entry a1, 32 + s32i a0, a1, 0 + movi a0, .Lload_cp_regs_jump_table + addx4 a3, a3, a0 + l32i a4, a3, 4 + l32i a3, a3, 0 + add a2, a2, a4 + beqz a3, 1f + add a0, a0, a3 + callx0 a0 +1: l32i a0, a1, 0 + retw /* - * The Xtensa compile-time HAL (core.h) XCHAL_*_SA_CONTENTS_LIBDB macros - * describe the contents of coprocessor & extra save areas in terms of - * undefined CONTENTS_LIBDB_{SREG,UREG,REGF} macros. We define these - * latter macros here; they expand into a table of the format we want. - * The general format is: + * Entry condition: * - * CONTENTS_LIBDB_SREG(libdbnum, offset, size, align, rsv1, name, sregnum, - * bitmask, rsv2, rsv3) - * CONTENTS_LIBDB_UREG(libdbnum, offset, size, align, rsv1, name, uregnum, - * bitmask, rsv2, rsv3) - * CONTENTS_LIBDB_REGF(libdbnum, offset, size, align, rsv1, name, index, - * numentries, contentsize, regname_base, - * regfile_name, rsv2, rsv3) + * a0: trashed, original value saved on stack (PT_AREG0) + * a1: a1 + * a2: new stack pointer, original in DEPC + * a3: dispatch table + * depc: a2, original value saved on stack (PT_DEPC) + * excsave_1: a3 * - * For this table, we only care about the , and - * fields. + * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC + * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception */ -/* Map all XCHAL CONTENTS macros to the reg_entry asm macro defined below: */ - -#define CONTENTS_LIBDB_SREG(libdbnum,offset,size,align,rsv1,name,sregnum, \ - bitmask, rsv2, rsv3) \ - reg_entry libdbnum, offset, size ; -#define CONTENTS_LIBDB_UREG(libdbnum,offset,size,align,rsv1,name,uregnum, \ - bitmask, rsv2, rsv3) \ - reg_entry libdbnum, offset, size ; -#define CONTENTS_LIBDB_REGF(libdbnum, offset, size, align, rsv1, name, index, \ - numentries, contentsize, regname_base, \ - regfile_name, rsv2, rsv3) \ - reg_entry libdbnum, offset, size ; - -/* A single table entry: */ - .macro reg_entry libdbnum, offset, size - .ifne (__last_offset-(__last_group_offset+\offset)) - /* padding entry */ - .word (0xFC000000+__last_offset-(__last_group_offset+\offset)) - .endif - .word \libdbnum /* actual entry */ - .set __last_offset, __last_group_offset+\offset+\size - .endm /* reg_entry */ - - -/* Table entry that marks the beginning of a group (coprocessor or "extra"): */ - .macro reg_group cpnum, num_entries, align - .set __last_group_offset, (__last_offset + \align- 1) & -\align - .ifne \num_entries - .word 0xFD000000+(\cpnum<<16)+\num_entries - .endif - .endm /* reg_group */ +ENTRY(fast_coprocessor_double) + wsr a0, EXCSAVE_1 + movi a0, unrecoverable_exception + callx0 a0 -/* - * Register info tables. - */ - .section .rodata, "a" - .globl _xtensa_reginfo_tables - .globl _xtensa_reginfo_table_size - .align 4 -_xtensa_reginfo_table_size: - .word _xtensa_reginfo_table_end - _xtensa_reginfo_tables - -_xtensa_reginfo_tables: - .set __last_offset, 0 - reg_group 0xFF, XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM, XCHAL_EXTRA_SA_ALIGN - XCHAL_EXTRA_SA_CONTENTS_LIBDB - reg_group 0, XCHAL_CP0_SA_CONTENTS_LIBDB_NUM, XCHAL_CP0_SA_ALIGN - XCHAL_CP0_SA_CONTENTS_LIBDB - reg_group 1, XCHAL_CP1_SA_CONTENTS_LIBDB_NUM, XCHAL_CP1_SA_ALIGN - XCHAL_CP1_SA_CONTENTS_LIBDB - reg_group 2, XCHAL_CP2_SA_CONTENTS_LIBDB_NUM, XCHAL_CP2_SA_ALIGN - XCHAL_CP2_SA_CONTENTS_LIBDB - reg_group 3, XCHAL_CP3_SA_CONTENTS_LIBDB_NUM, XCHAL_CP3_SA_ALIGN - XCHAL_CP3_SA_CONTENTS_LIBDB - reg_group 4, XCHAL_CP4_SA_CONTENTS_LIBDB_NUM, XCHAL_CP4_SA_ALIGN - XCHAL_CP4_SA_CONTENTS_LIBDB - reg_group 5, XCHAL_CP5_SA_CONTENTS_LIBDB_NUM, XCHAL_CP5_SA_ALIGN - XCHAL_CP5_SA_CONTENTS_LIBDB - reg_group 6, XCHAL_CP6_SA_CONTENTS_LIBDB_NUM, XCHAL_CP6_SA_ALIGN - XCHAL_CP6_SA_CONTENTS_LIBDB - reg_group 7, XCHAL_CP7_SA_CONTENTS_LIBDB_NUM, XCHAL_CP7_SA_ALIGN - XCHAL_CP7_SA_CONTENTS_LIBDB - .word 0xFC000000 /* invalid register number,marks end of table*/ -_xtensa_reginfo_table_end: -#endif +ENTRY(fast_coprocessor) + + /* Save remaining registers a1-a3 and SAR */ + + xsr a3, EXCSAVE_1 + s32i a3, a2, PT_AREG3 + rsr a3, SAR + s32i a1, a2, PT_AREG1 + s32i a3, a2, PT_SAR + mov a1, a2 + rsr a2, DEPC + s32i a2, a1, PT_AREG2 + + /* + * The hal macros require up to 4 temporary registers. We use a3..a6. + */ + + s32i a4, a1, PT_AREG4 + s32i a5, a1, PT_AREG5 + s32i a6, a1, PT_AREG6 + + /* Find coprocessor number. Subtract first CP EXCCAUSE from EXCCAUSE */ + + rsr a3, EXCCAUSE + addi a3, a3, -EXCCAUSE_COPROCESSOR0_DISABLED + + /* Set corresponding CPENABLE bit -> (sar:cp-index, a3: 1< #include #include +#include /* Unimplemented features. */ -#undef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION #undef KERNEL_STACK_OVERFLOW_CHECK #undef PREEMPTIBLE_KERNEL #undef ALLOCA_EXCEPTION_IN_IRAM @@ -214,19 +214,7 @@ _user_exception: /* We are back to the original stack pointer (a1) */ -2: -#if XCHAL_EXTRA_SA_SIZE - - /* For user exceptions, save the extra state into the user's TCB. - * Note: We must assume that xchal_extra_store_funcbody destroys a2..a15 - */ - - GET_CURRENT(a2,a1) - addi a2, a2, THREAD_CP_SAVE - xchal_extra_store_funcbody -#endif - - /* Now, jump to the common exception handler. */ +2: /* Now, jump to the common exception handler. */ j common_exception @@ -382,6 +370,10 @@ common_exception: s32i a2, a1, PT_LBEG s32i a3, a1, PT_LEND + /* Save optional registers. */ + + save_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT + /* Go to second-level dispatcher. Set up parameters to pass to the * exception handler and call the exception handler. */ @@ -403,74 +395,49 @@ common_exception_return: /* Jump if we are returning from kernel exceptions. */ 1: l32i a3, a1, PT_PS - _bbsi.l a3, PS_UM_BIT, 2f - j kernel_exception_exit + _bbci.l a3, PS_UM_BIT, 4f /* Specific to a user exception exit: * We need to check some flags for signal handling and rescheduling, * and have to restore WB and WS, extra states, and all registers * in the register file that were in use in the user task. - */ - -2: wsr a3, PS /* disable interrupts */ - - /* Check for signals (keep interrupts disabled while we read TI_FLAGS) - * Note: PS.INTLEVEL = 0, PS.EXCM = 1 + * Note that we don't disable interrupts here. */ GET_THREAD_INFO(a2,a1) l32i a4, a2, TI_FLAGS - /* Enable interrupts again. - * Note: When we get here, we certainly have handled any interrupts. - * (Hint: There is only one user exception frame on stack) - */ - - movi a3, 1 << PS_WOE_BIT - _bbsi.l a4, TIF_NEED_RESCHED, 3f _bbci.l a4, TIF_SIGPENDING, 4f -#ifndef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION l32i a4, a1, PT_DEPC bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f -#endif - /* Reenable interrupts and call do_signal() */ + /* Call do_signal() */ - wsr a3, PS movi a4, do_signal # int do_signal(struct pt_regs*, sigset_t*) mov a6, a1 movi a7, 0 callx4 a4 j 1b -3: /* Reenable interrupts and reschedule */ +3: /* Reschedule */ - wsr a3, PS movi a4, schedule # void schedule (void) callx4 a4 j 1b - /* Restore the state of the task and return from the exception. */ - -4: /* a2 holds GET_CURRENT(a2,a1) */ - -#if XCHAL_EXTRA_SA_SIZE +4: /* Restore optional registers. */ - /* For user exceptions, restore the extra state from the user's TCB. */ + load_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT - /* Note: a2 still contains GET_CURRENT(a2,a1) */ - addi a2, a2, THREAD_CP_SAVE - xchal_extra_load_funcbody + wsr a3, PS /* disable interrupts */ - /* We must assume that xchal_extra_store_funcbody destroys - * registers a2..a15. FIXME, this list can eventually be - * reduced once real register requirements of the macro are - * finalized. */ + _bbci.l a3, PS_UM_BIT, kernel_exception_exit -#endif /* XCHAL_EXTRA_SA_SIZE */ +user_exception_exit: + /* Restore the state of the task and return from the exception. */ /* Switch to the user thread WINDOWBASE. Save SP temporarily in DEPC */ @@ -536,10 +503,6 @@ common_exception_return: kernel_exception_exit: - /* Disable interrupts (a3 holds PT_PS) */ - - wsr a3, PS - #ifdef PREEMPTIBLE_KERNEL #ifdef CONFIG_PREEMPT @@ -618,6 +581,8 @@ kernel_exception_exit: common_exception_exit: + /* Restore address registers. */ + _bbsi.l a2, 1, 1f l32i a4, a1, PT_AREG4 l32i a5, a1, PT_AREG5 @@ -1150,7 +1115,6 @@ CATCH * excsave_1: a3 * * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler. - * Note: We don't need to save a2 in depc (return value) */ ENTRY(fast_syscall_spill_registers) @@ -1166,29 +1130,31 @@ ENTRY(fast_syscall_spill_registers) rsr a0, SAR xsr a3, EXCSAVE_1 # restore a3 and excsave_1 - s32i a0, a2, PT_AREG4 # store SAR to PT_AREG4 s32i a3, a2, PT_AREG3 + s32i a4, a2, PT_AREG4 + s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5 /* The spill routine might clobber a7, a11, and a15. */ - s32i a7, a2, PT_AREG5 - s32i a11, a2, PT_AREG6 - s32i a15, a2, PT_AREG7 + s32i a7, a2, PT_AREG7 + s32i a11, a2, PT_AREG11 + s32i a15, a2, PT_AREG15 - call0 _spill_registers # destroys a3, DEPC, and SAR + call0 _spill_registers # destroys a3, a4, and SAR /* Advance PC, restore registers and SAR, and return from exception. */ - l32i a3, a2, PT_AREG4 + l32i a3, a2, PT_AREG5 + l32i a4, a2, PT_AREG4 l32i a0, a2, PT_AREG0 wsr a3, SAR l32i a3, a2, PT_AREG3 /* Restore clobbered registers. */ - l32i a7, a2, PT_AREG5 - l32i a11, a2, PT_AREG6 - l32i a15, a2, PT_AREG7 + l32i a7, a2, PT_AREG7 + l32i a11, a2, PT_AREG11 + l32i a15, a2, PT_AREG15 movi a2, 0 rfe @@ -1247,16 +1213,6 @@ fast_syscall_spill_registers_fixup: * Note: This frame might be the same as above. */ -#ifdef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION - /* Restore registers we precautiously saved. - * We have the value of the 'right' a3 - */ - - l32i a7, a2, PT_AREG5 - l32i a11, a2, PT_AREG6 - l32i a15, a2, PT_AREG7 -#endif - /* Setup stack pointer. */ addi a2, a2, -PT_USER_SIZE @@ -1271,9 +1227,9 @@ fast_syscall_spill_registers_fixup: movi a3, exc_table rsr a0, EXCCAUSE - addx4 a0, a0, a3 # find entry in table - l32i a0, a0, EXC_TABLE_FAST_USER # load handler - jx a0 + addx4 a0, a0, a3 # find entry in table + l32i a0, a0, EXC_TABLE_FAST_USER # load handler + jx a0 fast_syscall_spill_registers_fixup_return: @@ -1290,14 +1246,6 @@ fast_syscall_spill_registers_fixup_return: s32i a2, a3, EXC_TABLE_PARAM l32i a2, a3, EXC_TABLE_KSTK -#ifdef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION - /* Save registers again that might be clobbered. */ - - s32i a7, a2, PT_AREG5 - s32i a11, a2, PT_AREG6 - s32i a15, a2, PT_AREG7 -#endif - /* Load WB at the time the exception occurred. */ rsr a3, SAR # WB is still in SAR @@ -1319,7 +1267,7 @@ fast_syscall_spill_registers_fixup_return: * This is not a real function. The following conditions must be met: * * - must be called with call0. - * - uses DEPC, a3 and SAR. + * - uses a3, a4 and SAR. * - the last 'valid' register of each frame are clobbered. * - the caller must have registered a fixup handler * (or be inside a critical section) @@ -1331,41 +1279,39 @@ ENTRY(_spill_registers) /* * Rotate ws so that the current windowbase is at bit 0. * Assume ws = xxxwww1yy (www1 current window frame). - * Rotate ws right so that a2 = yyxxxwww1. + * Rotate ws right so that a4 = yyxxxwww1. */ - wsr a2, DEPC # preserve a2 - rsr a2, WINDOWBASE - rsr a3, WINDOWSTART - ssr a2 # holds WB - slli a2, a3, WSBITS - or a3, a3, a2 # a2 = xxxwww1yyxxxwww1yy - srl a3, a3 + rsr a4, WINDOWBASE + rsr a3, WINDOWSTART # a3 = xxxwww1yy + ssr a4 # holds WB + slli a4, a3, WSBITS + or a3, a3, a4 # a3 = xxxwww1yyxxxwww1yy + srl a3, a3 # a3 = 00xxxwww1yyxxxwww1 /* We are done if there are no more than the current register frame. */ - extui a3, a3, 1, WSBITS-2 # a3 = 0yyxxxwww - movi a2, (1 << (WSBITS-1)) + extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww + movi a4, (1 << (WSBITS-1)) _beqz a3, .Lnospill # only one active frame? jump /* We want 1 at the top, so that we return to the current windowbase */ - or a3, a3, a2 # 1yyxxxwww + or a3, a3, a4 # 1yyxxxwww /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */ wsr a3, WINDOWSTART # save shifted windowstart - neg a2, a3 - and a3, a2, a3 # first bit set from right: 000010000 + neg a4, a3 + and a3, a4, a3 # first bit set from right: 000010000 - ffs_ws a2, a3 # a2: shifts to skip empty frames + ffs_ws a4, a3 # a4: shifts to skip empty frames movi a3, WSBITS - sub a2, a3, a2 # WSBITS-a2:number of 0-bits from right - ssr a2 # save in SAR for later. + sub a4, a3, a4 # WSBITS-a4:number of 0-bits from right + ssr a4 # save in SAR for later. rsr a3, WINDOWBASE - add a3, a3, a2 - rsr a2, DEPC # restore a2 + add a3, a3, a4 wsr a3, WINDOWBASE rsync @@ -1394,6 +1340,9 @@ ENTRY(_spill_registers) l32e a4, a1, -16 j .Lc12c +.Lnospill: + ret + .Lloop: _bbsi.l a3, 1, .Lc4 _bbci.l a3, 2, .Lc12 @@ -1419,9 +1368,7 @@ ENTRY(_spill_registers) movi a3, 1 sll a3, a3 wsr a3, WINDOWSTART - -.Lnospill: - jx a0 + ret .Lc4: s32e a4, a9, -16 s32e a5, a9, -12 @@ -1830,154 +1777,6 @@ ENTRY(fast_store_prohibited) 1: j _user_exception -#if XCHAL_EXTRA_SA_SIZE - -#warning fast_coprocessor untested - -/* - * Entry condition: - * - * a0: trashed, original value saved on stack (PT_AREG0) - * a1: a1 - * a2: new stack pointer, original in DEPC - * a3: dispatch table - * depc: a2, original value saved on stack (PT_DEPC) - * excsave_1: a3 - * - * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC - * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception - */ - -ENTRY(fast_coprocessor_double) - wsr a0, EXCSAVE_1 - movi a0, unrecoverable_exception - callx0 a0 - -ENTRY(fast_coprocessor) - - /* Fatal if we are in a double exception. */ - - l32i a0, a2, PT_DEPC - _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_coprocessor_double - - /* Save some registers a1, a3, a4, SAR */ - - xsr a3, EXCSAVE_1 - s32i a3, a2, PT_AREG3 - rsr a3, SAR - s32i a4, a2, PT_AREG4 - s32i a1, a2, PT_AREG1 - s32i a5, a1, PT_AREG5 - s32i a3, a2, PT_SAR - mov a1, a2 - - /* Currently, the HAL macros only guarantee saving a0 and a1. - * These can and will be refined in the future, but for now, - * just save the remaining registers of a2...a15. - */ - s32i a6, a1, PT_AREG6 - s32i a7, a1, PT_AREG7 - s32i a8, a1, PT_AREG8 - s32i a9, a1, PT_AREG9 - s32i a10, a1, PT_AREG10 - s32i a11, a1, PT_AREG11 - s32i a12, a1, PT_AREG12 - s32i a13, a1, PT_AREG13 - s32i a14, a1, PT_AREG14 - s32i a15, a1, PT_AREG15 - - /* Find coprocessor number. Subtract first CP EXCCAUSE from EXCCAUSE */ - - rsr a0, EXCCAUSE - addi a3, a0, -XCHAL_EXCCAUSE_COPROCESSOR0_DISABLED - - /* Set corresponding CPENABLE bit */ - - movi a4, 1 - ssl a3 # SAR: 32 - coprocessor_number - rsr a5, CPENABLE - sll a4, a4 - or a4, a5, a4 - wsr a4, CPENABLE - rsync - movi a5, coprocessor_info # list of owner and offset into cp_save - addx8 a0, a4, a5 # entry for CP - - bne a4, a5, .Lload # bit wasn't set before, cp not in use - - /* Now compare the current task with the owner of the coprocessor. - * If they are the same, there is no reason to save or restore any - * coprocessor state. Having already enabled the coprocessor, - * branch ahead to return. - */ - GET_CURRENT(a5,a1) - l32i a4, a0, COPROCESSOR_INFO_OWNER # a4: current owner for this CP - beq a4, a5, .Ldone - - /* Find location to dump current coprocessor state: - * task_struct->task_cp_save_offset + coprocessor_offset[coprocessor] - * - * Note: a0 pointer to the entry in the coprocessor owner table, - * a3 coprocessor number, - * a4 current owner of coprocessor. - */ - l32i a5, a0, COPROCESSOR_INFO_OFFSET - addi a2, a4, THREAD_CP_SAVE - add a2, a2, a5 - - /* Store current coprocessor states. (a5 still has CP number) */ - - xchal_cpi_store_funcbody - - /* The macro might have destroyed a3 (coprocessor number), but - * SAR still has 32 - coprocessor_number! - */ - movi a3, 32 - rsr a4, SAR - sub a3, a3, a4 - -.Lload: /* A new task now owns the corpocessors. Save its TCB pointer into - * the coprocessor owner table. - * - * Note: a0 pointer to the entry in the coprocessor owner table, - * a3 coprocessor number. - */ - GET_CURRENT(a4,a1) - s32i a4, a0, 0 - - /* Find location from where to restore the current coprocessor state.*/ - - l32i a5, a0, COPROCESSOR_INFO_OFFSET - addi a2, a4, THREAD_CP_SAVE - add a2, a2, a4 - - xchal_cpi_load_funcbody - - /* We must assume that the xchal_cpi_store_funcbody macro destroyed - * registers a2..a15. - */ - -.Ldone: l32i a15, a1, PT_AREG15 - l32i a14, a1, PT_AREG14 - l32i a13, a1, PT_AREG13 - l32i a12, a1, PT_AREG12 - l32i a11, a1, PT_AREG11 - l32i a10, a1, PT_AREG10 - l32i a9, a1, PT_AREG9 - l32i a8, a1, PT_AREG8 - l32i a7, a1, PT_AREG7 - l32i a6, a1, PT_AREG6 - l32i a5, a1, PT_AREG5 - l32i a4, a1, PT_AREG4 - l32i a3, a1, PT_AREG3 - l32i a2, a1, PT_AREG2 - l32i a0, a1, PT_AREG0 - l32i a1, a1, PT_AREG1 - - rfe - -#endif /* XCHAL_EXTRA_SA_SIZE */ - /* * System Calls. * @@ -2086,20 +1885,36 @@ ENTRY(_switch_to) entry a1, 16 - mov a4, a3 # preserve a3 + mov a12, a2 # preserve 'prev' (a2) + mov a13, a3 # and 'next' (a3) + + l32i a4, a2, TASK_THREAD_INFO + l32i a5, a3, TASK_THREAD_INFO + + save_xtregs_user a4 a6 a8 a9 a10 a11 THREAD_XTREGS_USER - s32i a0, a2, THREAD_RA # save return address - s32i a1, a2, THREAD_SP # save stack pointer + s32i a0, a12, THREAD_RA # save return address + s32i a1, a12, THREAD_SP # save stack pointer - /* Disable ints while we manipulate the stack pointer; spill regs. */ + /* Disable ints while we manipulate the stack pointer. */ - movi a5, (1 << PS_EXCM_BIT) | LOCKLEVEL - xsr a5, PS + movi a14, (1 << PS_EXCM_BIT) | LOCKLEVEL + xsr a14, PS rsr a3, EXCSAVE_1 rsync s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */ - call0 _spill_registers + /* Switch CPENABLE */ + +#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) + l32i a3, a5, THREAD_CPENABLE + xsr a3, CPENABLE + s32i a3, a4, THREAD_CPENABLE +#endif + + /* Flush register file. */ + + call0 _spill_registers # destroys a3, a4, and SAR /* Set kernel stack (and leave critical section) * Note: It's save to set it here. The stack will not be overwritten @@ -2107,19 +1922,21 @@ ENTRY(_switch_to) * we return from kernel space. */ - l32i a0, a4, TASK_THREAD_INFO rsr a3, EXCSAVE_1 # exc_table - movi a1, 0 - addi a0, a0, PT_REGS_OFFSET - s32i a1, a3, EXC_TABLE_FIXUP - s32i a0, a3, EXC_TABLE_KSTK + movi a6, 0 + addi a7, a5, PT_REGS_OFFSET + s32i a6, a3, EXC_TABLE_FIXUP + s32i a7, a3, EXC_TABLE_KSTK /* restore context of the task that 'next' addresses */ - l32i a0, a4, THREAD_RA /* restore return address */ - l32i a1, a4, THREAD_SP /* restore stack pointer */ + l32i a0, a13, THREAD_RA # restore return address + l32i a1, a13, THREAD_SP # restore stack pointer + + load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER - wsr a5, PS + wsr a14, PS + mov a2, a12 # return 'prev' rsync retw diff --git a/arch/xtensa/kernel/module.c b/arch/xtensa/kernel/module.c index ddf14dc..3981a46 100644 --- a/arch/xtensa/kernel/module.c +++ b/arch/xtensa/kernel/module.c @@ -28,7 +28,7 @@ void *module_alloc(unsigned long size) { if (size == 0) return NULL; - return vmalloc(size); + return vmalloc_exec(size); } void module_free(struct module *mod, void *module_region) diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c index f53d7bd..9185597 100644 --- a/arch/xtensa/kernel/process.c +++ b/arch/xtensa/kernel/process.c @@ -52,6 +52,55 @@ void (*pm_power_off)(void) = NULL; EXPORT_SYMBOL(pm_power_off); +#if XTENSA_HAVE_COPROCESSORS + +void coprocessor_release_all(struct thread_info *ti) +{ + unsigned long cpenable; + int i; + + /* Make sure we don't switch tasks during this operation. */ + + preempt_disable(); + + /* Walk through all cp owners and release it for the requested one. */ + + cpenable = ti->cpenable; + + for (i = 0; i < XCHAL_CP_MAX; i++) { + if (coprocessor_owner[i] == ti) { + coprocessor_owner[i] = 0; + cpenable &= ~(1 << i); + } + } + + ti->cpenable = cpenable; + coprocessor_clear_cpenable(); + + preempt_enable(); +} + +void coprocessor_flush_all(struct thread_info *ti) +{ + unsigned long cpenable; + int i; + + preempt_disable(); + + cpenable = ti->cpenable; + + for (i = 0; i < XCHAL_CP_MAX; i++) { + if ((cpenable & 1) != 0 && coprocessor_owner[i] == ti) + coprocessor_flush(ti, i); + cpenable >>= 1; + } + + preempt_enable(); +} + +#endif + + /* * Powermanagement idle function, if any is provided by the platform. */ @@ -71,15 +120,36 @@ void cpu_idle(void) } /* - * Free current thread data structures etc.. + * This is called when the thread calls exit(). */ - void exit_thread(void) { +#if XTENSA_HAVE_COPROCESSORS + coprocessor_release_all(current_thread_info()); +#endif } +/* + * Flush thread state. This is called when a thread does an execve() + * Note that we flush coprocessor registers for the case execve fails. + */ void flush_thread(void) { +#if XTENSA_HAVE_COPROCESSORS + struct thread_info *ti = current_thread_info(); + coprocessor_flush_all(ti); + coprocessor_release_all(ti); +#endif +} + +/* + * This is called before the thread is copied. + */ +void prepare_to_copy(struct task_struct *tsk) +{ +#if XTENSA_HAVE_COPROCESSORS + coprocessor_flush_all(task_thread_info(tsk)); +#endif } /* @@ -107,6 +177,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, struct task_struct * p, struct pt_regs * regs) { struct pt_regs *childregs; + struct thread_info *ti; unsigned long tos; int user_mode = user_mode(regs); @@ -128,13 +199,14 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, p->set_child_tid = p->clear_child_tid = NULL; p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1); p->thread.sp = (unsigned long)childregs; + if (user_mode(regs)) { int len = childregs->wmask & ~0xf; childregs->areg[1] = usp; memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4], ®s->areg[XCHAL_NUM_AREGS - len/4], len); - +// FIXME: we need to set THREADPTR in thread_info... if (clone_flags & CLONE_SETTLS) childregs->areg[2] = childregs->areg[6]; @@ -142,6 +214,12 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, /* In kernel space, we start a new thread with a new stack. */ childregs->wmask = 1; } + +#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) + ti = task_thread_info(p); + ti->cpenable = 0; +#endif + return 0; } @@ -179,10 +257,6 @@ unsigned long get_wchan(struct task_struct *p) } /* - * do_copy_regs() gathers information from 'struct pt_regs' and - * 'current->thread.areg[]' to fill in the xtensa_gregset_t - * structure. - * * xtensa_gregset_t and 'struct pt_regs' are vastly different formats * of processor registers. Besides different ordering, * xtensa_gregset_t contains non-live register information that @@ -191,18 +265,19 @@ unsigned long get_wchan(struct task_struct *p) * */ -void do_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs, - struct task_struct *tsk) +void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs) { - int i, n, wb_offset; + unsigned long wb, ws, wm; + int live, last; - elfregs->xchal_config_id0 = XCHAL_HW_CONFIGID0; - elfregs->xchal_config_id1 = XCHAL_HW_CONFIGID1; + wb = regs->windowbase; + ws = regs->windowstart; + wm = regs->wmask; + ws = ((ws >> wb) | (ws << (WSBITS - wb))) & ((1 << WSBITS) - 1); - __asm__ __volatile__ ("rsr %0, 176\n" : "=a" (i)); - elfregs->cpux = i; - __asm__ __volatile__ ("rsr %0, 208\n" : "=a" (i)); - elfregs->cpuy = i; + /* Don't leak any random bits. */ + + memset(elfregs, 0, sizeof (elfregs)); /* Note: PS.EXCM is not set while user task is running; its * being set in regs->ps is for exception handling convenience. @@ -210,204 +285,22 @@ void do_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs, elfregs->pc = regs->pc; elfregs->ps = (regs->ps & ~(1 << PS_EXCM_BIT)); - elfregs->exccause = regs->exccause; - elfregs->excvaddr = regs->excvaddr; - elfregs->windowbase = regs->windowbase; - elfregs->windowstart = regs->windowstart; elfregs->lbeg = regs->lbeg; elfregs->lend = regs->lend; elfregs->lcount = regs->lcount; elfregs->sar = regs->sar; - elfregs->syscall = regs->syscall; - - /* Copy register file. - * The layout looks like this: - * - * | a0 ... a15 | Z ... Z | arX ... arY | - * current window unused saved frames - */ - - memset (elfregs->ar, 0, sizeof(elfregs->ar)); + elfregs->windowstart = ws; - wb_offset = regs->windowbase * 4; - n = (regs->wmask&1)? 4 : (regs->wmask&2)? 8 : (regs->wmask&4)? 12 : 16; - - for (i = 0; i < n; i++) - elfregs->ar[(wb_offset + i) % XCHAL_NUM_AREGS] = regs->areg[i]; - - n = (regs->wmask >> 4) * 4; - - for (i = XCHAL_NUM_AREGS - n; n > 0; i++, n--) - elfregs->ar[(wb_offset + i) % XCHAL_NUM_AREGS] = regs->areg[i]; + live = (wm & 2) ? 4 : (wm & 4) ? 8 : (wm & 8) ? 12 : 16; + last = XCHAL_NUM_AREGS - (wm >> 4) * 4; + memcpy(elfregs->a, regs->areg, live * 4); + memcpy(elfregs->a + last, regs->areg + last, (wm >> 4) * 16); } -void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs) +int dump_fpu(void) { - do_copy_regs ((xtensa_gregset_t *)elfregs, regs, current); -} - - -/* The inverse of do_copy_regs(). No error or sanity checking. */ - -void do_restore_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs, - struct task_struct *tsk) -{ - int i, n, wb_offset; - - /* Note: PS.EXCM is not set while user task is running; it - * needs to be set in regs->ps is for exception handling convenience. - */ - - regs->pc = elfregs->pc; - regs->ps = (elfregs->ps | (1 << PS_EXCM_BIT)); - regs->exccause = elfregs->exccause; - regs->excvaddr = elfregs->excvaddr; - regs->windowbase = elfregs->windowbase; - regs->windowstart = elfregs->windowstart; - regs->lbeg = elfregs->lbeg; - regs->lend = elfregs->lend; - regs->lcount = elfregs->lcount; - regs->sar = elfregs->sar; - regs->syscall = elfregs->syscall; - - /* Clear everything. */ - - memset (regs->areg, 0, sizeof(regs->areg)); - - /* Copy regs from live window frame. */ - - wb_offset = regs->windowbase * 4; - n = (regs->wmask&1)? 4 : (regs->wmask&2)? 8 : (regs->wmask&4)? 12 : 16; - - for (i = 0; i < n; i++) - regs->areg[(wb_offset+i) % XCHAL_NUM_AREGS] = elfregs->ar[i]; - - n = (regs->wmask >> 4) * 4; - - for (i = XCHAL_NUM_AREGS - n; n > 0; i++, n--) - regs->areg[(wb_offset+i) % XCHAL_NUM_AREGS] = elfregs->ar[i]; -} - -/* - * do_save_fpregs() gathers information from 'struct pt_regs' and - * 'current->thread' to fill in the elf_fpregset_t structure. - * - * Core files and ptrace use elf_fpregset_t. - */ - -void do_save_fpregs (elf_fpregset_t *fpregs, struct pt_regs *regs, - struct task_struct *tsk) -{ -#if XCHAL_HAVE_CP - - extern unsigned char _xtensa_reginfo_tables[]; - extern unsigned _xtensa_reginfo_table_size; - int i; - unsigned long flags; - - /* Before dumping coprocessor state from memory, - * ensure any live coprocessor contents for this - * task are first saved to memory: - */ - local_irq_save(flags); - - for (i = 0; i < XCHAL_CP_MAX; i++) { - if (tsk == coprocessor_info[i].owner) { - enable_coprocessor(i); - save_coprocessor_registers( - tsk->thread.cp_save+coprocessor_info[i].offset,i); - disable_coprocessor(i); - } - } - - local_irq_restore(flags); - - /* Now dump coprocessor & extra state: */ - memcpy((unsigned char*)fpregs, - _xtensa_reginfo_tables, _xtensa_reginfo_table_size); - memcpy((unsigned char*)fpregs + _xtensa_reginfo_table_size, - tsk->thread.cp_save, XTENSA_CP_EXTRA_SIZE); -#endif -} - -/* - * The inverse of do_save_fpregs(). - * Copies coprocessor and extra state from fpregs into regs and tsk->thread. - * Returns 0 on success, non-zero if layout doesn't match. - */ - -int do_restore_fpregs (elf_fpregset_t *fpregs, struct pt_regs *regs, - struct task_struct *tsk) -{ -#if XCHAL_HAVE_CP - - extern unsigned char _xtensa_reginfo_tables[]; - extern unsigned _xtensa_reginfo_table_size; - int i; - unsigned long flags; - - /* Make sure save area layouts match. - * FIXME: in the future we could allow restoring from - * a different layout of the same registers, by comparing - * fpregs' table with _xtensa_reginfo_tables and matching - * entries and copying registers one at a time. - * Not too sure yet whether that's very useful. - */ - - if( memcmp((unsigned char*)fpregs, - _xtensa_reginfo_tables, _xtensa_reginfo_table_size) ) { - return -1; - } - - /* Before restoring coprocessor state from memory, - * ensure any live coprocessor contents for this - * task are first invalidated. - */ - - local_irq_save(flags); - - for (i = 0; i < XCHAL_CP_MAX; i++) { - if (tsk == coprocessor_info[i].owner) { - enable_coprocessor(i); - save_coprocessor_registers( - tsk->thread.cp_save+coprocessor_info[i].offset,i); - coprocessor_info[i].owner = 0; - disable_coprocessor(i); - } - } - - local_irq_restore(flags); - - /* Now restore coprocessor & extra state: */ - - memcpy(tsk->thread.cp_save, - (unsigned char*)fpregs + _xtensa_reginfo_table_size, - XTENSA_CP_EXTRA_SIZE); -#endif return 0; } -/* - * Fill in the CP structure for a core dump for a particular task. - */ - -int -dump_task_fpu(struct pt_regs *regs, struct task_struct *task, elf_fpregset_t *r) -{ - return 0; /* no coprocessors active on this processor */ -} - -/* - * Fill in the CP structure for a core dump. - * This includes any FPU coprocessor. - * Here, we dump all coprocessors, and other ("extra") custom state. - * - * This function is called by elf_core_dump() in fs/binfmt_elf.c - * (in which case 'regs' comes from calls to do_coredump, see signals.c). - */ -int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r) -{ - return dump_task_fpu(regs, current, r); -} asmlinkage long xtensa_clone(unsigned long clone_flags, unsigned long newsp, @@ -421,8 +314,8 @@ long xtensa_clone(unsigned long clone_flags, unsigned long newsp, } /* - * * xtensa_execve() executes a new program. - * */ + * xtensa_execve() executes a new program. + */ asmlinkage long xtensa_execve(char __user *name, char __user * __user *argv, @@ -437,7 +330,6 @@ long xtensa_execve(char __user *name, char __user * __user *argv, error = PTR_ERR(filename); if (IS_ERR(filename)) goto out; - // FIXME: release coprocessor?? error = do_execve(filename, argv, envp, regs); if (error == 0) { task_lock(current); diff --git a/arch/xtensa/kernel/ptrace.c b/arch/xtensa/kernel/ptrace.c index 5533c78..9486882 100644 --- a/arch/xtensa/kernel/ptrace.c +++ b/arch/xtensa/kernel/ptrace.c @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2001 - 2005 Tensilica Inc. + * Copyright (C) 2001 - 2007 Tensilica Inc. * * Joe Taylor * Chris Zankel @@ -28,14 +28,10 @@ #include #include #include - -#define TEST_KERNEL // verify kernel operations FIXME: remove - +#include /* - * Called by kernel/ptrace.c when detaching.. - * - * Make sure single step bits etc are not set. + * Called by kernel/ptrace.c when detaching to disable single stepping. */ void ptrace_disable(struct task_struct *child) @@ -43,136 +39,237 @@ void ptrace_disable(struct task_struct *child) /* Nothing to do.. */ } -long arch_ptrace(struct task_struct *child, long request, long addr, long data) +int ptrace_getregs(struct task_struct *child, void __user *uregs) { - int ret = -EPERM; + struct pt_regs *regs = task_pt_regs(child); + xtensa_gregset_t __user *gregset = uregs; + unsigned long wm = regs->wmask; + unsigned long wb = regs->windowbase; + int live, i; + + if (!access_ok(VERIFY_WRITE, uregs, sizeof(xtensa_gregset_t))) + return -EIO; + + __put_user(regs->pc, &gregset->pc); + __put_user(regs->ps & ~(1 << PS_EXCM_BIT), &gregset->ps); + __put_user(regs->lbeg, &gregset->lbeg); + __put_user(regs->lend, &gregset->lend); + __put_user(regs->lcount, &gregset->lcount); + __put_user(regs->windowstart, &gregset->windowstart); + __put_user(regs->windowbase, &gregset->windowbase); + + live = (wm & 2) ? 4 : (wm & 4) ? 8 : (wm & 8) ? 12 : 16; + + for (i = 0; i < live; i++) + __put_user(regs->areg[i],gregset->a+((wb*4+i)%XCHAL_NUM_AREGS)); + for (i = XCHAL_NUM_AREGS - (wm >> 4) * 4; i < XCHAL_NUM_AREGS; i++) + __put_user(regs->areg[i],gregset->a+((wb*4+i)%XCHAL_NUM_AREGS)); + + return 0; +} - switch (request) { - case PTRACE_PEEKTEXT: /* read word at location addr. */ - case PTRACE_PEEKDATA: - ret = generic_ptrace_peekdata(child, addr, data); - goto out; +int ptrace_setregs(struct task_struct *child, void __user *uregs) +{ + struct pt_regs *regs = task_pt_regs(child); + xtensa_gregset_t *gregset = uregs; + const unsigned long ps_mask = PS_CALLINC_MASK | PS_OWB_MASK; + unsigned long ps; + unsigned long wb; - /* Read the word at location addr in the USER area. */ + if (!access_ok(VERIFY_WRITE, uregs, sizeof(xtensa_gregset_t))) + return -EIO; - case PTRACE_PEEKUSR: - { - struct pt_regs *regs; - unsigned long tmp; + __get_user(regs->pc, &gregset->pc); + __get_user(ps, &gregset->ps); + __get_user(regs->lbeg, &gregset->lbeg); + __get_user(regs->lend, &gregset->lend); + __get_user(regs->lcount, &gregset->lcount); + __get_user(regs->windowstart, &gregset->windowstart); + __get_user(wb, &gregset->windowbase); + + regs->ps = (regs->ps & ~ps_mask) | (ps & ps_mask) | (1 << PS_EXCM_BIT); + + if (wb >= XCHAL_NUM_AREGS / 4) + return -EFAULT; + + regs->windowbase = wb; + + if (wb != 0 && __copy_from_user(regs->areg + XCHAL_NUM_AREGS - wb * 4, + gregset->a, wb * 16)) + return -EFAULT; + + if (__copy_from_user(regs->areg, gregset->a + wb*4, (WSBITS-wb) * 16)) + return -EFAULT; + + return 0; +} + + +int ptrace_getxregs(struct task_struct *child, void __user *uregs) +{ + struct pt_regs *regs = task_pt_regs(child); + struct thread_info *ti = task_thread_info(child); + elf_xtregs_t __user *xtregs = uregs; + int ret = 0; + + if (!access_ok(VERIFY_WRITE, uregs, sizeof(elf_xtregs_t))) + return -EIO; + +#if XTENSA_HAVE_COPROCESSORS + /* Flush all coprocessor registers to memory. */ + coprocessor_flush_all(ti); + ret |= __copy_to_user(&xtregs->cp0, &ti->xtregs_cp, + sizeof(xtregs_coprocessor_t)); +#endif + ret |= __copy_to_user(&xtregs->opt, ®s->xtregs_opt, + sizeof(xtregs->opt)); + ret |= __copy_to_user(&xtregs->user,&ti->xtregs_user, + sizeof(xtregs->user)); + + return ret ? -EFAULT : 0; +} + +int ptrace_setxregs(struct task_struct *child, void __user *uregs) +{ + struct thread_info *ti = task_thread_info(child); + struct pt_regs *regs = task_pt_regs(child); + elf_xtregs_t *xtregs = uregs; + int ret = 0; + +#if XTENSA_HAVE_COPROCESSORS + /* Flush all coprocessors before we overwrite them. */ + coprocessor_flush_all(ti); + coprocessor_release_all(ti); + + ret |= __copy_from_user(&ti->xtregs_cp, &xtregs->cp0, + sizeof(xtregs_coprocessor_t)); +#endif + ret |= __copy_from_user(®s->xtregs_opt, &xtregs->opt, + sizeof(xtregs->opt)); + ret |= __copy_from_user(&ti->xtregs_user, &xtregs->user, + sizeof(xtregs->user)); + + return ret ? -EFAULT : 0; +} + +int ptrace_peekusr(struct task_struct *child, long regno, long __user *ret) +{ + struct pt_regs *regs; + unsigned long tmp; - regs = task_pt_regs(child); - tmp = 0; /* Default return value. */ + regs = task_pt_regs(child); + tmp = 0; /* Default return value. */ - switch(addr) { + switch(regno) { case REG_AR_BASE ... REG_AR_BASE + XCHAL_NUM_AREGS - 1: - { - int ar = addr - REG_AR_BASE - regs->windowbase * 4; - ar &= (XCHAL_NUM_AREGS - 1); - if (ar < 16 && ar + (regs->wmask >> 4) * 4 >= 0) - tmp = regs->areg[ar]; - else - ret = -EIO; + tmp = regs->areg[regno - REG_AR_BASE]; break; - } + case REG_A_BASE ... REG_A_BASE + 15: - tmp = regs->areg[addr - REG_A_BASE]; + tmp = regs->areg[regno - REG_A_BASE]; break; + case REG_PC: tmp = regs->pc; break; + case REG_PS: /* Note: PS.EXCM is not set while user task is running; * its being set in regs is for exception handling * convenience. */ tmp = (regs->ps & ~(1 << PS_EXCM_BIT)); break; + case REG_WB: - tmp = regs->windowbase; - break; + break; /* tmp = 0 */ + case REG_WS: - tmp = regs->windowstart; + { + unsigned long wb = regs->windowbase; + unsigned long ws = regs->windowstart; + tmp = ((ws>>wb) | (ws<<(WSBITS-wb))) & ((1<lbeg; break; + case REG_LEND: tmp = regs->lend; break; + case REG_LCOUNT: tmp = regs->lcount; break; + case REG_SAR: tmp = regs->sar; break; - case REG_DEPC: - tmp = regs->depc; - break; - case REG_EXCCAUSE: - tmp = regs->exccause; - break; - case REG_EXCVADDR: - tmp = regs->excvaddr; - break; + case SYSCALL_NR: tmp = regs->syscall; break; - default: - tmp = 0; - ret = -EIO; - goto out; - } - ret = put_user(tmp, (unsigned long *) data); - goto out; - } - case PTRACE_POKETEXT: /* write the word at location addr. */ - case PTRACE_POKEDATA: - ret = generic_ptrace_pokedata(child, addr, data); - goto out; + default: + return -EIO; + } + return put_user(tmp, ret); +} - case PTRACE_POKEUSR: - { - struct pt_regs *regs; - regs = task_pt_regs(child); +int ptrace_pokeusr(struct task_struct *child, long regno, long val) +{ + struct pt_regs *regs; + regs = task_pt_regs(child); - switch (addr) { + switch (regno) { case REG_AR_BASE ... REG_AR_BASE + XCHAL_NUM_AREGS - 1: - { - int ar = addr - REG_AR_BASE - regs->windowbase * 4; - if (ar < 16 && ar + (regs->wmask >> 4) * 4 >= 0) - regs->areg[ar & (XCHAL_NUM_AREGS - 1)] = data; - else - ret = -EIO; + regs->areg[regno - REG_AR_BASE] = val; break; - } + case REG_A_BASE ... REG_A_BASE + 15: - regs->areg[addr - REG_A_BASE] = data; + regs->areg[regno - REG_A_BASE] = val; break; + case REG_PC: - regs->pc = data; + regs->pc = val; break; + case SYSCALL_NR: - regs->syscall = data; - break; -#ifdef TEST_KERNEL - case REG_WB: - regs->windowbase = data; - break; - case REG_WS: - regs->windowstart = data; + regs->syscall = val; break; -#endif default: - /* The rest are not allowed. */ - ret = -EIO; - break; - } + return -EIO; + } + return 0; +} + +long arch_ptrace(struct task_struct *child, long request, long addr, long data) +{ + int ret = -EPERM; + + switch (request) { + case PTRACE_PEEKTEXT: /* read word at location addr. */ + case PTRACE_PEEKDATA: + ret = generic_ptrace_peekdata(child, addr, data); + break; + + case PTRACE_PEEKUSR: /* read register specified by addr. */ + ret = ptrace_peekusr(child, addr, (void __user *) data); + break; + + case PTRACE_POKETEXT: /* write the word at location addr. */ + case PTRACE_POKEDATA: + ret = generic_ptrace_pokedata(child, addr, data); + break; + + case PTRACE_POKEUSR: /* write register specified by addr. */ + ret = ptrace_pokeusr(child, addr, data); break; - } /* continue and stop at next (return from) syscall */ + case PTRACE_SYSCALL: case PTRACE_CONT: /* restart after signal. */ { @@ -217,98 +314,26 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) break; case PTRACE_GETREGS: - { - /* 'data' points to user memory in which to write. - * Mainly due to the non-live register values, we - * reformat the register values into something more - * standard. For convenience, we use the handy - * elf_gregset_t format. */ - - xtensa_gregset_t format; - struct pt_regs *regs = task_pt_regs(child); - - do_copy_regs (&format, regs, child); - - /* Now, copy to user space nice and easy... */ - ret = 0; - if (copy_to_user((void *)data, &format, sizeof(elf_gregset_t))) - ret = -EFAULT; + ret = ptrace_getregs(child, (void __user *) data); break; - } case PTRACE_SETREGS: - { - /* 'data' points to user memory that contains the new - * values in the elf_gregset_t format. */ - - xtensa_gregset_t format; - struct pt_regs *regs = task_pt_regs(child); - - if (copy_from_user(&format,(void *)data,sizeof(elf_gregset_t))){ - ret = -EFAULT; - break; - } - - /* FIXME: Perhaps we want some sanity checks on - * these user-space values? See ARM version. Are - * debuggers a security concern? */ - - do_restore_regs (&format, regs, child); - - ret = 0; - break; - } - - case PTRACE_GETFPREGS: - { - /* 'data' points to user memory in which to write. - * For convenience, we use the handy - * elf_fpregset_t format. */ - - elf_fpregset_t fpregs; - struct pt_regs *regs = task_pt_regs(child); - - do_save_fpregs (&fpregs, regs, child); - - /* Now, copy to user space nice and easy... */ - ret = 0; - if (copy_to_user((void *)data, &fpregs, sizeof(elf_fpregset_t))) - ret = -EFAULT; - + ret = ptrace_setregs(child, (void __user *) data); break; - } - - case PTRACE_SETFPREGS: - { - /* 'data' points to user memory that contains the new - * values in the elf_fpregset_t format. - */ - elf_fpregset_t fpregs; - struct pt_regs *regs = task_pt_regs(child); - ret = 0; - if (copy_from_user(&fpregs, (void *)data, sizeof(elf_fpregset_t))) { - ret = -EFAULT; - break; - } - - if (do_restore_fpregs (&fpregs, regs, child)) - ret = -EIO; + case PTRACE_GETXTREGS: + ret = ptrace_getxregs(child, (void __user *) data); break; - } - case PTRACE_GETFPREGSIZE: - /* 'data' points to 'unsigned long' set to the size - * of elf_fpregset_t - */ - ret = put_user(sizeof(elf_fpregset_t), (unsigned long *) data); + case PTRACE_SETXTREGS: + ret = ptrace_setxregs(child, (void __user *) data); break; default: ret = ptrace_request(child, request, addr, data); - goto out; + break; } - out: + return ret; } diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c index b80f2cb..5e6d75c 100644 --- a/arch/xtensa/kernel/setup.c +++ b/arch/xtensa/kernel/setup.c @@ -60,11 +60,6 @@ struct ide_ops *ide_ops; extern struct rtc_ops no_rtc_ops; struct rtc_ops *rtc_ops; -#ifdef CONFIG_PC_KEYB -extern struct kbd_ops no_kbd_ops; -struct kbd_ops *kbd_ops; -#endif - #ifdef CONFIG_BLK_DEV_INITRD extern void *initrd_start; extern void *initrd_end; diff --git a/arch/xtensa/kernel/signal.c b/arch/xtensa/kernel/signal.c index 033aae0..f2220b5 100644 --- a/arch/xtensa/kernel/signal.c +++ b/arch/xtensa/kernel/signal.c @@ -35,13 +35,17 @@ asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset); extern struct task_struct *coproc_owners[]; -extern void release_all_cp (struct task_struct *); - struct rt_sigframe { struct siginfo info; struct ucontext uc; - cp_state_t cpstate; + struct { + xtregs_opt_t opt; + xtregs_user_t user; +#if XTENSA_HAVE_COPROCESSORS + xtregs_coprocessor_t cp; +#endif + } xtregs; unsigned char retcode[6]; unsigned int window[4]; }; @@ -49,8 +53,6 @@ struct rt_sigframe /* * Flush register windows stored in pt_regs to stack. * Returns 1 for errors. - * - * Note that windowbase, windowstart, and wmask are not updated! */ int @@ -116,6 +118,9 @@ flush_window_regs_user(struct pt_regs *regs) base += inc; } + regs->wmask = 1; + regs->windowstart = 1 << wb; + return 0; errout: @@ -131,9 +136,10 @@ errout: */ static int -setup_sigcontext(struct sigcontext __user *sc, cp_state_t *cpstate, - struct pt_regs *regs, unsigned long mask) +setup_sigcontext(struct rt_sigframe __user *frame, struct pt_regs *regs) { + struct sigcontext __user *sc = &frame->uc.uc_mcontext; + struct thread_info *ti = current_thread_info(); int err = 0; #define COPY(x) err |= __put_user(regs->x, &sc->sc_##x) @@ -147,23 +153,32 @@ setup_sigcontext(struct sigcontext __user *sc, cp_state_t *cpstate, err |= flush_window_regs_user(regs); err |= __copy_to_user (sc->sc_a, regs->areg, 16 * 4); + err |= __put_user(0, &sc->sc_xtregs); - // err |= __copy_to_user (sc->sc_a, regs->areg, XCHAL_NUM_AREGS * 4) + if (err) + return err; -#if XCHAL_HAVE_CP -# error Coprocessors unsupported - err |= save_cpextra(cpstate); - err |= __put_user(err ? NULL : cpstate, &sc->sc_cpstate); +#if XTENSA_HAVE_COPROCESSORS + coprocessor_flush_all(ti); + coprocessor_release_all(ti); + err |= __copy_to_user(&frame->xtregs.cp, &ti->xtregs_cp, + sizeof (frame->xtregs.cp)); #endif - /* non-iBCS2 extensions.. */ - err |= __put_user(mask, &sc->oldmask); + err |= __copy_to_user(&frame->xtregs.opt, ®s->xtregs_opt, + sizeof (xtregs_opt_t)); + err |= __copy_to_user(&frame->xtregs.user, &ti->xtregs_user, + sizeof (xtregs_user_t)); + + err |= __put_user(err ? NULL : &frame->xtregs, &sc->sc_xtregs); return err; } static int -restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) +restore_sigcontext(struct pt_regs *regs, struct rt_sigframe __user *frame) { + struct sigcontext __user *sc = &frame->uc.uc_mcontext; + struct thread_info *ti = current_thread_info(); unsigned int err = 0; unsigned long ps; @@ -181,6 +196,8 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) regs->windowbase = 0; regs->windowstart = 1; + regs->syscall = -1; /* disable syscall checks */ + /* For PS, restore only PS.CALLINC. * Assume that all other bits are either the same as for the signal * handler, or the user mode value doesn't matter (e.g. PS.OWB). @@ -196,8 +213,9 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) err |= __copy_from_user(regs->areg, sc->sc_a, 16 * 4); -#if XCHAL_HAVE_CP -# error Coprocessors unsupported + if (err) + return err; + /* The signal handler may have used coprocessors in which * case they are still enabled. We disable them to force a * reloading of the original task's CP state by the lazy @@ -205,20 +223,20 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) * Also, we essentially discard any coprocessor state that the * signal handler created. */ - if (!err) { - struct task_struct *tsk = current; - release_all_cp(tsk); - err |= __copy_from_user(tsk->thread.cpextra, sc->sc_cpstate, - XTENSA_CP_EXTRA_SIZE); - } +#if XTENSA_HAVE_COPROCESSORS + coprocessor_release_all(ti); + err |= __copy_from_user(&ti->xtregs_cp, &frame->xtregs.cp, + sizeof (frame->xtregs.cp)); #endif + err |= __copy_from_user(&ti->xtregs_user, &frame->xtregs.user, + sizeof (xtregs_user_t)); + err |= __copy_from_user(®s->xtregs_opt, &frame->xtregs.opt, + sizeof (xtregs_opt_t)); - regs->syscall = -1; /* disable syscall checks */ return err; } - /* * Do a signal return; undo the signal stack. */ @@ -247,7 +265,7 @@ asmlinkage long xtensa_rt_sigreturn(long a0, long a1, long a2, long a3, recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); - if (restore_sigcontext(regs, &frame->uc.uc_mcontext)) + if (restore_sigcontext(regs, frame)) goto badframe; ret = regs->areg[2]; @@ -360,18 +378,22 @@ static void setup_frame(int sig, struct k_sigaction *ka, siginfo_t *info, err |= __put_user(sas_ss_flags(regs->areg[1]), &frame->uc.uc_stack.ss_flags); err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); - err |= setup_sigcontext(&frame->uc.uc_mcontext, &frame->cpstate, - regs, set->sig[0]); + err |= setup_sigcontext(frame, regs); err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); - /* Create sys_rt_sigreturn syscall in stack frame */ + if (ka->sa.sa_flags & SA_RESTORER) { + ra = (unsigned long)ka->sa.sa_restorer; + } else { - err |= gen_return_code(frame->retcode); + /* Create sys_rt_sigreturn syscall in stack frame */ - if (err) { - goto give_sigsegv; + err |= gen_return_code(frame->retcode); + + if (err) { + goto give_sigsegv; + } + ra = (unsigned long) frame->retcode; } - /* * Create signal handler execution context. @@ -385,7 +407,6 @@ static void setup_frame(int sig, struct k_sigaction *ka, siginfo_t *info, /* Set up a stack frame for a call4 * Note: PS.CALLINC is set to one by start_thread */ - ra = (unsigned long) frame->retcode; regs->areg[4] = (((unsigned long) ra) & 0x3fffffff) | 0x40000000; regs->areg[6] = (unsigned long) signal; regs->areg[7] = (unsigned long) &frame->info; diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c index 397bcd6..c7a021d 100644 --- a/arch/xtensa/kernel/traps.c +++ b/arch/xtensa/kernel/traps.c @@ -118,28 +118,28 @@ static dispatch_init_table_t __initdata dispatch_init_table[] = { { EXCCAUSE_STORE_CACHE_ATTRIBUTE, 0, do_page_fault }, { EXCCAUSE_LOAD_CACHE_ATTRIBUTE, 0, do_page_fault }, /* XCCHAL_EXCCAUSE_FLOATING_POINT unhandled */ -#if (XCHAL_CP_MASK & 1) +#if XTENSA_HAVE_COPROCESSOR(0) COPROCESSOR(0), #endif -#if (XCHAL_CP_MASK & 2) +#if XTENSA_HAVE_COPROCESSOR(1) COPROCESSOR(1), #endif -#if (XCHAL_CP_MASK & 4) +#if XTENSA_HAVE_COPROCESSOR(2) COPROCESSOR(2), #endif -#if (XCHAL_CP_MASK & 8) +#if XTENSA_HAVE_COPROCESSOR(3) COPROCESSOR(3), #endif -#if (XCHAL_CP_MASK & 16) +#if XTENSA_HAVE_COPROCESSOR(4) COPROCESSOR(4), #endif -#if (XCHAL_CP_MASK & 32) +#if XTENSA_HAVE_COPROCESSOR(5) COPROCESSOR(5), #endif -#if (XCHAL_CP_MASK & 64) +#if XTENSA_HAVE_COPROCESSOR(6) COPROCESSOR(6), #endif -#if (XCHAL_CP_MASK & 128) +#if XTENSA_HAVE_COPROCESSOR(7) COPROCESSOR(7), #endif { EXCCAUSE_MAPPED_DEBUG, 0, do_debug }, @@ -349,9 +349,7 @@ void show_regs(struct pt_regs * regs) wmask = regs->wmask & ~1; - for (i = 0; i < 32; i++) { - if (wmask & (1 << (i / 4))) - break; + for (i = 0; i < 16; i++) { if ((i % 8) == 0) printk ("\n" KERN_INFO "a%02d: ", i); printk("%08lx ", regs->areg[i]); diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S index 7d0f55a..51f4fb6 100644 --- a/arch/xtensa/kernel/vmlinux.lds.S +++ b/arch/xtensa/kernel/vmlinux.lds.S @@ -136,7 +136,9 @@ SECTIONS __init_begin = .; .init.text : { _sinittext = .; - *(.init.literal) INIT_TEXT + *(.init.literal) *(.cpuinit.literal) + *(.devinit.literal) *(.meminit.literal) + INIT_TEXT _einittext = .; } @@ -161,6 +163,8 @@ SECTIONS .DoubleExceptionVector.literal); RELOCATE_ENTRY(_DoubleExceptionVector_text, .DoubleExceptionVector.text); + RELOCATE_ENTRY(_DebugInterruptVector_text, + .DebugInterruptVector.text); __boot_reloc_table_end = ABSOLUTE(.) ; } diff --git a/arch/xtensa/mm/cache.c b/arch/xtensa/mm/cache.c index 9a1fa94..3ba990c 100644 --- a/arch/xtensa/mm/cache.c +++ b/arch/xtensa/mm/cache.c @@ -25,7 +25,6 @@ #include #include -#include #include #include #include @@ -181,9 +180,9 @@ update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t pte) #else if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags) && (vma->vm_flags & VM_EXEC) != 0) { - unsigned long vaddr = addr & PAGE_MASK; - __flush_dcache_page(vaddr); - __invalidate_icache_page(vaddr); + unsigned long paddr = (unsigned long) page_address(page); + __flush_dcache_page(paddr); + __invalidate_icache_page(paddr); set_bit(PG_arch_1, &page->flags); } #endif diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c index b3086f3..81d0560 100644 --- a/arch/xtensa/mm/init.c +++ b/arch/xtensa/mm/init.c @@ -309,7 +309,7 @@ void show_mem(void) struct kmem_cache *pgtable_cache __read_mostly; -static void pgd_ctor(void *addr, struct kmem_cache *cache, unsigned long flags) +static void pgd_ctor(struct kmem_cache *cache, void* addr) { pte_t* ptep = (pte_t*)addr; int i; diff --git a/arch/xtensa/mm/misc.S b/arch/xtensa/mm/misc.S index e1f8803..c885664 100644 --- a/arch/xtensa/mm/misc.S +++ b/arch/xtensa/mm/misc.S @@ -295,7 +295,7 @@ ENTRY(__tlbtemp_mapping_itlb) ENTRY(__invalidate_icache_page_alias) entry sp, 16 - addi a6, a3, (PAGE_KERNEL | _PAGE_HW_WRITE) + addi a6, a3, (PAGE_KERNEL_EXEC | _PAGE_HW_WRITE) mov a4, a2 witlb a6, a2 isync diff --git a/arch/xtensa/platform-iss/Makefile b/arch/xtensa/platform-iss/Makefile deleted file mode 100644 index af96e31..0000000 --- a/arch/xtensa/platform-iss/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# $Id: Makefile,v 1.1.1.1 2002/08/28 16:10:14 aroll Exp $ -# -# Makefile for the Xtensa Instruction Set Simulator (ISS) -# "prom monitor" library routines under Linux. -# - -obj-y = io.o console.o setup.o network.o - diff --git a/arch/xtensa/platform-iss/console.c b/arch/xtensa/platform-iss/console.c deleted file mode 100644 index 854677d..0000000 --- a/arch/xtensa/platform-iss/console.c +++ /dev/null @@ -1,296 +0,0 @@ -/* - * arch/xtensa/platform-iss/console.c - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001-2005 Tensilica Inc. - * Authors Christian Zankel, Joe Taylor - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include - -#ifdef SERIAL_INLINE -#define _INLINE_ inline -#endif - -#define SERIAL_MAX_NUM_LINES 1 -#define SERIAL_TIMER_VALUE (20 * HZ) - -static struct tty_driver *serial_driver; -static struct timer_list serial_timer; - -static DEFINE_SPINLOCK(timer_lock); - -int errno; - -static int __simc (int a, int b, int c, int d, int e, int f) -{ - int ret; - __asm__ __volatile__ ("simcall\n" - "mov %0, a2\n" - "mov %1, a3\n" : "=a" (ret), "=a" (errno) - : : "a2", "a3"); - return ret; -} - -static char *serial_version = "0.1"; -static char *serial_name = "ISS serial driver"; - -/* - * This routine is called whenever a serial port is opened. It - * enables interrupts for a serial port, linking in its async structure into - * the IRQ chain. It also performs the serial-specific - * initialization for the tty structure. - */ - -static void rs_poll(unsigned long); - -static int rs_open(struct tty_struct *tty, struct file * filp) -{ - int line = tty->index; - - if ((line < 0) || (line >= SERIAL_MAX_NUM_LINES)) - return -ENODEV; - - spin_lock(&timer_lock); - - if (tty->count == 1) { - init_timer(&serial_timer); - serial_timer.data = (unsigned long) tty; - serial_timer.function = rs_poll; - mod_timer(&serial_timer, jiffies + SERIAL_TIMER_VALUE); - } - spin_unlock(&timer_lock); - - return 0; -} - - -/* - * ------------------------------------------------------------ - * iss_serial_close() - * - * This routine is called when the serial port gets closed. First, we - * wait for the last remaining data to be sent. Then, we unlink its - * async structure from the interrupt chain if necessary, and we free - * that IRQ if nothing is left in the chain. - * ------------------------------------------------------------ - */ -static void rs_close(struct tty_struct *tty, struct file * filp) -{ - spin_lock(&timer_lock); - if (tty->count == 1) - del_timer_sync(&serial_timer); - spin_unlock(&timer_lock); -} - - -static int rs_write(struct tty_struct * tty, - const unsigned char *buf, int count) -{ - /* see drivers/char/serialX.c to reference original version */ - - __simc (SYS_write, 1, (unsigned long)buf, count, 0, 0); - return count; -} - -static void rs_poll(unsigned long priv) -{ - struct tty_struct* tty = (struct tty_struct*) priv; - - struct timeval tv = { .tv_sec = 0, .tv_usec = 0 }; - int i = 0; - unsigned char c; - - spin_lock(&timer_lock); - - while (__simc(SYS_select_one, 0, XTISS_SELECT_ONE_READ, (int)&tv,0,0)){ - __simc (SYS_read, 0, (unsigned long)&c, 1, 0, 0); - tty_insert_flip_char(tty, c, TTY_NORMAL); - i++; - } - - if (i) - tty_flip_buffer_push(tty); - - - mod_timer(&serial_timer, jiffies + SERIAL_TIMER_VALUE); - spin_unlock(&timer_lock); -} - - -static void rs_put_char(struct tty_struct *tty, unsigned char ch) -{ - char buf[2]; - - if (!tty) - return; - - buf[0] = ch; - buf[1] = '\0'; /* Is this NULL necessary? */ - __simc (SYS_write, 1, (unsigned long) buf, 1, 0, 0); -} - -static void rs_flush_chars(struct tty_struct *tty) -{ -} - -static int rs_write_room(struct tty_struct *tty) -{ - /* Let's say iss can always accept 2K characters.. */ - return 2 * 1024; -} - -static int rs_chars_in_buffer(struct tty_struct *tty) -{ - /* the iss doesn't buffer characters */ - return 0; -} - -static void rs_hangup(struct tty_struct *tty) -{ - /* Stub, once again.. */ -} - -static void rs_wait_until_sent(struct tty_struct *tty, int timeout) -{ - /* Stub, once again.. */ -} - -static int rs_read_proc(char *page, char **start, off_t off, int count, - int *eof, void *data) -{ - int len = 0; - off_t begin = 0; - - len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version); - *eof = 1; - - if (off >= len + begin) - return 0; - - *start = page + (off - begin); - return ((count < begin + len - off) ? count : begin + len - off); -} - - -static struct tty_operations serial_ops = { - .open = rs_open, - .close = rs_close, - .write = rs_write, - .put_char = rs_put_char, - .flush_chars = rs_flush_chars, - .write_room = rs_write_room, - .chars_in_buffer = rs_chars_in_buffer, - .hangup = rs_hangup, - .wait_until_sent = rs_wait_until_sent, - .read_proc = rs_read_proc -}; - -int __init rs_init(void) -{ - serial_driver = alloc_tty_driver(1); - - printk ("%s %s\n", serial_name, serial_version); - - /* Initialize the tty_driver structure */ - - serial_driver->owner = THIS_MODULE; - serial_driver->driver_name = "iss_serial"; - serial_driver->name = "ttyS"; - serial_driver->major = TTY_MAJOR; - serial_driver->minor_start = 64; - serial_driver->type = TTY_DRIVER_TYPE_SERIAL; - serial_driver->subtype = SERIAL_TYPE_NORMAL; - serial_driver->init_termios = tty_std_termios; - serial_driver->init_termios.c_cflag = - B9600 | CS8 | CREAD | HUPCL | CLOCAL; - serial_driver->flags = TTY_DRIVER_REAL_RAW; - - tty_set_operations(serial_driver, &serial_ops); - - if (tty_register_driver(serial_driver)) - panic("Couldn't register serial driver\n"); - return 0; -} - - -static __exit void rs_exit(void) -{ - int error; - - if ((error = tty_unregister_driver(serial_driver))) - printk("ISS_SERIAL: failed to unregister serial driver (%d)\n", - error); - put_tty_driver(serial_driver); -} - - -/* We use `late_initcall' instead of just `__initcall' as a workaround for - * the fact that (1) simcons_tty_init can't be called before tty_init, - * (2) tty_init is called via `module_init', (3) if statically linked, - * module_init == device_init, and (4) there's no ordering of init lists. - * We can do this easily because simcons is always statically linked, but - * other tty drivers that depend on tty_init and which must use - * `module_init' to declare their init routines are likely to be broken. - */ - -late_initcall(rs_init); - - -#ifdef CONFIG_SERIAL_CONSOLE - -static void iss_console_write(struct console *co, const char *s, unsigned count) -{ - int len = strlen(s); - - if (s != 0 && *s != 0) - __simc (SYS_write, 1, (unsigned long)s, - count < len ? count : len,0,0); -} - -static struct tty_driver* iss_console_device(struct console *c, int *index) -{ - *index = c->index; - return serial_driver; -} - - -static struct console sercons = { - .name = "ttyS", - .write = iss_console_write, - .device = iss_console_device, - .flags = CON_PRINTBUFFER, - .index = -1 -}; - -static int __init iss_console_init(void) -{ - register_console(&sercons); - return 0; -} - -console_initcall(iss_console_init); - -#endif /* CONFIG_SERIAL_CONSOLE */ - diff --git a/arch/xtensa/platform-iss/io.c b/arch/xtensa/platform-iss/io.c deleted file mode 100644 index 5b161a5..0000000 --- a/arch/xtensa/platform-iss/io.c +++ /dev/null @@ -1,32 +0,0 @@ -/* This file isn't really needed right now. */ - -#if 0 - -#include -#include - -extern int __simc (); - - -char iss_serial_getc() -{ - char c; - __simc( SYS_read, 0, &c, 1 ); - return c; -} - -void iss_serial_putc( char c ) -{ - __simc( SYS_write, 1, &c, 1 ); -} - -void iss_serial_puts( char *s ) -{ - if( s != 0 && *s != 0 ) - __simc( SYS_write, 1, s, strlen(s) ); -} - -/*#error Need I/O ports to specific hardware!*/ - -#endif - diff --git a/arch/xtensa/platform-iss/network.c b/arch/xtensa/platform-iss/network.c deleted file mode 100644 index f21b9b0..0000000 --- a/arch/xtensa/platform-iss/network.c +++ /dev/null @@ -1,823 +0,0 @@ -/* - * - * arch/xtensa/platform-iss/network.c - * - * Platform specific initialization. - * - * Authors: Chris Zankel - * Based on work form the UML team. - * - * Copyright 2005 Tensilica Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#define DRIVER_NAME "iss-netdev" -#define ETH_MAX_PACKET 1500 -#define ETH_HEADER_OTHER 14 -#define ISS_NET_TIMER_VALUE (2 * HZ) - - -static DEFINE_SPINLOCK(opened_lock); -static LIST_HEAD(opened); - -static DEFINE_SPINLOCK(devices_lock); -static LIST_HEAD(devices); - -/* ------------------------------------------------------------------------- */ - -/* We currently only support the TUNTAP transport protocol. */ - -#define TRANSPORT_TUNTAP_NAME "tuntap" -#define TRANSPORT_TUNTAP_MTU ETH_MAX_PACKET - -struct tuntap_info { - char dev_name[IFNAMSIZ]; - int fixed_config; - unsigned char gw[ETH_ALEN]; - int fd; -}; - -/* ------------------------------------------------------------------------- */ - - -/* This structure contains out private information for the driver. */ - -struct iss_net_private { - - struct list_head device_list; - struct list_head opened_list; - - spinlock_t lock; - struct net_device *dev; - struct platform_device pdev; - struct timer_list tl; - struct net_device_stats stats; - - struct timer_list timer; - unsigned int timer_val; - - int index; - int mtu; - - unsigned char mac[ETH_ALEN]; - int have_mac; - - struct { - union { - struct tuntap_info tuntap; - } info; - - int (*open)(struct iss_net_private *lp); - void (*close)(struct iss_net_private *lp); - int (*read)(struct iss_net_private *lp, struct sk_buff **skb); - int (*write)(struct iss_net_private *lp, struct sk_buff **skb); - unsigned short (*protocol)(struct sk_buff *skb); - int (*poll)(struct iss_net_private *lp); - } tp; - -}; - -/* ======================= ISS SIMCALL INTERFACE =========================== */ - -/* Note: __simc must _not_ be declared inline! */ - -static int errno; - -static int __simc (int a, int b, int c, int d, int e, int f) -{ - int ret; - __asm__ __volatile__ ("simcall\n" - "mov %0, a2\n" - "mov %1, a3\n" : "=a" (ret), "=a" (errno) - : : "a2", "a3"); - return ret; -} - -static int inline simc_open(char *file, int flags, int mode) -{ - return __simc(SYS_open, (int) file, flags, mode, 0, 0); -} - -static int inline simc_close(int fd) -{ - return __simc(SYS_close, fd, 0, 0, 0, 0); -} - -static int inline simc_ioctl(int fd, int request, void *arg) -{ - return __simc(SYS_ioctl, fd, request, (int) arg, 0, 0); -} - -static int inline simc_read(int fd, void *buf, size_t count) -{ - return __simc(SYS_read, fd, (int) buf, count, 0, 0); -} - -static int inline simc_write(int fd, void *buf, size_t count) -{ - return __simc(SYS_write, fd, (int) buf, count, 0, 0); -} - -static int inline simc_poll(int fd) -{ - struct timeval tv = { .tv_sec = 0, .tv_usec = 0 }; - - return __simc(SYS_select_one, fd, XTISS_SELECT_ONE_READ, (int)&tv,0,0); -} - -/* ================================ HELPERS ================================ */ - - -static char *split_if_spec(char *str, ...) -{ - char **arg, *end; - va_list ap; - - va_start(ap, str); - while ((arg = va_arg(ap, char**)) != NULL) { - if (*str == '\0') - return NULL; - end = strchr(str, ','); - if (end != str) - *arg = str; - if (end == NULL) - return NULL; - *end ++ = '\0'; - str = end; - } - va_end(ap); - return str; -} - - -#if 0 -/* Adjust SKB. */ - -struct sk_buff *ether_adjust_skb(struct sk_buff *skb, int extra) -{ - if ((skb != NULL) && (skb_tailroom(skb) < extra)) { - struct sk_buff *skb2; - - skb2 = skb_copy_expand(skb, 0, extra, GFP_ATOMIC); - dev_kfree_skb(skb); - skb = skb2; - } - if (skb != NULL) - skb_put(skb, extra); - - return skb; -} -#endif - -/* Return the IP address as a string for a given device. */ - -static void dev_ip_addr(void *d, char *buf, char *bin_buf) -{ - struct net_device *dev = d; - struct in_device *ip = dev->ip_ptr; - struct in_ifaddr *in; - __be32 addr; - - if ((ip == NULL) || ((in = ip->ifa_list) == NULL)) { - printk(KERN_WARNING "Device not assigned an IP address!\n"); - return; - } - - addr = in->ifa_address; - sprintf(buf, "%d.%d.%d.%d", addr & 0xff, (addr >> 8) & 0xff, - (addr >> 16) & 0xff, addr >> 24); - - if (bin_buf) { - bin_buf[0] = addr & 0xff; - bin_buf[1] = (addr >> 8) & 0xff; - bin_buf[2] = (addr >> 16) & 0xff; - bin_buf[3] = addr >> 24; - } -} - -/* Set Ethernet address of the specified device. */ - -static void inline set_ether_mac(void *d, unsigned char *addr) -{ - struct net_device *dev = d; - memcpy(dev->dev_addr, addr, ETH_ALEN); -} - - -/* ======================= TUNTAP TRANSPORT INTERFACE ====================== */ - -static int tuntap_open(struct iss_net_private *lp) -{ - struct ifreq ifr; - char *dev_name = lp->tp.info.tuntap.dev_name; - int err = -EINVAL; - int fd; - - /* We currently only support a fixed configuration. */ - - if (!lp->tp.info.tuntap.fixed_config) - return -EINVAL; - - if ((fd = simc_open("/dev/net/tun", 02, 0)) < 0) { /* O_RDWR */ - printk("Failed to open /dev/net/tun, returned %d " - "(errno = %d)\n", fd, errno); - return fd; - } - - memset(&ifr, 0, sizeof ifr); - ifr.ifr_flags = IFF_TAP | IFF_NO_PI; - strlcpy(ifr.ifr_name, dev_name, sizeof ifr.ifr_name); - - if ((err = simc_ioctl(fd, TUNSETIFF, (void*) &ifr)) < 0) { - printk("Failed to set interface, returned %d " - "(errno = %d)\n", err, errno); - simc_close(fd); - return err; - } - - lp->tp.info.tuntap.fd = fd; - return err; -} - -static void tuntap_close(struct iss_net_private *lp) -{ -#if 0 - if (lp->tp.info.tuntap.fixed_config) - iter_addresses(lp->tp.info.tuntap.dev, close_addr, lp->host.dev_name); -#endif - simc_close(lp->tp.info.tuntap.fd); - lp->tp.info.tuntap.fd = -1; -} - -static int tuntap_read (struct iss_net_private *lp, struct sk_buff **skb) -{ -#if 0 - *skb = ether_adjust_skb(*skb, ETH_HEADER_OTHER); - if (*skb == NULL) - return -ENOMEM; -#endif - - return simc_read(lp->tp.info.tuntap.fd, - (*skb)->data, (*skb)->dev->mtu + ETH_HEADER_OTHER); -} - -static int tuntap_write (struct iss_net_private *lp, struct sk_buff **skb) -{ - return simc_write(lp->tp.info.tuntap.fd, (*skb)->data, (*skb)->len); -} - -unsigned short tuntap_protocol(struct sk_buff *skb) -{ - return eth_type_trans(skb, skb->dev); -} - -static int tuntap_poll(struct iss_net_private *lp) -{ - return simc_poll(lp->tp.info.tuntap.fd); -} - -/* - * Currently only a device name is supported. - * ethX=tuntap[,[mac address][,[device name]]] - */ - -static int tuntap_probe(struct iss_net_private *lp, int index, char *init) -{ - const int len = strlen(TRANSPORT_TUNTAP_NAME); - char *dev_name = NULL, *mac_str = NULL, *rem = NULL; - - /* Transport should be 'tuntap': ethX=tuntap,mac,dev_name */ - - if (strncmp(init, TRANSPORT_TUNTAP_NAME, len)) - return 0; - - if (*(init += strlen(TRANSPORT_TUNTAP_NAME)) == ',') { - if ((rem=split_if_spec(init+1, &mac_str, &dev_name)) != NULL) { - printk("Extra garbage on specification : '%s'\n", rem); - return 0; - } - } else if (*init != '\0') { - printk("Invalid argument: %s. Skipping device!\n", init); - return 0; - } - - if (dev_name) { - strncpy(lp->tp.info.tuntap.dev_name, dev_name, - sizeof lp->tp.info.tuntap.dev_name); - lp->tp.info.tuntap.fixed_config = 1; - } else - strcpy(lp->tp.info.tuntap.dev_name, TRANSPORT_TUNTAP_NAME); - - -#if 0 - if (setup_etheraddr(mac_str, lp->mac)) - lp->have_mac = 1; -#endif - lp->mtu = TRANSPORT_TUNTAP_MTU; - - //lp->info.tuntap.gate_addr = gate_addr; - - lp->tp.info.tuntap.fd = -1; - - lp->tp.open = tuntap_open; - lp->tp.close = tuntap_close; - lp->tp.read = tuntap_read; - lp->tp.write = tuntap_write; - lp->tp.protocol = tuntap_protocol; - lp->tp.poll = tuntap_poll; - - printk("TUN/TAP backend - "); -#if 0 - if (lp->host.gate_addr != NULL) - printk("IP = %s", lp->host.gate_addr); -#endif - printk("\n"); - - return 1; -} - -/* ================================ ISS NET ================================ */ - -static int iss_net_rx(struct net_device *dev) -{ - struct iss_net_private *lp = dev->priv; - int pkt_len; - struct sk_buff *skb; - - /* Check if there is any new data. */ - - if (lp->tp.poll(lp) == 0) - return 0; - - /* Try to allocate memory, if it fails, try again next round. */ - - if ((skb = dev_alloc_skb(dev->mtu + 2 + ETH_HEADER_OTHER)) == NULL) { - lp->stats.rx_dropped++; - return 0; - } - - skb_reserve(skb, 2); - - /* Setup skb */ - - skb->dev = dev; - skb_reset_mac_header(skb); - pkt_len = lp->tp.read(lp, &skb); - skb_put(skb, pkt_len); - - if (pkt_len > 0) { - skb_trim(skb, pkt_len); - skb->protocol = lp->tp.protocol(skb); - - lp->stats.rx_bytes += skb->len; - lp->stats.rx_packets++; - // netif_rx(skb); - netif_rx_ni(skb); - return pkt_len; - } - kfree_skb(skb); - return pkt_len; -} - -static int iss_net_poll(void) -{ - struct list_head *ele; - int err, ret = 0; - - spin_lock(&opened_lock); - - list_for_each(ele, &opened) { - struct iss_net_private *lp; - - lp = list_entry(ele, struct iss_net_private, opened_list); - - if (!netif_running(lp->dev)) - break; - - spin_lock(&lp->lock); - - while ((err = iss_net_rx(lp->dev)) > 0) - ret++; - - spin_unlock(&lp->lock); - - if (err < 0) { - printk(KERN_ERR "Device '%s' read returned %d, " - "shutting it down\n", lp->dev->name, err); - dev_close(lp->dev); - } else { - // FIXME reactivate_fd(lp->fd, ISS_ETH_IRQ); - } - } - - spin_unlock(&opened_lock); - return ret; -} - - -static void iss_net_timer(unsigned long priv) -{ - struct iss_net_private* lp = (struct iss_net_private*) priv; - - spin_lock(&lp->lock); - - iss_net_poll(); - - mod_timer(&lp->timer, jiffies + lp->timer_val); - - spin_unlock(&lp->lock); -} - - -static int iss_net_open(struct net_device *dev) -{ - struct iss_net_private *lp = dev->priv; - char addr[sizeof "255.255.255.255\0"]; - int err; - - spin_lock(&lp->lock); - - if ((err = lp->tp.open(lp)) < 0) - goto out; - - if (!lp->have_mac) { - dev_ip_addr(dev, addr, &lp->mac[2]); - set_ether_mac(dev, lp->mac); - } - - netif_start_queue(dev); - - /* clear buffer - it can happen that the host side of the interface - * is full when we get here. In this case, new data is never queued, - * SIGIOs never arrive, and the net never works. - */ - while ((err = iss_net_rx(dev)) > 0) - ; - - spin_lock(&opened_lock); - list_add(&lp->opened_list, &opened); - spin_unlock(&opened_lock); - - init_timer(&lp->timer); - lp->timer_val = ISS_NET_TIMER_VALUE; - lp->timer.data = (unsigned long) lp; - lp->timer.function = iss_net_timer; - mod_timer(&lp->timer, jiffies + lp->timer_val); - -out: - spin_unlock(&lp->lock); - return err; -} - -static int iss_net_close(struct net_device *dev) -{ - struct iss_net_private *lp = dev->priv; -printk("iss_net_close!\n"); - netif_stop_queue(dev); - spin_lock(&lp->lock); - - spin_lock(&opened_lock); - list_del(&opened); - spin_unlock(&opened_lock); - - del_timer_sync(&lp->timer); - - lp->tp.close(lp); - - spin_unlock(&lp->lock); - return 0; -} - -static int iss_net_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct iss_net_private *lp = dev->priv; - unsigned long flags; - int len; - - netif_stop_queue(dev); - spin_lock_irqsave(&lp->lock, flags); - - len = lp->tp.write(lp, &skb); - - if (len == skb->len) { - lp->stats.tx_packets++; - lp->stats.tx_bytes += skb->len; - dev->trans_start = jiffies; - netif_start_queue(dev); - - /* this is normally done in the interrupt when tx finishes */ - netif_wake_queue(dev); - - } else if (len == 0) { - netif_start_queue(dev); - lp->stats.tx_dropped++; - - } else { - netif_start_queue(dev); - printk(KERN_ERR "iss_net_start_xmit: failed(%d)\n", len); - } - - spin_unlock_irqrestore(&lp->lock, flags); - - dev_kfree_skb(skb); - return 0; -} - - -static struct net_device_stats *iss_net_get_stats(struct net_device *dev) -{ - struct iss_net_private *lp = dev->priv; - return &lp->stats; -} - -static void iss_net_set_multicast_list(struct net_device *dev) -{ -#if 0 - if (dev->flags & IFF_PROMISC) - return; - else if (dev->mc_count) - dev->flags |= IFF_ALLMULTI; - else - dev->flags &= ~IFF_ALLMULTI; -#endif -} - -static void iss_net_tx_timeout(struct net_device *dev) -{ -#if 0 - dev->trans_start = jiffies; - netif_wake_queue(dev); -#endif -} - -static int iss_net_set_mac(struct net_device *dev, void *addr) -{ -#if 0 - struct iss_net_private *lp = dev->priv; - struct sockaddr *hwaddr = addr; - - spin_lock(&lp->lock); - memcpy(dev->dev_addr, hwaddr->sa_data, ETH_ALEN); - spin_unlock(&lp->lock); -#endif - - return 0; -} - -static int iss_net_change_mtu(struct net_device *dev, int new_mtu) -{ -#if 0 - struct iss_net_private *lp = dev->priv; - int err = 0; - - spin_lock(&lp->lock); - - // FIXME not needed new_mtu = transport_set_mtu(new_mtu, &lp->user); - - if (new_mtu < 0) - err = new_mtu; - else - dev->mtu = new_mtu; - - spin_unlock(&lp->lock); - return err; -#endif - return -EINVAL; -} - -void iss_net_user_timer_expire(unsigned long _conn) -{ -} - - -static struct platform_driver iss_net_driver = { - .driver = { - .name = DRIVER_NAME, - }, -}; - -static int driver_registered; - -static int iss_net_configure(int index, char *init) -{ - struct net_device *dev; - struct iss_net_private *lp; - int err; - - if ((dev = alloc_etherdev(sizeof *lp)) == NULL) { - printk(KERN_ERR "eth_configure: failed to allocate device\n"); - return 1; - } - - /* Initialize private element. */ - - lp = dev->priv; - *lp = ((struct iss_net_private) { - .device_list = LIST_HEAD_INIT(lp->device_list), - .opened_list = LIST_HEAD_INIT(lp->opened_list), - .lock = SPIN_LOCK_UNLOCKED, - .dev = dev, - .index = index, - //.fd = -1, - .mac = { 0xfe, 0xfd, 0x0, 0x0, 0x0, 0x0 }, - .have_mac = 0, - }); - - /* - * Try all transport protocols. - * Note: more protocols can be added by adding '&& !X_init(lp, eth)'. - */ - - if (!tuntap_probe(lp, index, init)) { - printk("Invalid arguments. Skipping device!\n"); - goto errout; - } - - printk(KERN_INFO "Netdevice %d ", index); - if (lp->have_mac) - printk("(%02x:%02x:%02x:%02x:%02x:%02x) ", - lp->mac[0], lp->mac[1], - lp->mac[2], lp->mac[3], - lp->mac[4], lp->mac[5]); - printk(": "); - - /* sysfs register */ - - if (!driver_registered) { - platform_driver_register(&iss_net_driver); - driver_registered = 1; - } - - spin_lock(&devices_lock); - list_add(&lp->device_list, &devices); - spin_unlock(&devices_lock); - - lp->pdev.id = index; - lp->pdev.name = DRIVER_NAME; - platform_device_register(&lp->pdev); - SET_NETDEV_DEV(dev,&lp->pdev.dev); - - /* - * If this name ends up conflicting with an existing registered - * netdevice, that is OK, register_netdev{,ice}() will notice this - * and fail. - */ - snprintf(dev->name, sizeof dev->name, "eth%d", index); - - dev->mtu = lp->mtu; - dev->open = iss_net_open; - dev->hard_start_xmit = iss_net_start_xmit; - dev->stop = iss_net_close; - dev->get_stats = iss_net_get_stats; - dev->set_multicast_list = iss_net_set_multicast_list; - dev->tx_timeout = iss_net_tx_timeout; - dev->set_mac_address = iss_net_set_mac; - dev->change_mtu = iss_net_change_mtu; - dev->watchdog_timeo = (HZ >> 1); - dev->irq = -1; - - rtnl_lock(); - err = register_netdevice(dev); - rtnl_unlock(); - - if (err) { - printk("Error registering net device!\n"); - /* XXX: should we call ->remove() here? */ - free_netdev(dev); - return 1; - } - - init_timer(&lp->tl); - lp->tl.function = iss_net_user_timer_expire; - -#if 0 - if (lp->have_mac) - set_ether_mac(dev, lp->mac); -#endif - return 0; - -errout: - // FIXME: unregister; free, etc.. - return -EIO; - -} - -/* ------------------------------------------------------------------------- */ - -/* Filled in during early boot */ - -struct list_head eth_cmd_line = LIST_HEAD_INIT(eth_cmd_line); - -struct iss_net_init { - struct list_head list; - char *init; /* init string */ - int index; -}; - -/* - * Parse the command line and look for 'ethX=...' fields, and register all - * those fields. They will be later initialized in iss_net_init. - */ - -#define ERR KERN_ERR "iss_net_setup: " - -static int iss_net_setup(char *str) -{ - struct iss_net_private *device = NULL; - struct iss_net_init *new; - struct list_head *ele; - char *end; - int n; - - n = simple_strtoul(str, &end, 0); - if (end == str) { - printk(ERR "Failed to parse '%s'\n", str); - return 1; - } - if (n < 0) { - printk(ERR "Device %d is negative\n", n); - return 1; - } - if (*(str = end) != '=') { - printk(ERR "Expected '=' after device number\n"); - return 1; - } - - spin_lock(&devices_lock); - - list_for_each(ele, &devices) { - device = list_entry(ele, struct iss_net_private, device_list); - if (device->index == n) - break; - } - - spin_unlock(&devices_lock); - - if (device && device->index == n) { - printk(ERR "Device %d already configured\n", n); - return 1; - } - - if ((new = alloc_bootmem(sizeof new)) == NULL) { - printk("Alloc_bootmem failed\n"); - return 1; - } - - INIT_LIST_HEAD(&new->list); - new->index = n; - new->init = str + 1; - - list_add_tail(&new->list, ð_cmd_line); - return 1; -} - -#undef ERR - -__setup("eth=", iss_net_setup); - -/* - * Initialize all ISS Ethernet devices previously registered in iss_net_setup. - */ - -static int iss_net_init(void) -{ - struct list_head *ele, *next; - - /* Walk through all Ethernet devices specified in the command line. */ - - list_for_each_safe(ele, next, ð_cmd_line) { - struct iss_net_init *eth; - eth = list_entry(ele, struct iss_net_init, list); - iss_net_configure(eth->index, eth->init); - } - - return 1; -} - -module_init(iss_net_init); - diff --git a/arch/xtensa/platform-iss/setup.c b/arch/xtensa/platform-iss/setup.c deleted file mode 100644 index f60c8cf..0000000 --- a/arch/xtensa/platform-iss/setup.c +++ /dev/null @@ -1,110 +0,0 @@ -/* - * - * arch/xtensa/platform-iss/setup.c - * - * Platform specific initialization. - * - * Authors: Chris Zankel - * Joe Taylor - * - * Copyright 2001 - 2005 Tensilica Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - - -void __init platform_init(bp_tag_t* bootparam) -{ - -} - -void platform_halt(void) -{ - printk (" ** Called platform_halt(), looping forever! **\n"); - while (1); -} - -void platform_power_off(void) -{ - printk (" ** Called platform_power_off(), looping forever! **\n"); - while (1); -} -void platform_restart(void) -{ - /* Flush and reset the mmu, simulate a processor reset, and - * jump to the reset vector. */ - - __asm__ __volatile__("movi a2, 15\n\t" - "wsr a2, " __stringify(ICOUNTLEVEL) "\n\t" - "movi a2, 0\n\t" - "wsr a2, " __stringify(ICOUNT) "\n\t" - "wsr a2, " __stringify(IBREAKENABLE) "\n\t" - "wsr a2, " __stringify(LCOUNT) "\n\t" - "movi a2, 0x1f\n\t" - "wsr a2, " __stringify(PS) "\n\t" - "isync\n\t" - "jx %0\n\t" - : - : "a" (XCHAL_RESET_VECTOR_VADDR) - : "a2"); - - /* control never gets here */ -} - -extern void iss_net_poll(void); - -const char twirl[]="|/-\\|/-\\"; - -void platform_heartbeat(void) -{ -#if 0 - static int i = 0, j = 0; - - if (--i < 0) { - i = 99; - printk("\r%c\r", twirl[j++]); - if (j == 8) - j = 0; - } -#endif -} - - - -static int -iss_panic_event(struct notifier_block *this, unsigned long event, void *ptr) -{ - __asm__ __volatile__("movi a2, -1; simcall\n"); - return NOTIFY_DONE; -} - -static struct notifier_block iss_panic_block = { - iss_panic_event, - NULL, - 0 -}; - -void __init platform_setup(char **p_cmdline) -{ - atomic_notifier_chain_register(&panic_notifier_list, &iss_panic_block); -} diff --git a/arch/xtensa/platforms/iss/Makefile b/arch/xtensa/platforms/iss/Makefile new file mode 100644 index 0000000..af96e31 --- /dev/null +++ b/arch/xtensa/platforms/iss/Makefile @@ -0,0 +1,8 @@ +# $Id: Makefile,v 1.1.1.1 2002/08/28 16:10:14 aroll Exp $ +# +# Makefile for the Xtensa Instruction Set Simulator (ISS) +# "prom monitor" library routines under Linux. +# + +obj-y = io.o console.o setup.o network.o + diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c new file mode 100644 index 0000000..9141e36 --- /dev/null +++ b/arch/xtensa/platforms/iss/console.c @@ -0,0 +1,297 @@ +/* + * arch/xtensa/platform-iss/console.c + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2001-2005 Tensilica Inc. + * Authors Christian Zankel, Joe Taylor + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include +#include + +#ifdef SERIAL_INLINE +#define _INLINE_ inline +#endif + +#define SERIAL_MAX_NUM_LINES 1 +#define SERIAL_TIMER_VALUE (20 * HZ) + +static struct tty_driver *serial_driver; +static struct timer_list serial_timer; + +static DEFINE_SPINLOCK(timer_lock); + +int errno; + +static int __simc (int a, int b, int c, int d, int e, int f) __attribute__((__noinline__)); +static int __simc (int a, int b, int c, int d, int e, int f) +{ + int ret; + __asm__ __volatile__ ("simcall\n" + "mov %0, a2\n" + "mov %1, a3\n" : "=a" (ret), "=a" (errno) + : : "a2", "a3"); + return ret; +} + +static char *serial_version = "0.1"; +static char *serial_name = "ISS serial driver"; + +/* + * This routine is called whenever a serial port is opened. It + * enables interrupts for a serial port, linking in its async structure into + * the IRQ chain. It also performs the serial-specific + * initialization for the tty structure. + */ + +static void rs_poll(unsigned long); + +static int rs_open(struct tty_struct *tty, struct file * filp) +{ + int line = tty->index; + + if ((line < 0) || (line >= SERIAL_MAX_NUM_LINES)) + return -ENODEV; + + spin_lock(&timer_lock); + + if (tty->count == 1) { + init_timer(&serial_timer); + serial_timer.data = (unsigned long) tty; + serial_timer.function = rs_poll; + mod_timer(&serial_timer, jiffies + SERIAL_TIMER_VALUE); + } + spin_unlock(&timer_lock); + + return 0; +} + + +/* + * ------------------------------------------------------------ + * iss_serial_close() + * + * This routine is called when the serial port gets closed. First, we + * wait for the last remaining data to be sent. Then, we unlink its + * async structure from the interrupt chain if necessary, and we free + * that IRQ if nothing is left in the chain. + * ------------------------------------------------------------ + */ +static void rs_close(struct tty_struct *tty, struct file * filp) +{ + spin_lock(&timer_lock); + if (tty->count == 1) + del_timer_sync(&serial_timer); + spin_unlock(&timer_lock); +} + + +static int rs_write(struct tty_struct * tty, + const unsigned char *buf, int count) +{ + /* see drivers/char/serialX.c to reference original version */ + + __simc (SYS_write, 1, (unsigned long)buf, count, 0, 0); + return count; +} + +static void rs_poll(unsigned long priv) +{ + struct tty_struct* tty = (struct tty_struct*) priv; + + struct timeval tv = { .tv_sec = 0, .tv_usec = 0 }; + int i = 0; + unsigned char c; + + spin_lock(&timer_lock); + + while (__simc(SYS_select_one, 0, XTISS_SELECT_ONE_READ, (int)&tv,0,0)){ + __simc (SYS_read, 0, (unsigned long)&c, 1, 0, 0); + tty_insert_flip_char(tty, c, TTY_NORMAL); + i++; + } + + if (i) + tty_flip_buffer_push(tty); + + + mod_timer(&serial_timer, jiffies + SERIAL_TIMER_VALUE); + spin_unlock(&timer_lock); +} + + +static void rs_put_char(struct tty_struct *tty, unsigned char ch) +{ + char buf[2]; + + if (!tty) + return; + + buf[0] = ch; + buf[1] = '\0'; /* Is this NULL necessary? */ + __simc (SYS_write, 1, (unsigned long) buf, 1, 0, 0); +} + +static void rs_flush_chars(struct tty_struct *tty) +{ +} + +static int rs_write_room(struct tty_struct *tty) +{ + /* Let's say iss can always accept 2K characters.. */ + return 2 * 1024; +} + +static int rs_chars_in_buffer(struct tty_struct *tty) +{ + /* the iss doesn't buffer characters */ + return 0; +} + +static void rs_hangup(struct tty_struct *tty) +{ + /* Stub, once again.. */ +} + +static void rs_wait_until_sent(struct tty_struct *tty, int timeout) +{ + /* Stub, once again.. */ +} + +static int rs_read_proc(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + int len = 0; + off_t begin = 0; + + len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version); + *eof = 1; + + if (off >= len + begin) + return 0; + + *start = page + (off - begin); + return ((count < begin + len - off) ? count : begin + len - off); +} + + +static struct tty_operations serial_ops = { + .open = rs_open, + .close = rs_close, + .write = rs_write, + .put_char = rs_put_char, + .flush_chars = rs_flush_chars, + .write_room = rs_write_room, + .chars_in_buffer = rs_chars_in_buffer, + .hangup = rs_hangup, + .wait_until_sent = rs_wait_until_sent, + .read_proc = rs_read_proc +}; + +int __init rs_init(void) +{ + serial_driver = alloc_tty_driver(1); + + printk ("%s %s\n", serial_name, serial_version); + + /* Initialize the tty_driver structure */ + + serial_driver->owner = THIS_MODULE; + serial_driver->driver_name = "iss_serial"; + serial_driver->name = "ttyS"; + serial_driver->major = TTY_MAJOR; + serial_driver->minor_start = 64; + serial_driver->type = TTY_DRIVER_TYPE_SERIAL; + serial_driver->subtype = SERIAL_TYPE_NORMAL; + serial_driver->init_termios = tty_std_termios; + serial_driver->init_termios.c_cflag = + B9600 | CS8 | CREAD | HUPCL | CLOCAL; + serial_driver->flags = TTY_DRIVER_REAL_RAW; + + tty_set_operations(serial_driver, &serial_ops); + + if (tty_register_driver(serial_driver)) + panic("Couldn't register serial driver\n"); + return 0; +} + + +static __exit void rs_exit(void) +{ + int error; + + if ((error = tty_unregister_driver(serial_driver))) + printk("ISS_SERIAL: failed to unregister serial driver (%d)\n", + error); + put_tty_driver(serial_driver); +} + + +/* We use `late_initcall' instead of just `__initcall' as a workaround for + * the fact that (1) simcons_tty_init can't be called before tty_init, + * (2) tty_init is called via `module_init', (3) if statically linked, + * module_init == device_init, and (4) there's no ordering of init lists. + * We can do this easily because simcons is always statically linked, but + * other tty drivers that depend on tty_init and which must use + * `module_init' to declare their init routines are likely to be broken. + */ + +late_initcall(rs_init); + + +#ifdef CONFIG_SERIAL_CONSOLE + +static void iss_console_write(struct console *co, const char *s, unsigned count) +{ + int len = strlen(s); + + if (s != 0 && *s != 0) + __simc (SYS_write, 1, (unsigned long)s, + count < len ? count : len,0,0); +} + +static struct tty_driver* iss_console_device(struct console *c, int *index) +{ + *index = c->index; + return serial_driver; +} + + +static struct console sercons = { + .name = "ttyS", + .write = iss_console_write, + .device = iss_console_device, + .flags = CON_PRINTBUFFER, + .index = -1 +}; + +static int __init iss_console_init(void) +{ + register_console(&sercons); + return 0; +} + +console_initcall(iss_console_init); + +#endif /* CONFIG_SERIAL_CONSOLE */ + diff --git a/arch/xtensa/platforms/iss/io.c b/arch/xtensa/platforms/iss/io.c new file mode 100644 index 0000000..5b161a5 --- /dev/null +++ b/arch/xtensa/platforms/iss/io.c @@ -0,0 +1,32 @@ +/* This file isn't really needed right now. */ + +#if 0 + +#include +#include + +extern int __simc (); + + +char iss_serial_getc() +{ + char c; + __simc( SYS_read, 0, &c, 1 ); + return c; +} + +void iss_serial_putc( char c ) +{ + __simc( SYS_write, 1, &c, 1 ); +} + +void iss_serial_puts( char *s ) +{ + if( s != 0 && *s != 0 ) + __simc( SYS_write, 1, s, strlen(s) ); +} + +/*#error Need I/O ports to specific hardware!*/ + +#endif + diff --git a/arch/xtensa/platforms/iss/network.c b/arch/xtensa/platforms/iss/network.c new file mode 100644 index 0000000..a2e2522 --- /dev/null +++ b/arch/xtensa/platforms/iss/network.c @@ -0,0 +1,823 @@ +/* + * + * arch/xtensa/platform-iss/network.c + * + * Platform specific initialization. + * + * Authors: Chris Zankel + * Based on work form the UML team. + * + * Copyright 2005 Tensilica Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define DRIVER_NAME "iss-netdev" +#define ETH_MAX_PACKET 1500 +#define ETH_HEADER_OTHER 14 +#define ISS_NET_TIMER_VALUE (2 * HZ) + + +static DEFINE_SPINLOCK(opened_lock); +static LIST_HEAD(opened); + +static DEFINE_SPINLOCK(devices_lock); +static LIST_HEAD(devices); + +/* ------------------------------------------------------------------------- */ + +/* We currently only support the TUNTAP transport protocol. */ + +#define TRANSPORT_TUNTAP_NAME "tuntap" +#define TRANSPORT_TUNTAP_MTU ETH_MAX_PACKET + +struct tuntap_info { + char dev_name[IFNAMSIZ]; + int fixed_config; + unsigned char gw[ETH_ALEN]; + int fd; +}; + +/* ------------------------------------------------------------------------- */ + + +/* This structure contains out private information for the driver. */ + +struct iss_net_private { + + struct list_head device_list; + struct list_head opened_list; + + spinlock_t lock; + struct net_device *dev; + struct platform_device pdev; + struct timer_list tl; + struct net_device_stats stats; + + struct timer_list timer; + unsigned int timer_val; + + int index; + int mtu; + + unsigned char mac[ETH_ALEN]; + int have_mac; + + struct { + union { + struct tuntap_info tuntap; + } info; + + int (*open)(struct iss_net_private *lp); + void (*close)(struct iss_net_private *lp); + int (*read)(struct iss_net_private *lp, struct sk_buff **skb); + int (*write)(struct iss_net_private *lp, struct sk_buff **skb); + unsigned short (*protocol)(struct sk_buff *skb); + int (*poll)(struct iss_net_private *lp); + } tp; + +}; + +/* ======================= ISS SIMCALL INTERFACE =========================== */ + +/* Note: __simc must _not_ be declared inline! */ + +static int errno; + +static int __simc (int a, int b, int c, int d, int e, int f) __attribute__((__noinline__)); +static int __simc (int a, int b, int c, int d, int e, int f) +{ + int ret; + __asm__ __volatile__ ("simcall\n" + "mov %0, a2\n" + "mov %1, a3\n" : "=a" (ret), "=a" (errno) + : : "a2", "a3"); + return ret; +} + +static int inline simc_open(char *file, int flags, int mode) +{ + return __simc(SYS_open, (int) file, flags, mode, 0, 0); +} + +static int inline simc_close(int fd) +{ + return __simc(SYS_close, fd, 0, 0, 0, 0); +} + +static int inline simc_ioctl(int fd, int request, void *arg) +{ + return __simc(SYS_ioctl, fd, request, (int) arg, 0, 0); +} + +static int inline simc_read(int fd, void *buf, size_t count) +{ + return __simc(SYS_read, fd, (int) buf, count, 0, 0); +} + +static int inline simc_write(int fd, void *buf, size_t count) +{ + return __simc(SYS_write, fd, (int) buf, count, 0, 0); +} + +static int inline simc_poll(int fd) +{ + struct timeval tv = { .tv_sec = 0, .tv_usec = 0 }; + + return __simc(SYS_select_one, fd, XTISS_SELECT_ONE_READ, (int)&tv,0,0); +} + +/* ================================ HELPERS ================================ */ + + +static char *split_if_spec(char *str, ...) +{ + char **arg, *end; + va_list ap; + + va_start(ap, str); + while ((arg = va_arg(ap, char**)) != NULL) { + if (*str == '\0') + return NULL; + end = strchr(str, ','); + if (end != str) + *arg = str; + if (end == NULL) + return NULL; + *end ++ = '\0'; + str = end; + } + va_end(ap); + return str; +} + + +#if 0 +/* Adjust SKB. */ + +struct sk_buff *ether_adjust_skb(struct sk_buff *skb, int extra) +{ + if ((skb != NULL) && (skb_tailroom(skb) < extra)) { + struct sk_buff *skb2; + + skb2 = skb_copy_expand(skb, 0, extra, GFP_ATOMIC); + dev_kfree_skb(skb); + skb = skb2; + } + if (skb != NULL) + skb_put(skb, extra); + + return skb; +} +#endif + +/* Return the IP address as a string for a given device. */ + +static void dev_ip_addr(void *d, char *buf, char *bin_buf) +{ + struct net_device *dev = d; + struct in_device *ip = dev->ip_ptr; + struct in_ifaddr *in; + __be32 addr; + + if ((ip == NULL) || ((in = ip->ifa_list) == NULL)) { + printk(KERN_WARNING "Device not assigned an IP address!\n"); + return; + } + + addr = in->ifa_address; + sprintf(buf, "%d.%d.%d.%d", addr & 0xff, (addr >> 8) & 0xff, + (addr >> 16) & 0xff, addr >> 24); + + if (bin_buf) { + bin_buf[0] = addr & 0xff; + bin_buf[1] = (addr >> 8) & 0xff; + bin_buf[2] = (addr >> 16) & 0xff; + bin_buf[3] = addr >> 24; + } +} + +/* Set Ethernet address of the specified device. */ + +static void inline set_ether_mac(void *d, unsigned char *addr) +{ + struct net_device *dev = d; + memcpy(dev->dev_addr, addr, ETH_ALEN); +} + + +/* ======================= TUNTAP TRANSPORT INTERFACE ====================== */ + +static int tuntap_open(struct iss_net_private *lp) +{ + struct ifreq ifr; + char *dev_name = lp->tp.info.tuntap.dev_name; + int err = -EINVAL; + int fd; + + /* We currently only support a fixed configuration. */ + + if (!lp->tp.info.tuntap.fixed_config) + return -EINVAL; + + if ((fd = simc_open("/dev/net/tun", 02, 0)) < 0) { /* O_RDWR */ + printk("Failed to open /dev/net/tun, returned %d " + "(errno = %d)\n", fd, errno); + return fd; + } + + memset(&ifr, 0, sizeof ifr); + ifr.ifr_flags = IFF_TAP | IFF_NO_PI; + strlcpy(ifr.ifr_name, dev_name, sizeof ifr.ifr_name); + + if ((err = simc_ioctl(fd, TUNSETIFF, (void*) &ifr)) < 0) { + printk("Failed to set interface, returned %d " + "(errno = %d)\n", err, errno); + simc_close(fd); + return err; + } + + lp->tp.info.tuntap.fd = fd; + return err; +} + +static void tuntap_close(struct iss_net_private *lp) +{ +#if 0 + if (lp->tp.info.tuntap.fixed_config) + iter_addresses(lp->tp.info.tuntap.dev, close_addr, lp->host.dev_name); +#endif + simc_close(lp->tp.info.tuntap.fd); + lp->tp.info.tuntap.fd = -1; +} + +static int tuntap_read (struct iss_net_private *lp, struct sk_buff **skb) +{ +#if 0 + *skb = ether_adjust_skb(*skb, ETH_HEADER_OTHER); + if (*skb == NULL) + return -ENOMEM; +#endif + + return simc_read(lp->tp.info.tuntap.fd, + (*skb)->data, (*skb)->dev->mtu + ETH_HEADER_OTHER); +} + +static int tuntap_write (struct iss_net_private *lp, struct sk_buff **skb) +{ + return simc_write(lp->tp.info.tuntap.fd, (*skb)->data, (*skb)->len); +} + +unsigned short tuntap_protocol(struct sk_buff *skb) +{ + return eth_type_trans(skb, skb->dev); +} + +static int tuntap_poll(struct iss_net_private *lp) +{ + return simc_poll(lp->tp.info.tuntap.fd); +} + +/* + * Currently only a device name is supported. + * ethX=tuntap[,[mac address][,[device name]]] + */ + +static int tuntap_probe(struct iss_net_private *lp, int index, char *init) +{ + const int len = strlen(TRANSPORT_TUNTAP_NAME); + char *dev_name = NULL, *mac_str = NULL, *rem = NULL; + + /* Transport should be 'tuntap': ethX=tuntap,mac,dev_name */ + + if (strncmp(init, TRANSPORT_TUNTAP_NAME, len)) + return 0; + + if (*(init += strlen(TRANSPORT_TUNTAP_NAME)) == ',') { + if ((rem=split_if_spec(init+1, &mac_str, &dev_name)) != NULL) { + printk("Extra garbage on specification : '%s'\n", rem); + return 0; + } + } else if (*init != '\0') { + printk("Invalid argument: %s. Skipping device!\n", init); + return 0; + } + + if (dev_name) { + strncpy(lp->tp.info.tuntap.dev_name, dev_name, + sizeof lp->tp.info.tuntap.dev_name); + lp->tp.info.tuntap.fixed_config = 1; + } else + strcpy(lp->tp.info.tuntap.dev_name, TRANSPORT_TUNTAP_NAME); + + +#if 0 + if (setup_etheraddr(mac_str, lp->mac)) + lp->have_mac = 1; +#endif + lp->mtu = TRANSPORT_TUNTAP_MTU; + + //lp->info.tuntap.gate_addr = gate_addr; + + lp->tp.info.tuntap.fd = -1; + + lp->tp.open = tuntap_open; + lp->tp.close = tuntap_close; + lp->tp.read = tuntap_read; + lp->tp.write = tuntap_write; + lp->tp.protocol = tuntap_protocol; + lp->tp.poll = tuntap_poll; + + printk("TUN/TAP backend - "); +#if 0 + if (lp->host.gate_addr != NULL) + printk("IP = %s", lp->host.gate_addr); +#endif + printk("\n"); + + return 1; +} + +/* ================================ ISS NET ================================ */ + +static int iss_net_rx(struct net_device *dev) +{ + struct iss_net_private *lp = dev->priv; + int pkt_len; + struct sk_buff *skb; + + /* Check if there is any new data. */ + + if (lp->tp.poll(lp) == 0) + return 0; + + /* Try to allocate memory, if it fails, try again next round. */ + + if ((skb = dev_alloc_skb(dev->mtu + 2 + ETH_HEADER_OTHER)) == NULL) { + lp->stats.rx_dropped++; + return 0; + } + + skb_reserve(skb, 2); + + /* Setup skb */ + + skb->dev = dev; + skb_reset_mac_header(skb); + pkt_len = lp->tp.read(lp, &skb); + skb_put(skb, pkt_len); + + if (pkt_len > 0) { + skb_trim(skb, pkt_len); + skb->protocol = lp->tp.protocol(skb); + + lp->stats.rx_bytes += skb->len; + lp->stats.rx_packets++; + // netif_rx(skb); + netif_rx_ni(skb); + return pkt_len; + } + kfree_skb(skb); + return pkt_len; +} + +static int iss_net_poll(void) +{ + struct list_head *ele; + int err, ret = 0; + + spin_lock(&opened_lock); + + list_for_each(ele, &opened) { + struct iss_net_private *lp; + + lp = list_entry(ele, struct iss_net_private, opened_list); + + if (!netif_running(lp->dev)) + break; + + spin_lock(&lp->lock); + + while ((err = iss_net_rx(lp->dev)) > 0) + ret++; + + spin_unlock(&lp->lock); + + if (err < 0) { + printk(KERN_ERR "Device '%s' read returned %d, " + "shutting it down\n", lp->dev->name, err); + dev_close(lp->dev); + } else { + // FIXME reactivate_fd(lp->fd, ISS_ETH_IRQ); + } + } + + spin_unlock(&opened_lock); + return ret; +} + + +static void iss_net_timer(unsigned long priv) +{ + struct iss_net_private* lp = (struct iss_net_private*) priv; + + spin_lock(&lp->lock); + + iss_net_poll(); + + mod_timer(&lp->timer, jiffies + lp->timer_val); + + spin_unlock(&lp->lock); +} + + +static int iss_net_open(struct net_device *dev) +{ + struct iss_net_private *lp = dev->priv; + char addr[sizeof "255.255.255.255\0"]; + int err; + + spin_lock(&lp->lock); + + if ((err = lp->tp.open(lp)) < 0) + goto out; + + if (!lp->have_mac) { + dev_ip_addr(dev, addr, &lp->mac[2]); + set_ether_mac(dev, lp->mac); + } + + netif_start_queue(dev); + + /* clear buffer - it can happen that the host side of the interface + * is full when we get here. In this case, new data is never queued, + * SIGIOs never arrive, and the net never works. + */ + while ((err = iss_net_rx(dev)) > 0) + ; + + spin_lock(&opened_lock); + list_add(&lp->opened_list, &opened); + spin_unlock(&opened_lock); + + init_timer(&lp->timer); + lp->timer_val = ISS_NET_TIMER_VALUE; + lp->timer.data = (unsigned long) lp; + lp->timer.function = iss_net_timer; + mod_timer(&lp->timer, jiffies + lp->timer_val); + +out: + spin_unlock(&lp->lock); + return err; +} + +static int iss_net_close(struct net_device *dev) +{ + struct iss_net_private *lp = dev->priv; +printk("iss_net_close!\n"); + netif_stop_queue(dev); + spin_lock(&lp->lock); + + spin_lock(&opened_lock); + list_del(&opened); + spin_unlock(&opened_lock); + + del_timer_sync(&lp->timer); + + lp->tp.close(lp); + + spin_unlock(&lp->lock); + return 0; +} + +static int iss_net_start_xmit(struct sk_buff *skb, struct net_device *dev) +{ + struct iss_net_private *lp = dev->priv; + unsigned long flags; + int len; + + netif_stop_queue(dev); + spin_lock_irqsave(&lp->lock, flags); + + len = lp->tp.write(lp, &skb); + + if (len == skb->len) { + lp->stats.tx_packets++; + lp->stats.tx_bytes += skb->len; + dev->trans_start = jiffies; + netif_start_queue(dev); + + /* this is normally done in the interrupt when tx finishes */ + netif_wake_queue(dev); + + } else if (len == 0) { + netif_start_queue(dev); + lp->stats.tx_dropped++; + + } else { + netif_start_queue(dev); + printk(KERN_ERR "iss_net_start_xmit: failed(%d)\n", len); + } + + spin_unlock_irqrestore(&lp->lock, flags); + + dev_kfree_skb(skb); + return 0; +} + + +static struct net_device_stats *iss_net_get_stats(struct net_device *dev) +{ + struct iss_net_private *lp = dev->priv; + return &lp->stats; +} + +static void iss_net_set_multicast_list(struct net_device *dev) +{ +#if 0 + if (dev->flags & IFF_PROMISC) + return; + else if (dev->mc_count) + dev->flags |= IFF_ALLMULTI; + else + dev->flags &= ~IFF_ALLMULTI; +#endif +} + +static void iss_net_tx_timeout(struct net_device *dev) +{ +#if 0 + dev->trans_start = jiffies; + netif_wake_queue(dev); +#endif +} + +static int iss_net_set_mac(struct net_device *dev, void *addr) +{ +#if 0 + struct iss_net_private *lp = dev->priv; + struct sockaddr *hwaddr = addr; + + spin_lock(&lp->lock); + memcpy(dev->dev_addr, hwaddr->sa_data, ETH_ALEN); + spin_unlock(&lp->lock); +#endif + + return 0; +} + +static int iss_net_change_mtu(struct net_device *dev, int new_mtu) +{ +#if 0 + struct iss_net_private *lp = dev->priv; + int err = 0; + + spin_lock(&lp->lock); + + // FIXME not needed new_mtu = transport_set_mtu(new_mtu, &lp->user); + + if (new_mtu < 0) + err = new_mtu; + else + dev->mtu = new_mtu; + + spin_unlock(&lp->lock); + return err; +#endif + return -EINVAL; +} + +void iss_net_user_timer_expire(unsigned long _conn) +{ +} + + +static struct platform_driver iss_net_driver = { + .driver = { + .name = DRIVER_NAME, + }, +}; + +static int driver_registered; + +static int iss_net_configure(int index, char *init) +{ + struct net_device *dev; + struct iss_net_private *lp; + int err; + + if ((dev = alloc_etherdev(sizeof *lp)) == NULL) { + printk(KERN_ERR "eth_configure: failed to allocate device\n"); + return 1; + } + + /* Initialize private element. */ + + lp = dev->priv; + *lp = ((struct iss_net_private) { + .device_list = LIST_HEAD_INIT(lp->device_list), + .opened_list = LIST_HEAD_INIT(lp->opened_list), + .lock = SPIN_LOCK_UNLOCKED, + .dev = dev, + .index = index, + //.fd = -1, + .mac = { 0xfe, 0xfd, 0x0, 0x0, 0x0, 0x0 }, + .have_mac = 0, + }); + + /* + * Try all transport protocols. + * Note: more protocols can be added by adding '&& !X_init(lp, eth)'. + */ + + if (!tuntap_probe(lp, index, init)) { + printk("Invalid arguments. Skipping device!\n"); + goto errout; + } + + printk(KERN_INFO "Netdevice %d ", index); + if (lp->have_mac) + printk("(%02x:%02x:%02x:%02x:%02x:%02x) ", + lp->mac[0], lp->mac[1], + lp->mac[2], lp->mac[3], + lp->mac[4], lp->mac[5]); + printk(": "); + + /* sysfs register */ + + if (!driver_registered) { + platform_driver_register(&iss_net_driver); + driver_registered = 1; + } + + spin_lock(&devices_lock); + list_add(&lp->device_list, &devices); + spin_unlock(&devices_lock); + + lp->pdev.id = index; + lp->pdev.name = DRIVER_NAME; + platform_device_register(&lp->pdev); + SET_NETDEV_DEV(dev,&lp->pdev.dev); + + /* + * If this name ends up conflicting with an existing registered + * netdevice, that is OK, register_netdev{,ice}() will notice this + * and fail. + */ + snprintf(dev->name, sizeof dev->name, "eth%d", index); + + dev->mtu = lp->mtu; + dev->open = iss_net_open; + dev->hard_start_xmit = iss_net_start_xmit; + dev->stop = iss_net_close; + dev->get_stats = iss_net_get_stats; + dev->set_multicast_list = iss_net_set_multicast_list; + dev->tx_timeout = iss_net_tx_timeout; + dev->set_mac_address = iss_net_set_mac; + dev->change_mtu = iss_net_change_mtu; + dev->watchdog_timeo = (HZ >> 1); + dev->irq = -1; + + rtnl_lock(); + err = register_netdevice(dev); + rtnl_unlock(); + + if (err) { + printk("Error registering net device!\n"); + /* XXX: should we call ->remove() here? */ + free_netdev(dev); + return 1; + } + + init_timer(&lp->tl); + lp->tl.function = iss_net_user_timer_expire; + +#if 0 + if (lp->have_mac) + set_ether_mac(dev, lp->mac); +#endif + return 0; + +errout: + // FIXME: unregister; free, etc.. + return -EIO; + +} + +/* ------------------------------------------------------------------------- */ + +/* Filled in during early boot */ + +struct list_head eth_cmd_line = LIST_HEAD_INIT(eth_cmd_line); + +struct iss_net_init { + struct list_head list; + char *init; /* init string */ + int index; +}; + +/* + * Parse the command line and look for 'ethX=...' fields, and register all + * those fields. They will be later initialized in iss_net_init. + */ + +#define ERR KERN_ERR "iss_net_setup: " + +static int iss_net_setup(char *str) +{ + struct iss_net_private *device = NULL; + struct iss_net_init *new; + struct list_head *ele; + char *end; + int n; + + n = simple_strtoul(str, &end, 0); + if (end == str) { + printk(ERR "Failed to parse '%s'\n", str); + return 1; + } + if (n < 0) { + printk(ERR "Device %d is negative\n", n); + return 1; + } + if (*(str = end) != '=') { + printk(ERR "Expected '=' after device number\n"); + return 1; + } + + spin_lock(&devices_lock); + + list_for_each(ele, &devices) { + device = list_entry(ele, struct iss_net_private, device_list); + if (device->index == n) + break; + } + + spin_unlock(&devices_lock); + + if (device && device->index == n) { + printk(ERR "Device %d already configured\n", n); + return 1; + } + + if ((new = alloc_bootmem(sizeof new)) == NULL) { + printk("Alloc_bootmem failed\n"); + return 1; + } + + INIT_LIST_HEAD(&new->list); + new->index = n; + new->init = str + 1; + + list_add_tail(&new->list, ð_cmd_line); + return 1; +} + +#undef ERR + +__setup("eth=", iss_net_setup); + +/* + * Initialize all ISS Ethernet devices previously registered in iss_net_setup. + */ + +static int iss_net_init(void) +{ + struct list_head *ele, *next; + + /* Walk through all Ethernet devices specified in the command line. */ + + list_for_each_safe(ele, next, ð_cmd_line) { + struct iss_net_init *eth; + eth = list_entry(ele, struct iss_net_init, list); + iss_net_configure(eth->index, eth->init); + } + + return 1; +} + +module_init(iss_net_init); + diff --git a/arch/xtensa/platforms/iss/setup.c b/arch/xtensa/platforms/iss/setup.c new file mode 100644 index 0000000..f60c8cf --- /dev/null +++ b/arch/xtensa/platforms/iss/setup.c @@ -0,0 +1,110 @@ +/* + * + * arch/xtensa/platform-iss/setup.c + * + * Platform specific initialization. + * + * Authors: Chris Zankel + * Joe Taylor + * + * Copyright 2001 - 2005 Tensilica Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + + +void __init platform_init(bp_tag_t* bootparam) +{ + +} + +void platform_halt(void) +{ + printk (" ** Called platform_halt(), looping forever! **\n"); + while (1); +} + +void platform_power_off(void) +{ + printk (" ** Called platform_power_off(), looping forever! **\n"); + while (1); +} +void platform_restart(void) +{ + /* Flush and reset the mmu, simulate a processor reset, and + * jump to the reset vector. */ + + __asm__ __volatile__("movi a2, 15\n\t" + "wsr a2, " __stringify(ICOUNTLEVEL) "\n\t" + "movi a2, 0\n\t" + "wsr a2, " __stringify(ICOUNT) "\n\t" + "wsr a2, " __stringify(IBREAKENABLE) "\n\t" + "wsr a2, " __stringify(LCOUNT) "\n\t" + "movi a2, 0x1f\n\t" + "wsr a2, " __stringify(PS) "\n\t" + "isync\n\t" + "jx %0\n\t" + : + : "a" (XCHAL_RESET_VECTOR_VADDR) + : "a2"); + + /* control never gets here */ +} + +extern void iss_net_poll(void); + +const char twirl[]="|/-\\|/-\\"; + +void platform_heartbeat(void) +{ +#if 0 + static int i = 0, j = 0; + + if (--i < 0) { + i = 99; + printk("\r%c\r", twirl[j++]); + if (j == 8) + j = 0; + } +#endif +} + + + +static int +iss_panic_event(struct notifier_block *this, unsigned long event, void *ptr) +{ + __asm__ __volatile__("movi a2, -1; simcall\n"); + return NOTIFY_DONE; +} + +static struct notifier_block iss_panic_block = { + iss_panic_event, + NULL, + 0 +}; + +void __init platform_setup(char **p_cmdline) +{ + atomic_notifier_chain_register(&panic_notifier_list, &iss_panic_block); +} diff --git a/include/asm-xtensa/cacheflush.h b/include/asm-xtensa/cacheflush.h index b773c57..94c4c53 100644 --- a/include/asm-xtensa/cacheflush.h +++ b/include/asm-xtensa/cacheflush.h @@ -70,6 +70,8 @@ extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long); #endif #if (ICACHE_WAY_SIZE > PAGE_SIZE) extern void __invalidate_icache_page_alias(unsigned long, unsigned long); +#else +# define __invalidate_icache_page_alias(v,p) do { } while(0) #endif /* diff --git a/include/asm-xtensa/coprocessor.h b/include/asm-xtensa/coprocessor.h index aa21210..1cbcf90 100644 --- a/include/asm-xtensa/coprocessor.h +++ b/include/asm-xtensa/coprocessor.h @@ -5,81 +5,173 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2003 - 2005 Tensilica Inc. + * Copyright (C) 2003 - 2007 Tensilica Inc. */ + #ifndef _XTENSA_COPROCESSOR_H #define _XTENSA_COPROCESSOR_H -#include +#include #include +#include + +#ifdef __ASSEMBLY__ +# include + +.macro xchal_sa_start a b + .set .Lxchal_pofs_, 0 + .set .Lxchal_ofs_, 0 +.endm + +.macro xchal_sa_align ptr minofs maxofs ofsalign totalign + .set .Lxchal_ofs_, .Lxchal_ofs_ + .Lxchal_pofs_ + \totalign - 1 + .set .Lxchal_ofs_, (.Lxchal_ofs_ & -\totalign) - .Lxchal_pofs_ +.endm + +#define _SELECT ( XTHAL_SAS_TIE | XTHAL_SAS_OPT \ + | XTHAL_SAS_CC \ + | XTHAL_SAS_CALR | XTHAL_SAS_CALE ) + +.macro save_xtregs_opt ptr clb at1 at2 at3 at4 offset + .if XTREGS_OPT_SIZE > 0 + addi \clb, \ptr, \offset + xchal_ncp_store \clb \at1 \at2 \at3 \at4 select=_SELECT + .endif +.endm + +.macro load_xtregs_opt ptr clb at1 at2 at3 at4 offset + .if XTREGS_OPT_SIZE > 0 + addi \clb, \ptr, \offset + xchal_ncp_load \clb \at1 \at2 \at3 \at4 select=_SELECT + .endif +.endm +#undef _SELECT + +#define _SELECT ( XTHAL_SAS_TIE | XTHAL_SAS_OPT \ + | XTHAL_SAS_NOCC \ + | XTHAL_SAS_CALR | XTHAL_SAS_CALE | XTHAL_SAS_GLOB ) + +.macro save_xtregs_user ptr clb at1 at2 at3 at4 offset + .if XTREGS_USER_SIZE > 0 + addi \clb, \ptr, \offset + xchal_ncp_store \clb \at1 \at2 \at3 \at4 select=_SELECT + .endif +.endm + +.macro load_xtregs_user ptr clb at1 at2 at3 at4 offset + .if XTREGS_USER_SIZE > 0 + addi \clb, \ptr, \offset + xchal_ncp_load \clb \at1 \at2 \at3 \at4 select=_SELECT + .endif +.endm +#undef _SELECT + + + +#endif /* __ASSEMBLY__ */ -#if !XCHAL_HAVE_CP - -#define XTENSA_CP_EXTRA_OFFSET 0 -#define XTENSA_CP_EXTRA_ALIGN 1 /* must be a power of 2 */ -#define XTENSA_CP_EXTRA_SIZE 0 - -#else - -#define XTOFS(last_start,last_size,align) \ - ((last_start+last_size+align-1) & -align) - -#define XTENSA_CP_EXTRA_OFFSET 0 -#define XTENSA_CP_EXTRA_ALIGN XCHAL_EXTRA_SA_ALIGN - -#define XTENSA_CPE_CP0_OFFSET \ - XTOFS(XTENSA_CP_EXTRA_OFFSET, XCHAL_EXTRA_SA_SIZE, XCHAL_CP0_SA_ALIGN) -#define XTENSA_CPE_CP1_OFFSET \ - XTOFS(XTENSA_CPE_CP0_OFFSET, XCHAL_CP0_SA_SIZE, XCHAL_CP1_SA_ALIGN) -#define XTENSA_CPE_CP2_OFFSET \ - XTOFS(XTENSA_CPE_CP1_OFFSET, XCHAL_CP1_SA_SIZE, XCHAL_CP2_SA_ALIGN) -#define XTENSA_CPE_CP3_OFFSET \ - XTOFS(XTENSA_CPE_CP2_OFFSET, XCHAL_CP2_SA_SIZE, XCHAL_CP3_SA_ALIGN) -#define XTENSA_CPE_CP4_OFFSET \ - XTOFS(XTENSA_CPE_CP3_OFFSET, XCHAL_CP3_SA_SIZE, XCHAL_CP4_SA_ALIGN) -#define XTENSA_CPE_CP5_OFFSET \ - XTOFS(XTENSA_CPE_CP4_OFFSET, XCHAL_CP4_SA_SIZE, XCHAL_CP5_SA_ALIGN) -#define XTENSA_CPE_CP6_OFFSET \ - XTOFS(XTENSA_CPE_CP5_OFFSET, XCHAL_CP5_SA_SIZE, XCHAL_CP6_SA_ALIGN) -#define XTENSA_CPE_CP7_OFFSET \ - XTOFS(XTENSA_CPE_CP6_OFFSET, XCHAL_CP6_SA_SIZE, XCHAL_CP7_SA_ALIGN) -#define XTENSA_CP_EXTRA_SIZE \ - XTOFS(XTENSA_CPE_CP7_OFFSET, XCHAL_CP7_SA_SIZE, 16) - -#if XCHAL_CP_NUM > 0 -# ifndef __ASSEMBLY__ /* - * Tasks that own contents of (last user) each coprocessor. - * Entries are 0 for not-owned or non-existent coprocessors. - * Note: The size of this structure is fixed to 8 bytes in entry.S + * XTENSA_HAVE_COPROCESSOR(x) returns 1 if coprocessor x is configured. + * + * XTENSA_HAVE_IO_PORT(x) returns 1 if io-port x is configured. + * */ -typedef struct { - struct task_struct *owner; /* owner */ - int offset; /* offset in cpextra space. */ -} coprocessor_info_t; -# else -# define COPROCESSOR_INFO_OWNER 0 -# define COPROCESSOR_INFO_OFFSET 4 -# define COPROCESSOR_INFO_SIZE 8 -# endif -#endif -#endif /* XCHAL_HAVE_CP */ +#define XTENSA_HAVE_COPROCESSOR(x) \ + ((XCHAL_CP_MASK ^ XCHAL_CP_PORT_MASK) & (1 << (x))) +#define XTENSA_HAVE_COPROCESSORS \ + (XCHAL_CP_MASK ^ XCHAL_CP_PORT_MASK) +#define XTENSA_HAVE_IO_PORT(x) \ + (XCHAL_CP_PORT_MASK & (1 << (x))) +#define XTENSA_HAVE_IO_PORTS \ + XCHAL_CP_PORT_MASK #ifndef __ASSEMBLY__ -# if XCHAL_CP_NUM > 0 -struct task_struct; -extern void release_coprocessors (struct task_struct*); -extern void save_coprocessor_registers(void*, int); -# else -# define release_coprocessors(task) -# endif -typedef unsigned char cp_state_t[XTENSA_CP_EXTRA_SIZE] - __attribute__ ((aligned (XTENSA_CP_EXTRA_ALIGN))); -#endif /* !__ASSEMBLY__ */ +#if XCHAL_HAVE_CP + +#define RSR_CPENABLE(x) do { \ + __asm__ __volatile__("rsr %0," __stringify(CPENABLE) : "=a" (x)); \ + } while(0); +#define WSR_CPENABLE(x) do { \ + __asm__ __volatile__("wsr %0," __stringify(CPENABLE) "; rsync" \ + :: "a" (x)); \ + } while(0); +#endif /* XCHAL_HAVE_CP */ + +/* + * Additional registers. + * We define three types of additional registers: + * ext: extra registers that are used by the compiler + * cpn: optional registers that can be used by a user application + * cpX: coprocessor registers that can only be used if the corresponding + * CPENABLE bit is set. + */ + +#define XCHAL_SA_REG(list,cc,abi,type,y,name,z,align,size,...) \ + __REG ## list (cc, abi, type, name, size, align) + +#define __REG0(cc,abi,t,name,s,a) __REG0_ ## cc (abi,name) +#define __REG1(cc,abi,t,name,s,a) __REG1_ ## cc (name) +#define __REG2(cc,abi,type,...) __REG2_ ## type (__VA_ARGS__) + +#define __REG0_0(abi,name) +#define __REG0_1(abi,name) __REG0_1 ## abi (name) +#define __REG0_10(name) __u32 name; +#define __REG0_11(name) __u32 name; +#define __REG0_12(name) + +#define __REG1_0(name) __u32 name; +#define __REG1_1(name) + +#define __REG2_0(n,s,a) __u32 name; +#define __REG2_1(n,s,a) unsigned char n[s] __attribute__ ((aligned(a))); +#define __REG2_2(n,s,a) unsigned char n[s] __attribute__ ((aligned(a))); + +typedef struct { XCHAL_NCP_SA_LIST(0) } xtregs_opt_t + __attribute__ ((aligned (XCHAL_NCP_SA_ALIGN))); +typedef struct { XCHAL_NCP_SA_LIST(1) } xtregs_user_t + __attribute__ ((aligned (XCHAL_NCP_SA_ALIGN))); + +#if XTENSA_HAVE_COPROCESSORS + +typedef struct { XCHAL_CP0_SA_LIST(2) } xtregs_cp0_t + __attribute__ ((aligned (XCHAL_CP0_SA_ALIGN))); +typedef struct { XCHAL_CP1_SA_LIST(2) } xtregs_cp1_t + __attribute__ ((aligned (XCHAL_CP1_SA_ALIGN))); +typedef struct { XCHAL_CP2_SA_LIST(2) } xtregs_cp2_t + __attribute__ ((aligned (XCHAL_CP2_SA_ALIGN))); +typedef struct { XCHAL_CP3_SA_LIST(2) } xtregs_cp3_t + __attribute__ ((aligned (XCHAL_CP3_SA_ALIGN))); +typedef struct { XCHAL_CP4_SA_LIST(2) } xtregs_cp4_t + __attribute__ ((aligned (XCHAL_CP4_SA_ALIGN))); +typedef struct { XCHAL_CP5_SA_LIST(2) } xtregs_cp5_t + __attribute__ ((aligned (XCHAL_CP5_SA_ALIGN))); +typedef struct { XCHAL_CP6_SA_LIST(2) } xtregs_cp6_t + __attribute__ ((aligned (XCHAL_CP6_SA_ALIGN))); +typedef struct { XCHAL_CP7_SA_LIST(2) } xtregs_cp7_t + __attribute__ ((aligned (XCHAL_CP7_SA_ALIGN))); + +extern struct thread_info* coprocessor_owner[XCHAL_CP_MAX]; +extern void coprocessor_save(void*, int); +extern void coprocessor_load(void*, int); +extern void coprocessor_flush(struct thread_info*, int); +extern void coprocessor_restore(struct thread_info*, int); + +extern void coprocessor_release_all(struct thread_info*); +extern void coprocessor_flush_all(struct thread_info*); + +static inline void coprocessor_clear_cpenable(void) +{ + unsigned long i = 0; + WSR_CPENABLE(i); +} + +#endif /* XTENSA_HAVE_COPROCESSORS */ + +#endif /* !__ASSEMBLY__ */ #endif /* _XTENSA_COPROCESSOR_H */ diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h index 4673845..ca6e510 100644 --- a/include/asm-xtensa/elf.h +++ b/include/asm-xtensa/elf.h @@ -72,115 +72,32 @@ /* ELF register definitions. This is needed for core dump support. */ -/* - * elf_gregset_t contains the application-level state in the following order: - * Processor info: config_version, cpuxy - * Processor state: pc, ps, exccause, excvaddr, wb, ws, - * lbeg, lend, lcount, sar - * GP regs: ar0 - arXX - */ - typedef unsigned long elf_greg_t; typedef struct { - elf_greg_t xchal_config_id0; - elf_greg_t xchal_config_id1; - elf_greg_t cpux; - elf_greg_t cpuy; elf_greg_t pc; elf_greg_t ps; - elf_greg_t exccause; - elf_greg_t excvaddr; - elf_greg_t windowbase; - elf_greg_t windowstart; elf_greg_t lbeg; elf_greg_t lend; elf_greg_t lcount; elf_greg_t sar; - elf_greg_t syscall; - elf_greg_t ar[64]; + elf_greg_t windowstart; + elf_greg_t windowbase; + elf_greg_t reserved[8+48]; + elf_greg_t a[64]; } xtensa_gregset_t; #define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t)) typedef elf_greg_t elf_gregset_t[ELF_NGREG]; -/* - * Compute the size of the coprocessor and extra state layout (register info) - * table (in bytes). - * This is actually the maximum size of the table, as opposed to the size, - * which is available from the _xtensa_reginfo_table_size global variable. - * - * (See also arch/xtensa/kernel/coprocessor.S) - * - */ - -#ifndef XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM -# define XTENSA_CPE_LTABLE_SIZE 0 -#else -# define XTENSA_CPE_SEGMENT(num) (num ? (1+num) : 0) -# define XTENSA_CPE_LTABLE_ENTRIES \ - ( XTENSA_CPE_SEGMENT(XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM) \ - + XTENSA_CPE_SEGMENT(XCHAL_CP0_SA_CONTENTS_LIBDB_NUM) \ - + XTENSA_CPE_SEGMENT(XCHAL_CP1_SA_CONTENTS_LIBDB_NUM) \ - + XTENSA_CPE_SEGMENT(XCHAL_CP2_SA_CONTENTS_LIBDB_NUM) \ - + XTENSA_CPE_SEGMENT(XCHAL_CP3_SA_CONTENTS_LIBDB_NUM) \ - + XTENSA_CPE_SEGMENT(XCHAL_CP4_SA_CONTENTS_LIBDB_NUM) \ - + XTENSA_CPE_SEGMENT(XCHAL_CP5_SA_CONTENTS_LIBDB_NUM) \ - + XTENSA_CPE_SEGMENT(XCHAL_CP6_SA_CONTENTS_LIBDB_NUM) \ - + XTENSA_CPE_SEGMENT(XCHAL_CP7_SA_CONTENTS_LIBDB_NUM) \ - + 1 /* final entry */ \ - ) -# define XTENSA_CPE_LTABLE_SIZE (XTENSA_CPE_LTABLE_ENTRIES * 8) -#endif - - -/* - * Instantiations of the elf_fpregset_t type contain, in most - * architectures, the floating point (FPU) register set. - * For Xtensa, this type is extended to contain all custom state, - * ie. coprocessor and "extra" (non-coprocessor) state (including, - * for example, TIE-defined states and register files; as well - * as other optional processor state). - * This includes FPU state if a floating-point coprocessor happens - * to have been configured within the Xtensa processor. - * - * TOTAL_FPREGS_SIZE is the required size (without rounding) - * of elf_fpregset_t. It provides space for the following: - * - * a) 32-bit mask of active coprocessors for this task (similar - * to CPENABLE in single-threaded Xtensa processor systems) - * - * b) table describing the layout of custom states (ie. of - * individual registers, etc) within the save areas - * - * c) save areas for each coprocessor and for non-coprocessor - * ("extra") state - * - * Note that save areas may require up to 16-byte alignment when - * accessed by save/restore sequences. We do not need to ensure - * such alignment in an elf_fpregset_t structure because custom - * state is not directly loaded/stored into it; rather, save area - * contents are copied to elf_fpregset_t from the active save areas - * (see 'struct task_struct' definition in processor.h for that) - * using memcpy(). But we do allow space for such alignment, - * to allow optimizations of layout and copying. - */ -#if 0 -#define TOTAL_FPREGS_SIZE \ - (4 + XTENSA_CPE_LTABLE_SIZE + XTENSA_CP_EXTRA_SIZE) -#define ELF_NFPREG \ - ((TOTAL_FPREGS_SIZE + sizeof(elf_fpreg_t) - 1) / sizeof(elf_fpreg_t)) -#else -#define TOTAL_FPREGS_SIZE 0 -#define ELF_NFPREG 0 -#endif +#define ELF_NFPREG 18 typedef unsigned int elf_fpreg_t; typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; #define ELF_CORE_COPY_REGS(_eregs, _pregs) \ - xtensa_elf_core_copy_regs (&_eregs, _pregs); + xtensa_elf_core_copy_regs ((xtensa_gregset_t*)&(_eregs), _pregs); extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *); @@ -257,6 +174,21 @@ extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *); _r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \ } while (0) +typedef struct { + xtregs_opt_t opt; + xtregs_user_t user; +#if XTENSA_HAVE_COPROCESSORS + xtregs_cp0_t cp0; + xtregs_cp1_t cp1; + xtregs_cp2_t cp2; + xtregs_cp3_t cp3; + xtregs_cp4_t cp4; + xtregs_cp5_t cp5; + xtregs_cp6_t cp6; + xtregs_cp7_t cp7; +#endif +} elf_xtregs_t; + #define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) struct task_struct; diff --git a/include/asm-xtensa/module.h b/include/asm-xtensa/module.h index ffb25bf..d9b34be 100644 --- a/include/asm-xtensa/module.h +++ b/include/asm-xtensa/module.h @@ -15,9 +15,11 @@ struct mod_arch_specific { - /* Module support is not completely implemented. */ + /* No special elements, yet. */ }; +#define MODULE_ARCH_VERMAGIC "xtensa-" __stringify(XCHAL_CORE_ID) " " + #define Elf_Shdr Elf32_Shdr #define Elf_Sym Elf32_Sym #define Elf_Ehdr Elf32_Ehdr diff --git a/include/asm-xtensa/pgalloc.h b/include/asm-xtensa/pgalloc.h index 8d1544e..4f4a798 100644 --- a/include/asm-xtensa/pgalloc.h +++ b/include/asm-xtensa/pgalloc.h @@ -47,7 +47,7 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, return kmem_cache_alloc(pgtable_cache, GFP_KERNEL|__GFP_REPEAT); } -static inline pte_token_t pte_alloc_one(struct mm_struct *mm, +static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr) { struct page *page; diff --git a/include/asm-xtensa/pgtable.h b/include/asm-xtensa/pgtable.h index c0fcc1c..c8b024a 100644 --- a/include/asm-xtensa/pgtable.h +++ b/include/asm-xtensa/pgtable.h @@ -66,11 +66,9 @@ */ #define VMALLOC_START 0xC0000000 -#define VMALLOC_END 0xC6FEFFFF -#define TLBTEMP_BASE_1 0xC6FF0000 -#define TLBTEMP_BASE_2 0xC6FF8000 -#define MODULE_START 0xC7000000 -#define MODULE_END 0xC7FFFFFF +#define VMALLOC_END 0xC7FEFFFF +#define TLBTEMP_BASE_1 0xC7FF0000 +#define TLBTEMP_BASE_2 0xC7FF8000 /* * Xtensa Linux config PTE layout (when present): diff --git a/include/asm-xtensa/processor.h b/include/asm-xtensa/processor.h index 96408f4..4918a4e 100644 --- a/include/asm-xtensa/processor.h +++ b/include/asm-xtensa/processor.h @@ -103,10 +103,6 @@ struct thread_struct { unsigned long dbreaka[XCHAL_NUM_DBREAK]; unsigned long dbreakc[XCHAL_NUM_DBREAK]; - /* Allocate storage for extra state and coprocessor state. */ - unsigned char cp_save[XTENSA_CP_EXTRA_SIZE] - __attribute__ ((aligned(XTENSA_CP_EXTRA_ALIGN))); - /* Make structure 16 bytes aligned. */ int align[0] __attribute__ ((aligned(16))); }; @@ -162,21 +158,16 @@ struct thread_struct { struct task_struct; struct mm_struct; -// FIXME: do we need release_thread for CP?? /* Free all resources held by a thread. */ #define release_thread(thread) do { } while(0) -// FIXME: do we need prepare_to_copy (lazy status) for CP?? /* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while (0) +extern void prepare_to_copy(struct task_struct*); -/* - * create a kernel thread without removing it from tasklists - */ +/* Create a kernel thread without removing it from tasklists */ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); /* Copy and release all segment info associated with a VM */ - #define copy_segments(p, mm) do { } while(0) #define release_segments(mm) do { } while(0) #define forget_segments() do { } while (0) diff --git a/include/asm-xtensa/ptrace.h b/include/asm-xtensa/ptrace.h index 77ff02d..422c73e 100644 --- a/include/asm-xtensa/ptrace.h +++ b/include/asm-xtensa/ptrace.h @@ -53,33 +53,30 @@ /* Registers used by strace */ -#define REG_A_BASE 0xfc000000 -#define REG_AR_BASE 0x04000000 -#define REG_PC 0x14000000 -#define REG_PS 0x080000e6 -#define REG_WB 0x08000048 -#define REG_WS 0x08000049 -#define REG_LBEG 0x08000000 -#define REG_LEND 0x08000001 -#define REG_LCOUNT 0x08000002 -#define REG_SAR 0x08000003 -#define REG_DEPC 0x080000c0 -#define REG_EXCCAUSE 0x080000e8 -#define REG_EXCVADDR 0x080000ee -#define SYSCALL_NR 0x1 - -#define AR_REGNO_TO_A_REGNO(ar, wb) (ar - wb*4) & ~(XCHAL_NUM_AREGS - 1) +#define REG_A_BASE 0x0000 +#define REG_AR_BASE 0x0100 +#define REG_PC 0x0020 +#define REG_PS 0x02e6 +#define REG_WB 0x0248 +#define REG_WS 0x0249 +#define REG_LBEG 0x0200 +#define REG_LEND 0x0201 +#define REG_LCOUNT 0x0202 +#define REG_SAR 0x0203 + +#define SYSCALL_NR 0x00ff /* Other PTRACE_ values defined in using values 0-9,16,17,24 */ -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 -#define PTRACE_GETFPREGSIZE 18 +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 +#define PTRACE_GETXTREGS 18 +#define PTRACE_SETXTREGS 19 #ifndef __ASSEMBLY__ +#ifdef __KERNEL__ + /* * This struct defines the way the registers are stored on the * kernel stack during a system call or other kernel entry. @@ -102,6 +99,9 @@ struct pt_regs { unsigned long icountlevel; /* 60 */ int reserved[1]; /* 64 */ + /* Additional configurable registers that are used by the compiler. */ + xtregs_opt_t xtregs_opt; + /* Make sure the areg field is 16 bytes aligned. */ int align[0] __attribute__ ((aligned(16))); @@ -111,8 +111,6 @@ struct pt_regs { unsigned long areg[16]; /* 128 (64) */ }; -#ifdef __KERNEL__ - #include # define task_pt_regs(tsk) ((struct pt_regs*) \ diff --git a/include/asm-xtensa/regs.h b/include/asm-xtensa/regs.h index c913d25..d4baed2 100644 --- a/include/asm-xtensa/regs.h +++ b/include/asm-xtensa/regs.h @@ -100,7 +100,14 @@ #define EXCCAUSE_DTLB_SIZE_RESTRICTION 27 #define EXCCAUSE_LOAD_CACHE_ATTRIBUTE 28 #define EXCCAUSE_STORE_CACHE_ATTRIBUTE 29 -#define EXCCAUSE_FLOATING_POINT 40 +#define EXCCAUSE_COPROCESSOR0_DISABLED 32 +#define EXCCAUSE_COPROCESSOR1_DISABLED 33 +#define EXCCAUSE_COPROCESSOR2_DISABLED 34 +#define EXCCAUSE_COPROCESSOR3_DISABLED 35 +#define EXCCAUSE_COPROCESSOR4_DISABLED 36 +#define EXCCAUSE_COPROCESSOR5_DISABLED 37 +#define EXCCAUSE_COPROCESSOR6_DISABLED 38 +#define EXCCAUSE_COPROCESSOR7_DISABLED 39 /* PS register fields. */ diff --git a/include/asm-xtensa/sigcontext.h b/include/asm-xtensa/sigcontext.h index e3381ce..03383af 100644 --- a/include/asm-xtensa/sigcontext.h +++ b/include/asm-xtensa/sigcontext.h @@ -13,9 +13,6 @@ struct sigcontext { - unsigned long oldmask; - - /* CPU registers */ unsigned long sc_pc; unsigned long sc_ps; unsigned long sc_lbeg; @@ -25,6 +22,7 @@ struct sigcontext { unsigned long sc_acclo; unsigned long sc_acchi; unsigned long sc_a[16]; + void *sc_xtregs; }; #endif /* _XTENSA_SIGCONTEXT_H */ diff --git a/include/asm-xtensa/stat.h b/include/asm-xtensa/stat.h index 149f4bc..c499203 100644 --- a/include/asm-xtensa/stat.h +++ b/include/asm-xtensa/stat.h @@ -5,25 +5,23 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2001 - 2005 Tensilica Inc. + * Copyright (C) 2001 - 2007 Tensilica Inc. */ #ifndef _XTENSA_STAT_H #define _XTENSA_STAT_H -#include - #define STAT_HAVE_NSEC 1 struct stat { unsigned long st_dev; - ino_t st_ino; - mode_t st_mode; - nlink_t st_nlink; - uid_t st_uid; - gid_t st_gid; - unsigned int st_rdev; - off_t st_size; + unsigned long st_ino; + unsigned int st_mode; + unsigned int st_nlink; + unsigned int st_uid; + unsigned int st_gid; + unsigned long st_rdev; + long st_size; unsigned long st_blksize; unsigned long st_blocks; unsigned long st_atime; @@ -36,8 +34,6 @@ struct stat { unsigned long __unused5; }; -/* This matches struct stat64 in glibc-2.3 */ - struct stat64 { unsigned long long st_dev; /* Device */ unsigned long long st_ino; /* File serial number */ @@ -47,20 +43,14 @@ struct stat64 { unsigned int st_gid; /* Group ID of the file's group. */ unsigned long long st_rdev; /* Device number, if device. */ long long st_size; /* Size of file, in bytes. */ - long st_blksize; /* Optimal block size for I/O. */ + unsigned long st_blksize; /* Optimal block size for I/O. */ unsigned long __unused2; -#ifdef __XTENSA_EB__ - unsigned long __unused3; - long st_blocks; /* Number 512-byte blocks allocated. */ -#else - long st_blocks; /* Number 512-byte blocks allocated. */ - unsigned long __unused3; -#endif - long st_atime; /* Time of last access. */ + unsigned long long st_blocks; /* Number 512-byte blocks allocated. */ + unsigned long st_atime; /* Time of last access. */ unsigned long st_atime_nsec; - long st_mtime; /* Time of last modification. */ + unsigned long st_mtime; /* Time of last modification. */ unsigned long st_mtime_nsec; - long st_ctime; /* Time of last status change. */ + unsigned long st_ctime; /* Time of last status change. */ unsigned long st_ctime_nsec; unsigned long __unused4; unsigned long __unused5; diff --git a/include/asm-xtensa/system.h b/include/asm-xtensa/system.h index e0cb911..62b1e8f 100644 --- a/include/asm-xtensa/system.h +++ b/include/asm-xtensa/system.h @@ -46,42 +46,6 @@ static inline int irqs_disabled(void) return flags & 0xf; } -#define RSR_CPENABLE(x) do { \ - __asm__ __volatile__("rsr %0," __stringify(CPENABLE) : "=a" (x)); \ - } while(0); -#define WSR_CPENABLE(x) do { \ - __asm__ __volatile__("wsr %0," __stringify(CPENABLE)";rsync" \ - :: "a" (x));} while(0); - -#define clear_cpenable() __clear_cpenable() - -static inline void __clear_cpenable(void) -{ -#if XCHAL_HAVE_CP - unsigned long i = 0; - WSR_CPENABLE(i); -#endif -} - -static inline void enable_coprocessor(int i) -{ -#if XCHAL_HAVE_CP - int cp; - RSR_CPENABLE(cp); - cp |= 1 << i; - WSR_CPENABLE(cp); -#endif -} - -static inline void disable_coprocessor(int i) -{ -#if XCHAL_HAVE_CP - int cp; - RSR_CPENABLE(cp); - cp &= ~(1 << i); - WSR_CPENABLE(cp); -#endif -} #define smp_read_barrier_depends() do { } while(0) #define read_barrier_depends() do { } while(0) @@ -111,7 +75,6 @@ extern void *_switch_to(void *last, void *next); #define switch_to(prev,next,last) \ do { \ - clear_cpenable(); \ (last) = _switch_to(prev, next); \ } while(0) @@ -244,7 +207,7 @@ static inline void spill_registers(void) "wsr a13," __stringify(SAR) "\n\t" "wsr a14," __stringify(PS) "\n\t" :: "a" (&a0), "a" (&ps) - : "a2", "a3", "a12", "a13", "a14", "a15", "memory"); + : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", "memory"); } #define arch_align_stack(x) (x) diff --git a/include/asm-xtensa/thread_info.h b/include/asm-xtensa/thread_info.h index 52c9582..a2c6406 100644 --- a/include/asm-xtensa/thread_info.h +++ b/include/asm-xtensa/thread_info.h @@ -27,6 +27,21 @@ #ifndef __ASSEMBLY__ +#if XTENSA_HAVE_COPROCESSORS + +typedef struct xtregs_coprocessor { + xtregs_cp0_t cp0; + xtregs_cp1_t cp1; + xtregs_cp2_t cp2; + xtregs_cp3_t cp3; + xtregs_cp4_t cp4; + xtregs_cp5_t cp5; + xtregs_cp6_t cp6; + xtregs_cp7_t cp7; +} xtregs_coprocessor_t; + +#endif + struct thread_info { struct task_struct *task; /* main task structure */ struct exec_domain *exec_domain; /* execution domain */ @@ -38,7 +53,13 @@ struct thread_info { mm_segment_t addr_limit; /* thread address space */ struct restart_block restart_block; + unsigned long cpenable; + /* Allocate storage for extra user states and coprocessor states. */ +#if XTENSA_HAVE_COPROCESSORS + xtregs_coprocessor_t xtregs_cp; +#endif + xtregs_user_t xtregs_user; }; #else /* !__ASSEMBLY__ */ diff --git a/include/asm-xtensa/timex.h b/include/asm-xtensa/timex.h index a5fca59..b83a818 100644 --- a/include/asm-xtensa/timex.h +++ b/include/asm-xtensa/timex.h @@ -63,10 +63,10 @@ extern cycles_t cacheflush_time; * Register access. */ -#define WSR_CCOUNT(r) __asm__("wsr %0,"__stringify(CCOUNT) :: "a" (r)) -#define RSR_CCOUNT(r) __asm__("rsr %0,"__stringify(CCOUNT) : "=a" (r)) -#define WSR_CCOMPARE(x,r) __asm__("wsr %0,"__stringify(CCOMPARE)"+"__stringify(x) :: "a"(r)) -#define RSR_CCOMPARE(x,r) __asm__("rsr %0,"__stringify(CCOMPARE)"+"__stringify(x) : "=a"(r)) +#define WSR_CCOUNT(r) asm volatile ("wsr %0,"__stringify(CCOUNT) :: "a" (r)) +#define RSR_CCOUNT(r) asm volatile ("rsr %0,"__stringify(CCOUNT) : "=a" (r)) +#define WSR_CCOMPARE(x,r) asm volatile ("wsr %0,"__stringify(CCOMPARE)"+"__stringify(x) :: "a"(r)) +#define RSR_CCOMPARE(x,r) asm volatile ("rsr %0,"__stringify(CCOMPARE)"+"__stringify(x) : "=a"(r)) static inline unsigned long get_ccount (void) { diff --git a/include/asm-xtensa/uaccess.h b/include/asm-xtensa/uaccess.h index d6352da..b852842 100644 --- a/include/asm-xtensa/uaccess.h +++ b/include/asm-xtensa/uaccess.h @@ -26,6 +26,7 @@ #include #include #include +#include /* * These assembly macros mirror the C macros that follow below. They @@ -118,7 +119,7 @@ * destroyed (actually, (TASK_SIZE + 1 - size)) */ .macro user_ok aa, as, at, error - movi \at, (TASK_SIZE+1) + movi \at, __XTENSA_UL_CONST(TASK_SIZE) bgeu \as, \at, \error sub \at, \at, \as bgeu \aa, \at, \error @@ -226,20 +227,21 @@ extern long __put_user_bad(void); __pu_err; \ }) -#define __put_user_size(x,ptr,size,retval) \ -do { \ - retval = 0; \ - switch (size) { \ - case 1: __put_user_asm(x,ptr,retval,1,"s8i"); break; \ - case 2: __put_user_asm(x,ptr,retval,2,"s16i"); break; \ - case 4: __put_user_asm(x,ptr,retval,4,"s32i"); break; \ - case 8: { \ - __typeof__(*ptr) __v64 = x; \ - retval = __copy_to_user(ptr,&__v64,8); \ - break; \ - } \ - default: __put_user_bad(); \ - } \ +#define __put_user_size(x,ptr,size,retval) \ +do { \ + int __cb; \ + retval = 0; \ + switch (size) { \ + case 1: __put_user_asm(x,ptr,retval,1,"s8i",__cb); break; \ + case 2: __put_user_asm(x,ptr,retval,2,"s16i",__cb); break; \ + case 4: __put_user_asm(x,ptr,retval,4,"s32i",__cb); break; \ + case 8: { \ + __typeof__(*ptr) __v64 = x; \ + retval = __copy_to_user(ptr,&__v64,8); \ + break; \ + } \ + default: __put_user_bad(); \ + } \ } while (0) @@ -267,14 +269,14 @@ do { \ #define __check_align_1 "" #define __check_align_2 \ - " _bbci.l %2, 0, 1f \n" \ - " movi %0, %3 \n" \ + " _bbci.l %3, 0, 1f \n" \ + " movi %0, %4 \n" \ " _j 2f \n" #define __check_align_4 \ - " _bbsi.l %2, 0, 0f \n" \ - " _bbci.l %2, 1, 1f \n" \ - "0: movi %0, %3 \n" \ + " _bbsi.l %3, 0, 0f \n" \ + " _bbci.l %3, 1, 1f \n" \ + "0: movi %0, %4 \n" \ " _j 2f \n" @@ -286,24 +288,24 @@ do { \ * WARNING: If you modify this macro at all, verify that the * __check_align_* macros still work. */ -#define __put_user_asm(x, addr, err, align, insn) \ - __asm__ __volatile__( \ - __check_align_##align \ - "1: "insn" %1, %2, 0 \n" \ - "2: \n" \ - " .section .fixup,\"ax\" \n" \ - " .align 4 \n" \ - "4: \n" \ - " .long 2b \n" \ - "5: \n" \ - " l32r %2, 4b \n" \ - " movi %0, %3 \n" \ - " jx %2 \n" \ - " .previous \n" \ - " .section __ex_table,\"a\" \n" \ - " .long 1b, 5b \n" \ - " .previous" \ - :"=r" (err) \ +#define __put_user_asm(x, addr, err, align, insn, cb) \ + __asm__ __volatile__( \ + __check_align_##align \ + "1: "insn" %2, %3, 0 \n" \ + "2: \n" \ + " .section .fixup,\"ax\" \n" \ + " .align 4 \n" \ + "4: \n" \ + " .long 2b \n" \ + "5: \n" \ + " l32r %1, 4b \n" \ + " movi %0, %4 \n" \ + " jx %1 \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " .long 1b, 5b \n" \ + " .previous" \ + :"=r" (err), "=r" (cb) \ :"r" ((int)(x)), "r" (addr), "i" (-EFAULT), "0" (err)) #define __get_user_nocheck(x,ptr,size) \ @@ -328,11 +330,12 @@ extern long __get_user_bad(void); #define __get_user_size(x,ptr,size,retval) \ do { \ + int __cb; \ retval = 0; \ switch (size) { \ - case 1: __get_user_asm(x,ptr,retval,1,"l8ui"); break; \ - case 2: __get_user_asm(x,ptr,retval,2,"l16ui"); break; \ - case 4: __get_user_asm(x,ptr,retval,4,"l32i"); break; \ + case 1: __get_user_asm(x,ptr,retval,1,"l8ui",__cb); break; \ + case 2: __get_user_asm(x,ptr,retval,2,"l16ui",__cb); break; \ + case 4: __get_user_asm(x,ptr,retval,4,"l32i",__cb); break; \ case 8: retval = __copy_from_user(&x,ptr,8); break; \ default: (x) = __get_user_bad(); \ } \ @@ -343,25 +346,25 @@ do { \ * WARNING: If you modify this macro at all, verify that the * __check_align_* macros still work. */ -#define __get_user_asm(x, addr, err, align, insn) \ +#define __get_user_asm(x, addr, err, align, insn, cb) \ __asm__ __volatile__( \ __check_align_##align \ - "1: "insn" %1, %2, 0 \n" \ + "1: "insn" %2, %3, 0 \n" \ "2: \n" \ " .section .fixup,\"ax\" \n" \ " .align 4 \n" \ "4: \n" \ " .long 2b \n" \ "5: \n" \ - " l32r %2, 4b \n" \ - " movi %1, 0 \n" \ - " movi %0, %3 \n" \ - " jx %2 \n" \ + " l32r %1, 4b \n" \ + " movi %2, 0 \n" \ + " movi %0, %4 \n" \ + " jx %1 \n" \ " .previous \n" \ " .section __ex_table,\"a\" \n" \ " .long 1b, 5b \n" \ " .previous" \ - :"=r" (err), "=r" (x) \ + :"=r" (err), "=r" (cb), "=r" (x) \ :"r" (addr), "i" (-EFAULT), "0" (err)) diff --git a/include/asm-xtensa/variant-fsf/tie-asm.h b/include/asm-xtensa/variant-fsf/tie-asm.h new file mode 100644 index 0000000..68a73bf --- /dev/null +++ b/include/asm-xtensa/variant-fsf/tie-asm.h @@ -0,0 +1,70 @@ +/* + * This header file contains assembly-language definitions (assembly + * macros, etc.) for this specific Xtensa processor's TIE extensions + * and options. It is customized to this Xtensa processor configuration. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1999-2008 Tensilica Inc. + */ + +#ifndef _XTENSA_CORE_TIE_ASM_H +#define _XTENSA_CORE_TIE_ASM_H + +/* Selection parameter values for save-area save/restore macros: */ +/* Option vs. TIE: */ +#define XTHAL_SAS_TIE 0x0001 /* custom extension or coprocessor */ +#define XTHAL_SAS_OPT 0x0002 /* optional (and not a coprocessor) */ +/* Whether used automatically by compiler: */ +#define XTHAL_SAS_NOCC 0x0004 /* not used by compiler w/o special opts/code */ +#define XTHAL_SAS_CC 0x0008 /* used by compiler without special opts/code */ +/* ABI handling across function calls: */ +#define XTHAL_SAS_CALR 0x0010 /* caller-saved */ +#define XTHAL_SAS_CALE 0x0020 /* callee-saved */ +#define XTHAL_SAS_GLOB 0x0040 /* global across function calls (in thread) */ +/* Misc */ +#define XTHAL_SAS_ALL 0xFFFF /* include all default NCP contents */ + + + +/* Macro to save all non-coprocessor (extra) custom TIE and optional state + * (not including zero-overhead loop registers). + * Save area ptr (clobbered): ptr (1 byte aligned) + * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed) + */ + .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL + xchal_sa_start \continue, \ofs + .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~\select + xchal_sa_align \ptr, 0, 1024-4, 4, 4 + rur \at1, THREADPTR // threadptr option + s32i \at1, \ptr, .Lxchal_ofs_ + 0 + .set .Lxchal_ofs_, .Lxchal_ofs_ + 4 + .endif + .endm // xchal_ncp_store + +/* Macro to save all non-coprocessor (extra) custom TIE and optional state + * (not including zero-overhead loop registers). + * Save area ptr (clobbered): ptr (1 byte aligned) + * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed) + */ + .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL + xchal_sa_start \continue, \ofs + .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~\select + xchal_sa_align \ptr, 0, 1024-4, 4, 4 + l32i \at1, \ptr, .Lxchal_ofs_ + 0 + wur \at1, THREADPTR // threadptr option + .set .Lxchal_ofs_, .Lxchal_ofs_ + 4 + .endif + .endm // xchal_ncp_load + + + +#define XCHAL_NCP_NUM_ATMPS 1 + + +#define XCHAL_SA_NUM_ATMPS 1 + +#endif /*_XTENSA_CORE_TIE_ASM_H*/ + diff --git a/include/asm-xtensa/variant-fsf/tie.h b/include/asm-xtensa/variant-fsf/tie.h index a73c716..bf40201 100644 --- a/include/asm-xtensa/variant-fsf/tie.h +++ b/include/asm-xtensa/variant-fsf/tie.h @@ -1,22 +1,77 @@ /* - * Xtensa processor core configuration information. + * This header file describes this specific Xtensa processor's TIE extensions + * that extend basic Xtensa core functionality. It is customized to this + * Xtensa processor configuration. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1999-2006 Tensilica Inc. + * Copyright (C) 1999-2007 Tensilica Inc. */ -#ifndef XTENSA_TIE_H -#define XTENSA_TIE_H - -/*---------------------------------------------------------------------- - COPROCESSORS and EXTRA STATE - ----------------------------------------------------------------------*/ +#ifndef _XTENSA_CORE_TIE_H +#define _XTENSA_CORE_TIE_H #define XCHAL_CP_NUM 0 /* number of coprocessors */ -#define XCHAL_CP_MASK 0x00 +#define XCHAL_CP_MAX 0 /* max CP ID + 1 (0 if none) */ +#define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */ +#define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */ + +/* Basic parameters of each coprocessor: */ +#define XCHAL_CP7_NAME "XTIOP" +#define XCHAL_CP7_IDENT XTIOP +#define XCHAL_CP7_SA_SIZE 0 /* size of state save area */ +#define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */ +#define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */ + +/* Filler info for unassigned coprocessors, to simplify arrays etc: */ +#define XCHAL_NCP_SA_SIZE 0 +#define XCHAL_NCP_SA_ALIGN 1 +#define XCHAL_CP0_SA_SIZE 0 +#define XCHAL_CP0_SA_ALIGN 1 +#define XCHAL_CP1_SA_SIZE 0 +#define XCHAL_CP1_SA_ALIGN 1 +#define XCHAL_CP2_SA_SIZE 0 +#define XCHAL_CP2_SA_ALIGN 1 +#define XCHAL_CP3_SA_SIZE 0 +#define XCHAL_CP3_SA_ALIGN 1 +#define XCHAL_CP4_SA_SIZE 0 +#define XCHAL_CP4_SA_ALIGN 1 +#define XCHAL_CP5_SA_SIZE 0 +#define XCHAL_CP5_SA_ALIGN 1 +#define XCHAL_CP6_SA_SIZE 0 +#define XCHAL_CP6_SA_ALIGN 1 + +/* Save area for non-coprocessor optional and custom (TIE) state: */ +#define XCHAL_NCP_SA_SIZE 0 +#define XCHAL_NCP_SA_ALIGN 1 + +/* Total save area for optional and custom state (NCP + CPn): */ +#define XCHAL_TOTAL_SA_SIZE 0 /* with 16-byte align padding */ +#define XCHAL_TOTAL_SA_ALIGN 1 /* actual minimum alignment */ + +#define XCHAL_NCP_SA_NUM 0 +#define XCHAL_NCP_SA_LIST(s) +#define XCHAL_CP0_SA_NUM 0 +#define XCHAL_CP0_SA_LIST(s) +#define XCHAL_CP1_SA_NUM 0 +#define XCHAL_CP1_SA_LIST(s) +#define XCHAL_CP2_SA_NUM 0 +#define XCHAL_CP2_SA_LIST(s) +#define XCHAL_CP3_SA_NUM 0 +#define XCHAL_CP3_SA_LIST(s) +#define XCHAL_CP4_SA_NUM 0 +#define XCHAL_CP4_SA_LIST(s) +#define XCHAL_CP5_SA_NUM 0 +#define XCHAL_CP5_SA_LIST(s) +#define XCHAL_CP6_SA_NUM 0 +#define XCHAL_CP6_SA_LIST(s) +#define XCHAL_CP7_SA_NUM 0 +#define XCHAL_CP7_SA_LIST(s) + +/* Byte length of instruction from its first nibble (op0 field), per FLIX. */ +#define XCHAL_OP0_FORMAT_LENGTHS 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3 -#endif /*XTENSA_CONFIG_TIE_H*/ +#endif /*_XTENSA_CORE_TIE_H*/