From: David Fries w1_reset_bus, added some comments about the timing and switched to msleep for the later delay. I don't have the hardware to test the sleep after reset change. The one wire doesn't have a timing requirement between commands so it is fine. I do have the USB hardware and it would be in big trouble with 10ms interrupt transfers to find that the reset completed. Signed-off-by: David Fries Signed-off-by: Evgeniy Polyakov Signed-off-by: Andrew Morton --- drivers/w1/w1_io.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff -puN drivers/w1/w1_io.c~w1-w1_ioc-reset-comments-and-msleep drivers/w1/w1_io.c --- a/drivers/w1/w1_io.c~w1-w1_ioc-reset-comments-and-msleep +++ a/drivers/w1/w1_io.c @@ -293,12 +293,24 @@ int w1_reset_bus(struct w1_master *dev) result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1; else { dev->bus_master->write_bit(dev->bus_master->data, 0); + /* minimum 480, max ? us + * be nice and sleep, except 18b20 spec lists 960us maximum, + * so until we can sleep with microsecond accuracy, spin. + * Feel free to come up with some other way to give up the + * cpu for such a short amount of time AND get it back in + * the maximum amount of time. + */ w1_delay(480); dev->bus_master->write_bit(dev->bus_master->data, 1); w1_delay(70); result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1; - w1_delay(410); + /* minmum 70 (above) + 410 = 480 us + * There aren't any timing requirements between a reset and + * the following transactions. Sleeping is safe here. + */ + /* w1_delay(410); min required time */ + msleep(1); } return result; _