Subject: Axon OCP support From: Shaun Wetzstein Add support for the OCP bus on Axon. Signed-off-by: Shaun Wetzstein Signed-off-by: Murali Iyer Signed-off-by: Arnd Bergmann Index: linus-2.6/arch/powerpc/sysdev/Makefile =================================================================== --- linus-2.6.orig/arch/powerpc/sysdev/Makefile 2006-04-21 20:31:05.000000000 +0200 +++ linus-2.6/arch/powerpc/sysdev/Makefile 2006-04-21 20:31:25.000000000 +0200 @@ -8,3 +8,5 @@ obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o obj-$(CONFIG_PPC_83xx) += ipic.o obj-$(CONFIG_FSL_SOC) += fsl_soc.o +obj-$(CONFIG_PPC_OCP) += ocp.o +obj-$(CONFIG_IBM_OCP) += ibm_ocp.o Index: linus-2.6/arch/powerpc/platforms/cell/Makefile =================================================================== --- linus-2.6.orig/arch/powerpc/platforms/cell/Makefile 2006-04-21 20:31:18.000000000 +0200 +++ linus-2.6/arch/powerpc/platforms/cell/Makefile 2006-04-21 20:31:25.000000000 +0200 @@ -12,3 +12,4 @@ spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o spu_base.o spu_priv1.o obj-y += $(spufs-builtin-y) $(spufs-builtin-m) +obj-$(CONFIG_PPC_OCP) += axon_ocp.o Index: linus-2.6/arch/powerpc/kernel/dma_64.c =================================================================== --- linus-2.6.orig/arch/powerpc/kernel/dma_64.c 2006-04-21 20:31:05.000000000 +0200 +++ linus-2.6/arch/powerpc/kernel/dma_64.c 2006-04-21 20:31:25.000000000 +0200 @@ -28,6 +28,11 @@ if (dev->bus == &ibmebus_bus_type) return &ibmebus_dma_ops; #endif +#ifdef CONFIG_PPC_OCP + extern struct bus_type ocp_bus_type; + if (dev->bus == &ocp_bus_type) + return &pci_dma_ops; +#endif return NULL; } Index: linus-2.6/arch/powerpc/Kconfig =================================================================== --- linus-2.6.orig/arch/powerpc/Kconfig 2006-04-21 20:31:18.000000000 +0200 +++ linus-2.6/arch/powerpc/Kconfig 2006-04-21 20:31:25.000000000 +0200 @@ -431,6 +431,11 @@ bool default y +config IBM_OCP + bool "IBM PowerPC On-chip Peripheral Bus" + select PPC_OCP + default y + config IBMVIO depends on PPC_PSERIES || PPC_ISERIES bool Index: linus-2.6/arch/powerpc/platforms/cell/setup.c =================================================================== --- linus-2.6.orig/arch/powerpc/platforms/cell/setup.c 2006-04-21 20:31:18.000000000 +0200 +++ linus-2.6/arch/powerpc/platforms/cell/setup.c 2006-04-21 20:31:57.000000000 +0200 @@ -49,10 +49,12 @@ #include #include #include +#include #include "interrupt.h" #include "iommu.h" #include "pervasive.h" +#include "axon_ocp.h" #ifdef DEBUG #define DBG(fmt...) udbg_printf(fmt) @@ -156,6 +158,8 @@ #endif mmio_nvram_init(); + + axon_ocp_init(); } /* Index: linus-2.6/arch/powerpc/platforms/cell/axon_ocp.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 +++ linus-2.6/arch/powerpc/platforms/cell/axon_ocp.c 2006-04-21 20:31:25.000000000 +0200 @@ -0,0 +1,178 @@ +/* + * arch/ppc/platforms/cell/axon_ocp.h + * + * AXON OCP definitions + * + * (C) Copyright IBM Corp. 2006 + * Shaun Wetzstein + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ +#include +#include + +#include +#include + +#include "axon_ocp.h" + +static struct ocp_func_emac_data axon_emac0_def = { + .rgmii_idx = 0, /* RGMII device index */ + .rgmii_mux = 0, /* RGMII input of this EMAC */ + .zmii_idx = -1, /* ZMII device index */ + .zmii_mux = -1, /* ZMII input of this EMAC */ + .phy_mode = PHY_MODE_RGMII, + .phy_map = 0x01ffffff, + .mal_idx = 0, /* MAL device index */ + .mal_rx_chan = 0, /* MAL rx channel number */ + .mal_tx_chan = 0, /* MAL tx channel number */ + .wol_irq = 61, /* WOL interrupt number */ + .mdio_idx = -1, /* No shared MDIO */ + .tah_idx = -1, /* TAH device index */ +}; + +#if 0 +static struct ocp_func_emac_data axon_emac1_def = { + .rgmii_idx = 0, /* RGMII device index */ + .rgmii_mux = 1, /* RGMII input of this EMAC */ + .zmii_idx = -1, /* ZMII device index */ + .zmii_mux = -1, /* ZMII input of this EMAC */ + .phy_mode = PHY_MODE_RGMII, + .phy_map = 0x01ffffff, + .mal_idx = 0, /* MAL device index */ + .mal_rx_chan = 1, /* MAL rx channel number */ + .mal_tx_chan = 1, /* MAL tx channel number */ + .wol_irq = 67, /* WOL interrupt number */ + .mdio_idx = -1, /* No shared MDIO */ + .tah_idx = -1, /* TAH device index */ +}; +#endif +OCP_SYSFS_EMAC_DATA() + +static struct ocp_func_mal_data axon_mal0_def = { + .num_tx_chans = 2, /* Number of TX channels */ + .num_rx_chans = 2, /* Number of RX channels */ + .txeob_irq = 57, /* TX End Of Buffer IRQ */ + .rxeob_irq = 58, /* RX End Of Buffer IRQ */ + .txde_irq = 33, /* TX Descriptor Error IRQ */ + .rxde_irq = 34, /* RX Descriptor Error IRQ */ + .serr_irq = 32, /* MAL System Error IRQ */ + .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ +}; +OCP_SYSFS_MAL_DATA() + +static struct ocp_func_iic_data axon_iic0_def = { + .fast_mode = 0, /* Use standad mode (100Khz) */ +}; +OCP_SYSFS_IIC_DATA() + +struct ocp_def core_ocp[] = { + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_OPB, + .index = 0, + .paddr = 0x0000014540000000ULL, + .irq = OCP_IRQ_NA, + .pm = OCP_CPM_NA, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_16550, + .index = 0, + .paddr = AXON_UART0_ADDR, + .irq = UART0_INT, + .pm = IBM_CPM_UART0, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_16550, + .index = 1, + .paddr = AXON_UART1_ADDR, + .irq = UART1_INT, + .pm = IBM_CPM_UART1, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_IIC, + .index = 0, + .paddr = 0x0000014540000400ULL, + .irq = 2, + .pm = IBM_CPM_IIC0, + .additions = &axon_iic0_def, + .show = &ocp_show_iic_data + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_GPIO, + .index = 0, + .paddr = 0x0000014540000700ULL, + .irq = OCP_IRQ_NA, + .pm = IBM_CPM_GPIO0, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_RGMII, + .paddr = 0x0000014540000780ULL, + .irq = OCP_IRQ_NA, + .pm = OCP_CPM_NA, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_MAL, + .paddr = OCP_PADDR_NA, + .irq = OCP_IRQ_NA, + .pm = OCP_CPM_NA, + .additions = &axon_mal0_def, + .show = &ocp_show_mal_data, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_EMAC, + .index = 0, + .paddr = 0x0000014540000800ULL, + .irq = 60, + .pm = OCP_CPM_NA, + .additions = &axon_emac0_def, + .show = &ocp_show_emac_data, + }, +#if 0 + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_EMAC, + .index = 1, + .paddr = 0x0000014540000900ULL, + .irq = 62, + .pm = OCP_CPM_NA, + .additions = &axon_emac1_def, + .show = &ocp_show_emac_data, + }, +#endif + { .vendor = OCP_VENDOR_INVALID + } +}; + +void axon_ocp_init(void) +{ + if (of_find_node_by_name(NULL,"opb") != NULL) { + struct device_node * node; + int i; + + ocp_early_init(); + + for (i = 0, node = of_find_node_by_name(NULL,"emac"); + node; + i++, node = of_find_node_by_name(node,"emac")) { + char * mac; + int sz; + + if ((mac = get_property(node, + "local-mac-address", + &sz)) != NULL) { + struct ocp_def *def; + struct ocp_func_emac_data *emacdata; + + def = ocp_get_one_device(OCP_VENDOR_IBM, + OCP_FUNC_EMAC, i); + if (def) { + emacdata = def->additions; + memcpy(emacdata->mac_addr, mac, sz); + } + } + } + } +} Index: linus-2.6/arch/powerpc/platforms/cell/axon_ocp.h =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 +++ linus-2.6/arch/powerpc/platforms/cell/axon_ocp.h 2006-04-21 20:31:25.000000000 +0200 @@ -0,0 +1,45 @@ +/* + * arch/ppc/platforms/cell/axon_ocp.h + * + * AXON OCP definitions + * + * (C) Copyright IBM Corp. 2006 + * Shaun Wetzstein + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifdef __KERNEL__ +#ifndef __PPC_PLATFORMS_OCP_H +#define __PPC_PLATFORMS_OCP_H + +#include + +#include + +#define AXON_UART0_ADDR 0x0000014540000200ULL +#define AXON_UART1_ADDR 0x0000014540000300ULL + +#define UART0_INT 0 +#define UART1_INT 1 + +#define IBM_CPM_UART0 0x00000200 /* serial port 0 */ +#define IBM_CPM_UART1 0x00000100 /* serial port 1 */ + +#define IBM_CPM_IIC0 0x80000000 /* IIC interface */ +#define IBM_CPM_IIC1 0x40000000 /* IIC interface */ + +#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */ + +#ifdef CONFIG_PPC_OCP +extern void axon_ocp_init(void); +#else +static inline void axon_ocp_init(void) {} +#endif + +#endif /* __PPC_PLATFORMS_OCP_H */ +#endif /* __KERNEL__ */