Subject: [FYI] Performance hacks for broken Cell CPU revisions

The currently used CPUs of the Cell BE DD2.0 release have
a few glitches that may result in bad performance, these
workarounds are suggested in the Errata:

 - When a decrementer or external exception occurs,
   wake up the other SMT thread from pause(0) state.
 - When a system reset exception occurs (i.e. the CPU
   wakes up from pause(0) state), do a quick check if
   we were meant to wake up, otherwise go back to
   pause(0) state.
 - change the default floating point exception mode
   to zero.

It is rather unlikely that we find a way to create
a patch that won't be harmful to any other platform,
so this is definitely not meant for inclusion in the
mainline kernel, but only provided for those people
that build a special kernel for Cell BE DD2.0.

Note that the functionality provided by this patch
is now disabled by default, so you need to rebuild
the kernel to get it back.

From: Jens Osterkamp <jens.osterkamp@de.ibm.com>
Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
---

Index: linux-2.6/arch/powerpc/kernel/head_64.S
===================================================================
--- linux-2.6.orig/arch/powerpc/kernel/head_64.S
+++ linux-2.6/arch/powerpc/kernel/head_64.S
@@ -328,6 +328,56 @@ label##_pSeries:					\
 	mtspr	SPRN_SPRG1,r13;		/* save r13 */	\
 	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
 
+#define WORKAROUND_EXCEPTION_PSERIES(n, label)				\
+	. = n;								\
+	.globl label##_pSeries;						\
+label##_pSeries:							\
+	HMT_MEDIUM;							\
+	mtspr	SPRN_SPRG1,r13;		/* save r13 */			\
+	mfspr	r13, SPRN_CTRLF;					\
+	oris	r13, r13, 0x00C0;					\
+	mtspr	SPRN_CTRLT, r13;					\
+	mfspr	r13,SPRN_SPRG3;		/* get paca address into r13 */	\
+	std	r9,PACA_EXGEN+EX_R9(r13);	/* save r9, r10 */	\
+	std	r10,PACA_EXGEN+EX_R10(r13);				\
+	lbz	r10,PACASOFTIRQEN(r13);					\
+	mfcr	r9;							\
+	cmpwi	r10,0;							\
+	beq	masked_interrupt;					\
+	mfspr	r10,SPRN_SPRG1;						\
+	std	r10,PACA_EXGEN+EX_R13(r13);				\
+	std	r11,PACA_EXGEN+EX_R11(r13);				\
+	std	r12,PACA_EXGEN+EX_R12(r13);				\
+	clrrdi	r12,r13,32;		/* get high part of &label */	\
+	mfmsr	r10;							\
+	mfspr	r11,SPRN_SRR0;		/* save SRR0 */			\
+	LOAD_HANDLER(r12,label##_common)				\
+	ori	r10,r10,MSR_IR|MSR_DR|MSR_RI;				\
+	mtspr	SPRN_SRR0,r12;						\
+	mfspr	r12,SPRN_SRR1;		/* and SRR1 */			\
+	mtspr	SPRN_SRR1,r10;						\
+	rfid;								\
+	b	.	/* prevent speculative execution */
+
+#define RES_EXCEPTION_PSERIES(n, label)				\
+	. = n;								\
+	.globl label##_pSeries;						\
+label##_pSeries:							\
+	mtspr   SPRN_SPRG2,r20;	/* use SPRG2 as scratch reg */		\
+	mtspr   SPRN_SPRG1,r21;	/* use SPRG1 as scratch reg */		\
+	mfspr   r20,SPRN_SPRG3;	/* get paca virtual address */		\
+	cmpdi   r20,0x0;                /* if SPRG3 zero,thread  */	\
+	bne     20f;			/* shouldn't run */		\
+18:					/* Stop current Thread */	\
+	andi.	 r21,0,0;						\
+	mtspr    SPRN_CTRLT,r21;					\
+19:									\
+	b	 19b;		 	/* Thread should be stopped */	\
+20:							\
+	HMT_MEDIUM;					\
+	mtspr	SPRN_SPRG1,r13;		/* save r13 */	\
+	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
+
 #define HSTD_EXCEPTION_PSERIES(n, label)		\
 	. = n;						\
 	.globl label##_pSeries;				\
@@ -484,7 +534,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
 	.globl __start_interrupts
 __start_interrupts:
 
+#ifdef CONFIG_BE_DD2
+	RES_EXCEPTION_PSERIES(0x100, system_reset)
+#else
 	STD_EXCEPTION_PSERIES(0x100, system_reset)
+#endif
 
 	. = 0x200
 _machine_check_pSeries:
@@ -559,11 +613,19 @@ instruction_access_slb_pSeries:
 	mfspr	r12,SPRN_SRR1		/* and SRR1 */
 	b	.slb_miss_realmode	/* Rel. branch works in real mode */
 
+#ifdef CONFIG_BE_DD2
+	WORKAROUND_EXCEPTION_PSERIES(0x500, hardware_interrupt)
+#else
 	MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt)
+#endif
 	STD_EXCEPTION_PSERIES(0x600, alignment)
 	STD_EXCEPTION_PSERIES(0x700, program_check)
 	STD_EXCEPTION_PSERIES(0x800, fp_unavailable)
+#ifdef CONFIG_BE_DD2
+	WORKAROUND_EXCEPTION_PSERIES(0x900, decrementer)
+#else
 	MASKABLE_EXCEPTION_PSERIES(0x900, decrementer)
+#endif
 	STD_EXCEPTION_PSERIES(0xa00, trap_0a)
 	STD_EXCEPTION_PSERIES(0xb00, trap_0b)
 
Index: linux-2.6/arch/powerpc/platforms/cell/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/cell/Kconfig
+++ linux-2.6/arch/powerpc/platforms/cell/Kconfig
@@ -1,6 +1,16 @@
 menu "Cell Broadband Engine options"
 	depends on PPC_CELL
 
+config BE_DD2
+	bool "CPU bug workarounds for Cell Broadband Engine DD2.0"
+	depends on PPC_CELL
+	help
+	  This enables workarounds that let version DD2.0 of the
+	  Cell BE processor run at faster speed. These can have
+	  negative effects when running on other Cell BE versions
+	  or may crash other CPUs.
+	  Say 'n' here unless you expect to run on DD2.0 only.
+
 config SPU_FS
 	tristate "SPU file system"
 	default m
Index: linux-2.6/arch/powerpc/configs/cell_defconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/configs/cell_defconfig
+++ linux-2.6/arch/powerpc/configs/cell_defconfig
@@ -157,6 +157,7 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 #
 # Cell Broadband Engine options
 #
+# CONFIG_BE_DD2 is not set
 CONFIG_SPU_FS=m
 CONFIG_SPU_BASE=y
 CONFIG_CBE_RAS=y