Index: linux-2.6.16-rc4/arch/ia64/kernel/ivt.S =================================================================== --- linux-2.6.16-rc4.orig/arch/ia64/kernel/ivt.S 2006-02-17 14:23:45.000000000 -0800 +++ linux-2.6.16-rc4/arch/ia64/kernel/ivt.S 2006-02-21 14:51:08.000000000 -0800 @@ -539,61 +539,19 @@ END(dkey_miss) // 0x2000 Entry 8 (size 64 bundles) Dirty-bit (54) ENTRY(dirty_bit) DBG_FAULT(8) + mov r16=cr.ifa + rsm psr.dt /* - * What we do here is to simply turn on the dirty bit in the PTE. We need to - * update both the page-table and the TLB entry. To efficiently access the PTE, - * we address it through the virtual page table. Most likely, the TLB entry for - * the relevant virtual page table page is still present in the TLB so we can - * normally do this without additional TLB misses. In case the necessary virtual - * page table TLB entry isn't present, we take a nested TLB miss hit where we look - * up the physical address of the L3 PTE and then continue at label 1 below. - */ - mov r16=cr.ifa // get the address that caused the fault - movl r30=1f // load continuation point in case of nested fault - ;; - thash r17=r16 // compute virtual address of L3 PTE - mov r29=b0 // save b0 in case of nested fault - mov r31=pr // save pr -#ifdef CONFIG_SMP - mov r28=ar.ccv // save ar.ccv - ;; -1: ld8 r18=[r17] - ;; // avoid RAW on r18 - mov ar.ccv=r18 // set compare value for cmpxchg - or r25=_PAGE_D|_PAGE_A,r18 // set the dirty and accessed bits - ;; - cmpxchg8.acq r26=[r17],r25,ar.ccv - mov r24=PAGE_SHIFT<<2 - ;; - cmp.eq p6,p7=r26,r18 - ;; -(p6) itc.d r25 // install updated PTE - ;; - /* - * Tell the assemblers dependency-violation checker that the above "itc" instructions - * cannot possibly affect the following loads: + * The Linux page fault handler doesn't expect non-present pages to be in + * the TLB. Flush the existing entry now, so we meet that expectation. */ - dv_serialize_data - - ld8 r18=[r17] // read PTE again - ;; - cmp.eq p6,p7=r18,r25 // is it same as the newly installed - ;; -(p7) ptc.l r16,r24 - mov b0=r29 // restore b0 - mov ar.ccv=r28 -#else + mov r17=PAGE_SHIFT<<2 ;; -1: ld8 r18=[r17] - ;; // avoid RAW on r18 - or r18=_PAGE_D|_PAGE_A,r18 // set the dirty and accessed bits - mov b0=r29 // restore b0 + ptc.l r16,r17 ;; - st8 [r17]=r18 // store back updated PTE - itc.d r18 // install updated PTE -#endif - mov pr=r31,-1 // restore pr - rfi + mov r31=pr + srlz.d + br.sptk.many page_fault END(dirty_bit) .org ia64_ivt+0x2400