Index: linux-2.6.18-mm3/arch/ia64/kernel/ivt.S
===================================================================
--- linux-2.6.18-mm3.orig/arch/ia64/kernel/ivt.S	2006-10-07 18:05:52.615960757 -0700
+++ linux-2.6.18-mm3/arch/ia64/kernel/ivt.S	2006-10-08 01:21:09.957035975 -0700
@@ -103,10 +103,8 @@ ENTRY(vhpt_miss)
 	 *	- the faulting virtual address has no valid page table mapping
 	 */
 	mov r16=cr.ifa				// get address that caused the TLB miss
-#ifdef CONFIG_HUGETLB_PAGE
 	movl r18=PAGE_SHIFT
 	mov r25=cr.itir
-#endif
 	;;
 	rsm psr.dt				// use physical addressing for data
 	mov r31=pr				// save the predicate registers
@@ -115,7 +113,6 @@ ENTRY(vhpt_miss)
 	shr.u r17=r16,61			// get the region number into r17
 	;;
 	shr.u r22=r21,3
-#ifdef CONFIG_HUGETLB_PAGE
 	extr.u r26=r25,2,6
 	;;
 	cmp.ne p8,p0=r18,r26
@@ -123,7 +120,6 @@ ENTRY(vhpt_miss)
 	;;
 (p8)	dep r25=r18,r25,2,6
 (p8)	shr r22=r22,r27
-#endif
 	;;
 	cmp.eq p6,p7=5,r17			// is IFA pointing into to region 5?
 	shr.u r18=r22,PGDIR_SHIFT		// get bottom portion of pgd index bit
@@ -181,9 +177,7 @@ ENTRY(vhpt_miss)
 (p6)	br.cond.spnt.many page_fault		// handle bad address/page not present (page fault)
 	mov cr.ifa=r22
 
-#ifdef CONFIG_HUGETLB_PAGE
 (p8)	mov cr.itir=r25				// change to default page-size for VHPT
-#endif
 
 	/*
 	 * Now compute and insert the TLB entry for the virtual page table.  We never
@@ -336,7 +330,6 @@ ENTRY(alt_itlb_miss)
 	movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
 	mov r31=pr
 	;;
-#ifdef CONFIG_DISABLE_VHPT
 	shr.u r22=r16,61			// get the region number into r21
 	;;
 	cmp.gt p8,p0=6,r22			// user mode
@@ -346,7 +339,6 @@ ENTRY(alt_itlb_miss)
 (p8)	mov cr.iha=r17
 (p8)	mov r29=b0				// save b0
 (p8)	br.cond.dptk .itlb_fault
-#endif
 	extr.u r23=r21,IA64_PSR_CPL0_BIT,2	// extract psr.cpl
 	and r19=r19,r16		// clear ed, reserved bits, and PTE control bits
 	shr.u r18=r16,57	// move address bit 61 to bit 4
@@ -375,7 +367,6 @@ ENTRY(alt_dtlb_miss)
 	mov r21=cr.ipsr
 	mov r31=pr
 	;;
-#ifdef CONFIG_DISABLE_VHPT
 	shr.u r22=r16,61			// get the region number into r21
 	;;
 	cmp.gt p8,p0=6,r22			// access to region 0-5
@@ -385,7 +376,6 @@ ENTRY(alt_dtlb_miss)
 (p8)	mov cr.iha=r17
 (p8)	mov r29=b0				// save b0
 (p8)	br.cond.dptk dtlb_fault
-#endif
 	extr.u r23=r21,IA64_PSR_CPL0_BIT,2	// extract psr.cpl
 	and r22=IA64_ISR_CODE_MASK,r20		// get the isr.code field
 	tbit.nz p6,p7=r20,IA64_ISR_SP_BIT	// is speculation bit on?