From jrm8005@gmail.com Wed Oct 29 11:06:04 2008 From: "J.R. Mauro" Date: Tue, 28 Oct 2008 18:42:02 -0400 Subject: Staging: sxg: remove typedefs To: Greg Kroah-Hartman Message-ID: <20081028224202.GC1267@localhost> Content-Disposition: inline Remove typedefs in the sxg driver Signed-off by: J.R. Mauro Signed-off-by: Greg Kroah-Hartman --- drivers/staging/sxg/sxg.c | 314 +++++++++++++++++++-------------------- drivers/staging/sxg/sxg.h | 121 +++++++-------- drivers/staging/sxg/sxg_os.h | 24 +- drivers/staging/sxg/sxgdbg.h | 15 - drivers/staging/sxg/sxghif.h | 139 ++++++++--------- drivers/staging/sxg/sxghw.h | 40 ++-- drivers/staging/sxg/sxgphycode.h | 2 7 files changed, 325 insertions(+), 330 deletions(-) --- a/drivers/staging/sxg/sxg.c +++ b/drivers/staging/sxg/sxg.c @@ -80,13 +80,13 @@ #include "sxgphycode.h" #include "saharadbgdownload.h" -static int sxg_allocate_buffer_memory(p_adapter_t adapter, u32 Size, - SXG_BUFFER_TYPE BufferType); -static void sxg_allocate_rcvblock_complete(p_adapter_t adapter, void *RcvBlock, +static int sxg_allocate_buffer_memory(struct adapter_t *adapter, u32 Size, + enum SXG_BUFFER_TYPE BufferType); +static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter, void *RcvBlock, dma_addr_t PhysicalAddress, u32 Length); -static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter, - PSXG_SCATTER_GATHER SxgSgl, +static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, + struct SXG_SCATTER_GATHER *SxgSgl, dma_addr_t PhysicalAddress, u32 Length); @@ -96,17 +96,17 @@ static int sxg_entry_open(p_net_device d static int sxg_entry_halt(p_net_device dev); static int sxg_ioctl(p_net_device dev, struct ifreq *rq, int cmd); static int sxg_send_packets(struct sk_buff *skb, p_net_device dev); -static int sxg_transmit_packet(p_adapter_t adapter, struct sk_buff *skb); -static void sxg_dumb_sgl(PSCATTER_GATHER_LIST pSgl, PSXG_SCATTER_GATHER SxgSgl); +static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb); +static void sxg_dumb_sgl(struct SCATTER_GATHER_LIST *pSgl, struct SXG_SCATTER_GATHER *SxgSgl); -static void sxg_handle_interrupt(p_adapter_t adapter); -static int sxg_process_isr(p_adapter_t adapter, u32 MessageId); -static u32 sxg_process_event_queue(p_adapter_t adapter, u32 RssId); -static void sxg_complete_slow_send(p_adapter_t adapter); -static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event); -static void sxg_process_rcv_error(p_adapter_t adapter, u32 ErrorStatus); -static bool sxg_mac_filter(p_adapter_t adapter, - p_ether_header EtherHdr, ushort length); +static void sxg_handle_interrupt(struct adapter_t *adapter); +static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId); +static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId); +static void sxg_complete_slow_send(struct adapter_t *adapter); +static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, struct SXG_EVENT *Event); +static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus); +static bool sxg_mac_filter(struct adapter_t *adapter, + struct ether_header *EtherHdr, ushort length); #if SLIC_GET_STATS_ENABLED static struct net_device_stats *sxg_get_stats(p_net_device dev); @@ -119,22 +119,22 @@ static int sxg_mac_set_address(p_net_dev static void sxg_mcast_set_list(p_net_device dev); #endif -static void sxg_adapter_set_hwaddr(p_adapter_t adapter); +static void sxg_adapter_set_hwaddr(struct adapter_t *adapter); -static void sxg_unmap_mmio_space(p_adapter_t adapter); +static void sxg_unmap_mmio_space(struct adapter_t *adapter); -static int sxg_initialize_adapter(p_adapter_t adapter); -static void sxg_stock_rcv_buffers(p_adapter_t adapter); -static void sxg_complete_descriptor_blocks(p_adapter_t adapter, +static int sxg_initialize_adapter(struct adapter_t *adapter); +static void sxg_stock_rcv_buffers(struct adapter_t *adapter); +static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, unsigned char Index); -static int sxg_initialize_link(p_adapter_t adapter); -static int sxg_phy_init(p_adapter_t adapter); -static void sxg_link_event(p_adapter_t adapter); -static SXG_LINK_STATE sxg_get_link_state(p_adapter_t adapter); -static void sxg_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState); -static int sxg_write_mdio_reg(p_adapter_t adapter, +static int sxg_initialize_link(struct adapter_t *adapter); +static int sxg_phy_init(struct adapter_t *adapter); +static void sxg_link_event(struct adapter_t *adapter); +static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter); +static void sxg_link_state(struct adapter_t *adapter, enum SXG_LINK_STATE LinkState); +static int sxg_write_mdio_reg(struct adapter_t *adapter, u32 DevAddr, u32 RegAddr, u32 Value); -static int sxg_read_mdio_reg(p_adapter_t adapter, +static int sxg_read_mdio_reg(struct adapter_t *adapter, u32 DevAddr, u32 RegAddr, u32 *pValue); static unsigned int sxg_first_init = 1; @@ -145,7 +145,7 @@ static int sxg_debug = 1; static int debug = -1; static p_net_device head_netdevice = NULL; -static sxgbase_driver_t sxg_global = { +static struct sxgbase_driver_t sxg_global = { .dynamic_intagg = 1, }; static int intagg_delay = 100; @@ -186,7 +186,7 @@ static inline void sxg_reg32_write(void mb(); } -static inline void sxg_reg64_write(p_adapter_t adapter, void __iomem *reg, +static inline void sxg_reg64_write(struct adapter_t *adapter, void __iomem *reg, u64 value, u32 cpu) { u32 value_high = (u32) (value >> 32); @@ -209,7 +209,7 @@ static void sxg_init_driver(void) } } -static void sxg_dbg_macaddrs(p_adapter_t adapter) +static void sxg_dbg_macaddrs(struct adapter_t *adapter) { DBG_ERROR(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", adapter->netdev->name, adapter->currmacaddr[0], @@ -225,12 +225,12 @@ static void sxg_dbg_macaddrs(p_adapter_t } /* SXG Globals */ -static SXG_DRIVER SxgDriver; +static struct SXG_DRIVER SxgDriver; #ifdef ATKDBG -static sxg_trace_buffer_t LSxgTraceBuffer; +static struct sxg_trace_buffer_t LSxgTraceBuffer; #endif /* ATKDBG */ -static sxg_trace_buffer_t *SxgTraceBuffer = NULL; +static struct sxg_trace_buffer_t *SxgTraceBuffer = NULL; /* * sxg_download_microcode @@ -244,9 +244,9 @@ static sxg_trace_buffer_t *SxgTraceBuffe * Return * int */ -static bool sxg_download_microcode(p_adapter_t adapter, SXG_UCODE_SEL UcodeSel) +static bool sxg_download_microcode(struct adapter_t *adapter, enum SXG_UCODE_SEL UcodeSel) { - PSXG_HW_REGS HwRegs = adapter->HwRegs; + struct SXG_HW_REGS *HwRegs = adapter->HwRegs; u32 Section; u32 ThisSectionSize; u32 *Instruction = NULL; @@ -416,13 +416,13 @@ static bool sxg_download_microcode(p_ada * Return * int */ -static int sxg_allocate_resources(p_adapter_t adapter) +static int sxg_allocate_resources(struct adapter_t *adapter) { int status; u32 i; u32 RssIds, IsrCount; -/* PSXG_XMT_RING XmtRing; */ -/* PSXG_RCV_RING RcvRing; */ +/* struct SXG_XMT_RING *XmtRing; */ +/* struct SXG_RCV_RING *RcvRing; */ DBG_ERROR("%s ENTER\n", __func__); @@ -461,13 +461,13 @@ static int sxg_allocate_resources(p_adap for (;;) { DBG_ERROR("%s Allocate XmtRings size[%x]\n", __func__, - (unsigned int)(sizeof(SXG_XMT_RING) * 1)); + (unsigned int)(sizeof(struct SXG_XMT_RING) * 1)); /* Start with big items first - receive and transmit rings. At the moment */ /* I'm going to keep the ring size fixed and adjust the number of */ /* TCBs if we fail. Later we might consider reducing the ring size as well.. */ adapter->XmtRings = pci_alloc_consistent(adapter->pcidev, - sizeof(SXG_XMT_RING) * + sizeof(struct SXG_XMT_RING) * 1, &adapter->PXmtRings); DBG_ERROR("%s XmtRings[%p]\n", __func__, adapter->XmtRings); @@ -475,33 +475,33 @@ static int sxg_allocate_resources(p_adap if (!adapter->XmtRings) { goto per_tcb_allocation_failed; } - memset(adapter->XmtRings, 0, sizeof(SXG_XMT_RING) * 1); + memset(adapter->XmtRings, 0, sizeof(struct SXG_XMT_RING) * 1); DBG_ERROR("%s Allocate RcvRings size[%x]\n", __func__, - (unsigned int)(sizeof(SXG_RCV_RING) * 1)); + (unsigned int)(sizeof(struct SXG_RCV_RING) * 1)); adapter->RcvRings = pci_alloc_consistent(adapter->pcidev, - sizeof(SXG_RCV_RING) * 1, + sizeof(struct SXG_RCV_RING) * 1, &adapter->PRcvRings); DBG_ERROR("%s RcvRings[%p]\n", __func__, adapter->RcvRings); if (!adapter->RcvRings) { goto per_tcb_allocation_failed; } - memset(adapter->RcvRings, 0, sizeof(SXG_RCV_RING) * 1); + memset(adapter->RcvRings, 0, sizeof(struct SXG_RCV_RING) * 1); break; per_tcb_allocation_failed: /* an allocation failed. Free any successful allocations. */ if (adapter->XmtRings) { pci_free_consistent(adapter->pcidev, - sizeof(SXG_XMT_RING) * 4096, + sizeof(struct SXG_XMT_RING) * 4096, adapter->XmtRings, adapter->PXmtRings); adapter->XmtRings = NULL; } if (adapter->RcvRings) { pci_free_consistent(adapter->pcidev, - sizeof(SXG_RCV_RING) * 4096, + sizeof(struct SXG_RCV_RING) * 4096, adapter->RcvRings, adapter->PRcvRings); adapter->RcvRings = NULL; @@ -517,7 +517,7 @@ static int sxg_allocate_resources(p_adap /* Sanity check receive data structure format */ ASSERT((adapter->ReceiveBufferSize == SXG_RCV_DATA_BUFFER_SIZE) || (adapter->ReceiveBufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); - ASSERT(sizeof(SXG_RCV_DESCRIPTOR_BLOCK) == + ASSERT(sizeof(struct SXG_RCV_DESCRIPTOR_BLOCK) == SXG_RCV_DESCRIPTOR_BLOCK_SIZE); /* Allocate receive data buffers. We allocate a block of buffers and */ @@ -539,11 +539,11 @@ static int sxg_allocate_resources(p_adap } DBG_ERROR("%s Allocate EventRings size[%x]\n", __func__, - (unsigned int)(sizeof(SXG_EVENT_RING) * RssIds)); + (unsigned int)(sizeof(struct SXG_EVENT_RING) * RssIds)); /* Allocate event queues. */ adapter->EventRings = pci_alloc_consistent(adapter->pcidev, - sizeof(SXG_EVENT_RING) * + sizeof(struct SXG_EVENT_RING) * RssIds, &adapter->PEventRings); @@ -554,7 +554,7 @@ static int sxg_allocate_resources(p_adap status = STATUS_RESOURCES; goto per_tcb_allocation_failed; } - memset(adapter->EventRings, 0, sizeof(SXG_EVENT_RING) * RssIds); + memset(adapter->EventRings, 0, sizeof(struct SXG_EVENT_RING) * RssIds); DBG_ERROR("%s Allocate ISR size[%x]\n", __func__, IsrCount); /* Allocate ISR */ @@ -628,7 +628,7 @@ static int sxg_entry_probe(struct pci_de static int did_version = 0; int err; struct net_device *netdev; - p_adapter_t adapter; + struct adapter_t *adapter; void __iomem *memmapped_ioaddr; u32 status = 0; ulong mmio_start = 0; @@ -681,7 +681,7 @@ static int sxg_entry_probe(struct pci_de pci_set_master(pcidev); DBG_ERROR("call alloc_etherdev\n"); - netdev = alloc_etherdev(sizeof(adapter_t)); + netdev = alloc_etherdev(sizeof(struct adapter_t)); if (!netdev) { err = -ENOMEM; goto err_out_exit_sxg_probe; @@ -871,7 +871,7 @@ static int sxg_entry_probe(struct pci_de * Return Value: * None. */ -static void sxg_disable_interrupt(p_adapter_t adapter) +static void sxg_disable_interrupt(struct adapter_t *adapter) { SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DisIntr", adapter, adapter->InterruptsEnabled, 0, 0); @@ -902,7 +902,7 @@ static void sxg_disable_interrupt(p_adap * Return Value: * None. */ -static void sxg_enable_interrupt(p_adapter_t adapter) +static void sxg_enable_interrupt(struct adapter_t *adapter) { SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "EnIntr", adapter, adapter->InterruptsEnabled, 0, 0); @@ -935,7 +935,7 @@ static void sxg_enable_interrupt(p_adapt static irqreturn_t sxg_isr(int irq, void *dev_id) { p_net_device dev = (p_net_device) dev_id; - p_adapter_t adapter = (p_adapter_t) netdev_priv(dev); + struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); /* u32 CpuMask = 0, i; */ adapter->Stats.NumInts++; @@ -963,8 +963,8 @@ static irqreturn_t sxg_isr(int irq, void for (i = 0; i < adapter->RssSystemInfo->ProcessorInfo.RssCpuCount; i++) { - PSXG_EVENT_RING EventRing = &adapter->EventRings[i]; - PSXG_EVENT Event = + struct XG_EVENT_RING *EventRing = &adapter->EventRings[i]; + struct SXG_EVENT *Event = &EventRing->Ring[adapter->NextEvent[i]]; unsigned char Cpu = adapter->RssSystemInfo->RssIdToCpu[i]; @@ -992,7 +992,7 @@ static irqreturn_t sxg_isr(int irq, void return IRQ_HANDLED; } -static void sxg_handle_interrupt(p_adapter_t adapter) +static void sxg_handle_interrupt(struct adapter_t *adapter) { /* unsigned char RssId = 0; */ u32 NewIsr; @@ -1056,7 +1056,7 @@ static void sxg_handle_interrupt(p_adapt * Return Value: * None */ -static int sxg_process_isr(p_adapter_t adapter, u32 MessageId) +static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId) { u32 Isr = adapter->IsrCopy[MessageId]; u32 NewIsr = 0; @@ -1153,10 +1153,10 @@ static int sxg_process_isr(p_adapter_t a * Return Value: * None. */ -static u32 sxg_process_event_queue(p_adapter_t adapter, u32 RssId) +static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId) { - PSXG_EVENT_RING EventRing = &adapter->EventRings[RssId]; - PSXG_EVENT Event = &EventRing->Ring[adapter->NextEvent[RssId]]; + struct SXG_EVENT_RING *EventRing = &adapter->EventRings[RssId]; + struct SXG_EVENT *Event = &EventRing->Ring[adapter->NextEvent[RssId]]; u32 EventsProcessed = 0, Batches = 0; u32 num_skbs = 0; struct sk_buff *skb; @@ -1164,7 +1164,7 @@ static u32 sxg_process_event_queue(p_ada struct sk_buff *prev_skb = NULL; struct sk_buff *IndicationList[SXG_RCV_ARRAYSIZE]; u32 Index; - PSXG_RCV_DATA_BUFFER_HDR RcvDataBufferHdr; + struct SXG_RCV_DATA_BUFFER_HDR *RcvDataBufferHdr; #endif u32 ReturnStatus = 0; @@ -1293,12 +1293,12 @@ static u32 sxg_process_event_queue(p_ada * Return * None */ -static void sxg_complete_slow_send(p_adapter_t adapter) +static void sxg_complete_slow_send(struct adapter_t *adapter) { - PSXG_XMT_RING XmtRing = &adapter->XmtRings[0]; - PSXG_RING_INFO XmtRingInfo = &adapter->XmtRingZeroInfo; + struct SXG_XMT_RING *XmtRing = &adapter->XmtRings[0]; + struct SXG_RING_INFO *XmtRingInfo = &adapter->XmtRingZeroInfo; u32 *ContextType; - PSXG_CMD XmtCmd; + struct SXG_CMD *XmtCmd; /* NOTE - This lock is dropped and regrabbed in this loop. */ /* This means two different processors can both be running */ @@ -1359,12 +1359,12 @@ static void sxg_complete_slow_send(p_ada * Return * skb */ -static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event) +static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, struct SXG_EVENT *Event) { - PSXG_RCV_DATA_BUFFER_HDR RcvDataBufferHdr; + struct SXG_RCV_DATA_BUFFER_HDR *RcvDataBufferHdr; struct sk_buff *Packet; - RcvDataBufferHdr = (PSXG_RCV_DATA_BUFFER_HDR) Event->HostHandle; + RcvDataBufferHdr = (struct SXG_RCV_DATA_BUFFER_HDR*) Event->HostHandle; ASSERT(RcvDataBufferHdr); ASSERT(RcvDataBufferHdr->State == SXG_BUFFER_ONCARD); ASSERT(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr) == @@ -1400,7 +1400,7 @@ static struct sk_buff *sxg_slow_receive( } #if XXXTODO /* VLAN stuff */ /* If there's a VLAN tag, extract it and validate it */ - if (((p_ether_header) (SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)))-> + if (((struct ether_header*) (SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)))-> EtherType == ETHERTYPE_VLAN) { if (SxgExtractVlanHeader(adapter, RcvDataBufferHdr, Event) != STATUS_SUCCESS) { @@ -1415,7 +1415,7 @@ static struct sk_buff *sxg_slow_receive( /* */ /* Dumb-nic frame. See if it passes our mac filter and update stats */ /* */ - if (!sxg_mac_filter(adapter, (p_ether_header) + if (!sxg_mac_filter(adapter, (struct ether_header*) SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), Event->Length)) { SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr", @@ -1456,7 +1456,7 @@ static struct sk_buff *sxg_slow_receive( * Return Value: * None */ -static void sxg_process_rcv_error(p_adapter_t adapter, u32 ErrorStatus) +static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus) { u32 Error; @@ -1535,7 +1535,7 @@ static void sxg_process_rcv_error(p_adap * Return Value: * TRUE if the frame is to be allowed */ -static bool sxg_mac_filter(p_adapter_t adapter, p_ether_header EtherHdr, +static bool sxg_mac_filter(struct adapter_t *adapter, struct ether_header *EtherHdr, ushort length) { bool EqualAddr; @@ -1560,7 +1560,7 @@ static bool sxg_mac_filter(p_adapter_t a return (TRUE); } if (adapter->MacFilter & MAC_MCAST) { - PSXG_MULTICAST_ADDRESS MulticastAddrs = + struct SXG_MULTICAST_ADDRESS *MulticastAddrs = adapter->MulticastAddrs; while (MulticastAddrs) { ETHER_EQ_ADDR(MulticastAddrs->Address, @@ -1600,7 +1600,7 @@ static bool sxg_mac_filter(p_adapter_t a return (FALSE); } -static int sxg_register_interrupt(p_adapter_t adapter) +static int sxg_register_interrupt(struct adapter_t *adapter) { if (!adapter->intrregistered) { int retval; @@ -1635,7 +1635,7 @@ static int sxg_register_interrupt(p_adap return (STATUS_SUCCESS); } -static void sxg_deregister_interrupt(p_adapter_t adapter) +static void sxg_deregister_interrupt(struct adapter_t *adapter) { DBG_ERROR("sxg: %s ENTER adapter[%p]\n", __func__, adapter); #if XXXTODO @@ -1661,7 +1661,7 @@ static void sxg_deregister_interrupt(p_a * Perform initialization of our slic interface. * */ -static int sxg_if_init(p_adapter_t adapter) +static int sxg_if_init(struct adapter_t *adapter) { p_net_device dev = adapter->netdev; int status = 0; @@ -1721,7 +1721,7 @@ static int sxg_if_init(p_adapter_t adapt static int sxg_entry_open(p_net_device dev) { - p_adapter_t adapter = (p_adapter_t) netdev_priv(dev); + struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); int status; ASSERT(adapter); @@ -1777,7 +1777,7 @@ static void __devexit sxg_entry_remove(s p_net_device dev = pci_get_drvdata(pcidev); u32 mmio_start = 0; unsigned int mmio_len = 0; - p_adapter_t adapter = (p_adapter_t) netdev_priv(dev); + struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); ASSERT(adapter); DBG_ERROR("sxg: %s ENTER dev[%p] adapter[%p]\n", __func__, dev, @@ -1805,7 +1805,7 @@ static void __devexit sxg_entry_remove(s static int sxg_entry_halt(p_net_device dev) { - p_adapter_t adapter = (p_adapter_t) netdev_priv(dev); + struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); DBG_ERROR("sxg: %s (%s) ENTER\n", __func__, dev->name); @@ -1830,7 +1830,7 @@ static int sxg_ioctl(p_net_device dev, s switch (cmd) { case SIOCSLICSETINTAGG: { -/* p_adapter_t adapter = (p_adapter_t) netdev_priv(dev); */ +/* struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); */ u32 data[7]; u32 intagg; @@ -1868,7 +1868,7 @@ static int sxg_ioctl(p_net_device dev, s */ static int sxg_send_packets(struct sk_buff *skb, p_net_device dev) { - p_adapter_t adapter = (p_adapter_t) netdev_priv(dev); + struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); u32 status = STATUS_SUCCESS; DBG_ERROR("sxg: %s ENTER sxg_send_packets skb[%p]\n", __func__, @@ -1934,10 +1934,10 @@ static int sxg_send_packets(struct sk_bu * Return - * STATUS of send */ -static int sxg_transmit_packet(p_adapter_t adapter, struct sk_buff *skb) +static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb) { - PSCATTER_GATHER_LIST pSgl; - PSXG_SCATTER_GATHER SxgSgl; + struct SCATTER_GATHER_LIST *pSgl; + struct SXG_SCATTER_GATHER *SxgSgl; void *SglBuffer; u32 SglBufferLength; @@ -1980,14 +1980,14 @@ static int sxg_transmit_packet(p_adapter * Return Value: * None. */ -static void sxg_dumb_sgl(PSCATTER_GATHER_LIST pSgl, PSXG_SCATTER_GATHER SxgSgl) +static void sxg_dumb_sgl(struct SCATTER_GATHER_LIST *pSgl, struct SXG_SCATTER_GATHER *SxgSgl) { - p_adapter_t adapter = SxgSgl->adapter; + struct adapter_t *adapter = SxgSgl->adapter; struct sk_buff *skb = SxgSgl->DumbPacket; /* For now, all dumb-nic sends go on RSS queue zero */ - PSXG_XMT_RING XmtRing = &adapter->XmtRings[0]; - PSXG_RING_INFO XmtRingInfo = &adapter->XmtRingZeroInfo; - PSXG_CMD XmtCmd = NULL; + struct SXG_XMT_RING *XmtRing = &adapter->XmtRings[0]; + struct SXG_RING_INFO *XmtRingInfo = &adapter->XmtRingZeroInfo; + struct SXG_CMD *XmtCmd = NULL; /* u32 Index = 0; */ u32 DataLength = skb->len; /* unsigned int BufLen; */ @@ -2117,9 +2117,9 @@ static void sxg_dumb_sgl(PSCATTER_GATHER * Return * status */ -static int sxg_initialize_link(p_adapter_t adapter) +static int sxg_initialize_link(struct adapter_t *adapter) { - PSXG_HW_REGS HwRegs = adapter->HwRegs; + struct SXG_HW_REGS *HwRegs = adapter->HwRegs; u32 Value; u32 ConfigData; u32 MaxFrame; @@ -2274,10 +2274,10 @@ static int sxg_initialize_link(p_adapter * Return * status */ -static int sxg_phy_init(p_adapter_t adapter) +static int sxg_phy_init(struct adapter_t *adapter) { u32 Value; - PPHY_UCODE p; + struct PHY_UCODE *p; int status; DBG_ERROR("ENTER %s\n", __func__); @@ -2322,10 +2322,10 @@ static int sxg_phy_init(p_adapter_t adap * Return * None */ -static void sxg_link_event(p_adapter_t adapter) +static void sxg_link_event(struct adapter_t *adapter) { - PSXG_HW_REGS HwRegs = adapter->HwRegs; - SXG_LINK_STATE LinkState; + struct SXG_HW_REGS *HwRegs = adapter->HwRegs; + enum SXG_LINK_STATE LinkState; int status; u32 Value; @@ -2379,7 +2379,7 @@ static void sxg_link_event(p_adapter_t a * Return * Link State */ -static SXG_LINK_STATE sxg_get_link_state(p_adapter_t adapter) +static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter) { int status; u32 Value; @@ -2433,8 +2433,8 @@ static SXG_LINK_STATE sxg_get_link_state return (SXG_LINK_DOWN); } -static void sxg_indicate_link_state(p_adapter_t adapter, - SXG_LINK_STATE LinkState) +static void sxg_indicate_link_state(struct adapter_t *adapter, + enum SXG_LINK_STATE LinkState) { if (adapter->LinkState == SXG_LINK_UP) { DBG_ERROR("%s: LINK now UP, call netif_start_queue\n", @@ -2460,7 +2460,7 @@ static void sxg_indicate_link_state(p_ad * Return * None */ -static void sxg_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState) +static void sxg_link_state(struct adapter_t *adapter, enum SXG_LINK_STATE LinkState) { SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "LnkINDCT", adapter, LinkState, adapter->LinkState, adapter->State); @@ -2498,10 +2498,10 @@ static void sxg_link_state(p_adapter_t a * Return * status */ -static int sxg_write_mdio_reg(p_adapter_t adapter, +static int sxg_write_mdio_reg(struct adapter_t *adapter, u32 DevAddr, u32 RegAddr, u32 Value) { - PSXG_HW_REGS HwRegs = adapter->HwRegs; + struct SXG_HW_REGS *HwRegs = adapter->HwRegs; u32 AddrOp; /* Address operation (written to MIIM field reg) */ u32 WriteOp; /* Write operation (written to MIIM field reg) */ u32 Cmd; /* Command (written to MIIM command reg) */ @@ -2588,10 +2588,10 @@ static int sxg_write_mdio_reg(p_adapter_ * Return * status */ -static int sxg_read_mdio_reg(p_adapter_t adapter, +static int sxg_read_mdio_reg(struct adapter_t *adapter, u32 DevAddr, u32 RegAddr, u32 *pValue) { - PSXG_HW_REGS HwRegs = adapter->HwRegs; + struct SXG_HW_REGS *HwRegs = adapter->HwRegs; u32 AddrOp; /* Address operation (written to MIIM field reg) */ u32 ReadOp; /* Read operation (written to MIIM field reg) */ u32 Cmd; /* Command (written to MIIM command reg) */ @@ -2735,9 +2735,9 @@ static unsigned char sxg_mcast_get_mac_h return (machash); } -static void sxg_mcast_set_mask(p_adapter_t adapter) +static void sxg_mcast_set_mask(struct adapter_t *adapter) { - PSXG_UCODE_REGS sxg_regs = adapter->UcodeRegs; + struct SXG_UCODE_REGS *sxg_regs = adapter->UcodeRegs; DBG_ERROR("%s ENTER (%s) macopts[%x] mask[%llx]\n", __func__, adapter->netdev->name, (unsigned int)adapter->MacFilter, @@ -2775,7 +2775,7 @@ static void sxg_mcast_set_mask(p_adapter * Allocate a mcast_address structure to hold the multicast address. * Link it in. */ -static int sxg_mcast_add_list(p_adapter_t adapter, char *address) +static int sxg_mcast_add_list(struct adapter_t *adapter, char *address) { p_mcast_address_t mcaddr, mlist; bool equaladdr; @@ -2803,7 +2803,7 @@ static int sxg_mcast_add_list(p_adapter_ return (STATUS_SUCCESS); } -static void sxg_mcast_set_bit(p_adapter_t adapter, char *address) +static void sxg_mcast_set_bit(struct adapter_t *adapter, char *address) { unsigned char crcpoly; @@ -2821,7 +2821,7 @@ static void sxg_mcast_set_bit(p_adapter_ static void sxg_mcast_set_list(p_net_device dev) { - p_adapter_t adapter = (p_adapter_t) netdev_priv(dev); + struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); int status = STATUS_SUCCESS; int i; char *addresses; @@ -2876,7 +2876,7 @@ static void sxg_mcast_set_list(p_net_dev } #endif -static void sxg_unmap_mmio_space(p_adapter_t adapter) +static void sxg_unmap_mmio_space(struct adapter_t *adapter) { #if LINUX_FREES_ADAPTER_RESOURCES /* if (adapter->Regs) { */ @@ -2896,7 +2896,7 @@ static void sxg_unmap_mmio_space(p_adapt * Return * none */ -void SxgFreeResources(p_adapter_t adapter) +void SxgFreeResources(struct adapter_t *adapter) { u32 RssIds, IsrCount; PTCP_OBJECT TcpObject; @@ -2924,7 +2924,7 @@ void SxgFreeResources(p_adapter_t adapte /* Free event queues. */ if (adapter->EventRings) { pci_free_consistent(adapter->pcidev, - sizeof(SXG_EVENT_RING) * RssIds, + sizeof(struct SXG_EVENT_RING) * RssIds, adapter->EventRings, adapter->PEventRings); } if (adapter->Isr) { @@ -2991,7 +2991,7 @@ void SxgFreeResources(p_adapter_t adapte * This routine is called when a memory allocation has completed. * * Arguments - - * p_adapter_t - Our adapter structure + * struct adapter_t * - Our adapter structure * VirtualAddress - Memory virtual address * PhysicalAddress - Memory physical address * Length - Length of memory allocated (or 0) @@ -3000,10 +3000,10 @@ void SxgFreeResources(p_adapter_t adapte * Return * None. */ -static void sxg_allocate_complete(p_adapter_t adapter, +static void sxg_allocate_complete(struct adapter_t *adapter, void *VirtualAddress, dma_addr_t PhysicalAddress, - u32 Length, SXG_BUFFER_TYPE Context) + u32 Length, enum SXG_BUFFER_TYPE Context) { SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp", adapter, VirtualAddress, Length, Context); @@ -3018,7 +3018,7 @@ static void sxg_allocate_complete(p_adap PhysicalAddress, Length); break; case SXG_BUFFER_TYPE_SGL: - sxg_allocate_sgl_buffer_complete(adapter, (PSXG_SCATTER_GATHER) + sxg_allocate_sgl_buffer_complete(adapter, (struct SXG_SCATTER_GATHER*) VirtualAddress, PhysicalAddress, Length); break; @@ -3039,8 +3039,8 @@ static void sxg_allocate_complete(p_adap * Return * int */ -static int sxg_allocate_buffer_memory(p_adapter_t adapter, - u32 Size, SXG_BUFFER_TYPE BufferType) +static int sxg_allocate_buffer_memory(struct adapter_t *adapter, + u32 Size, enum SXG_BUFFER_TYPE BufferType) { int status; void *Buffer; @@ -3091,7 +3091,7 @@ static int sxg_allocate_buffer_memory(p_ * Return * */ -static void sxg_allocate_rcvblock_complete(p_adapter_t adapter, +static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter, void *RcvBlock, dma_addr_t PhysicalAddress, u32 Length) @@ -3099,11 +3099,11 @@ static void sxg_allocate_rcvblock_comple u32 i; u32 BufferSize = adapter->ReceiveBufferSize; u64 Paddr; - PSXG_RCV_BLOCK_HDR RcvBlockHdr; + struct SXG_RCV_BLOCK_HDR *RcvBlockHdr; unsigned char *RcvDataBuffer; - PSXG_RCV_DATA_BUFFER_HDR RcvDataBufferHdr; - PSXG_RCV_DESCRIPTOR_BLOCK RcvDescriptorBlock; - PSXG_RCV_DESCRIPTOR_BLOCK_HDR RcvDescriptorBlockHdr; + struct SXG_RCV_DATA_BUFFER_HDR *RcvDataBufferHdr; + struct SXG_RCV_DESCRIPTOR_BLOCK *RcvDescriptorBlock; + struct SXG_RCV_DESCRIPTOR_BLOCK_HDR *RcvDescriptorBlockHdr; SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlRcvBlk", adapter, RcvBlock, Length, 0); @@ -3129,7 +3129,7 @@ static void sxg_allocate_rcvblock_comple i++, Paddr += BufferSize, RcvDataBuffer += BufferSize) { /* */ RcvDataBufferHdr = - (PSXG_RCV_DATA_BUFFER_HDR) (RcvDataBuffer + + (struct SXG_RCV_DATA_BUFFER_HDR*) (RcvDataBuffer + SXG_RCV_DATA_BUFFER_HDR_OFFSET (BufferSize)); RcvDataBufferHdr->VirtualAddress = RcvDataBuffer; @@ -3147,7 +3147,7 @@ static void sxg_allocate_rcvblock_comple /* Place this entire block of memory on the AllRcvBlocks queue so it can be */ /* free later */ RcvBlockHdr = - (PSXG_RCV_BLOCK_HDR) ((unsigned char *)RcvBlock + + (struct SXG_RCV_BLOCK_HDR*) ((unsigned char *)RcvBlock + SXG_RCV_BLOCK_HDR_OFFSET(BufferSize)); RcvBlockHdr->VirtualAddress = RcvBlock; RcvBlockHdr->PhysicalAddress = PhysicalAddress; @@ -3161,7 +3161,7 @@ static void sxg_allocate_rcvblock_comple for (i = 0, Paddr = PhysicalAddress; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; i++, Paddr += BufferSize, RcvDataBuffer += BufferSize) { - RcvDataBufferHdr = (PSXG_RCV_DATA_BUFFER_HDR) (RcvDataBuffer + + RcvDataBufferHdr = (struct SXG_RCV_DATA_BUFFER_HDR*) (RcvDataBuffer + SXG_RCV_DATA_BUFFER_HDR_OFFSET (BufferSize)); spin_lock(&adapter->RcvQLock); @@ -3171,11 +3171,11 @@ static void sxg_allocate_rcvblock_comple /* Locate the descriptor block and put it on a separate free queue */ RcvDescriptorBlock = - (PSXG_RCV_DESCRIPTOR_BLOCK) ((unsigned char *)RcvBlock + + (struct SXG_RCV_DESCRIPTOR_BLOCK*) ((unsigned char *)RcvBlock + SXG_RCV_DESCRIPTOR_BLOCK_OFFSET (BufferSize)); RcvDescriptorBlockHdr = - (PSXG_RCV_DESCRIPTOR_BLOCK_HDR) ((unsigned char *)RcvBlock + + (struct SXG_RCV_DESCRIPTOR_BLOCK_HDR*) ((unsigned char *)RcvBlock + SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET (BufferSize)); RcvDescriptorBlockHdr->VirtualAddress = RcvDescriptorBlock; @@ -3193,7 +3193,7 @@ static void sxg_allocate_rcvblock_comple for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; i++, RcvDataBuffer += BufferSize) { RcvDataBufferHdr = - (PSXG_RCV_DATA_BUFFER_HDR) (RcvDataBuffer + + (struct SXG_RCV_DATA_BUFFER_HDR*) (RcvDataBuffer + SXG_RCV_DATA_BUFFER_HDR_OFFSET (BufferSize)); SXG_FREE_RCV_PACKET(RcvDataBufferHdr); @@ -3220,8 +3220,8 @@ static void sxg_allocate_rcvblock_comple * Return * */ -static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter, - PSXG_SCATTER_GATHER SxgSgl, +static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, + struct SXG_SCATTER_GATHER *SxgSgl, dma_addr_t PhysicalAddress, u32 Length) { @@ -3229,7 +3229,7 @@ static void sxg_allocate_sgl_buffer_comp adapter, SxgSgl, Length, 0); spin_lock(&adapter->SglQLock); adapter->AllSglBufferCount++; - memset(SxgSgl, 0, sizeof(SXG_SCATTER_GATHER)); + memset(SxgSgl, 0, sizeof(struct SXG_SCATTER_GATHER*)); SxgSgl->PhysicalAddress = PhysicalAddress; /* *PhysicalAddress; */ SxgSgl->adapter = adapter; /* Initialize backpointer once */ InsertTailList(&adapter->AllSglBuffers, &SxgSgl->AllList); @@ -3243,14 +3243,14 @@ static void sxg_allocate_sgl_buffer_comp static unsigned char temp_mac_address[6] = { 0x00, 0xab, 0xcd, 0xef, 0x12, 0x69 }; -static void sxg_adapter_set_hwaddr(p_adapter_t adapter) +static void sxg_adapter_set_hwaddr(struct adapter_t *adapter) { /* DBG_ERROR ("%s ENTER card->config_set[%x] port[%d] physport[%d] funct#[%d]\n", __func__, */ /* card->config_set, adapter->port, adapter->physport, adapter->functionnumber); */ /* */ /* sxg_dbg_macaddrs(adapter); */ - memcpy(adapter->macaddr, temp_mac_address, sizeof(SXG_CONFIG_MAC)); + memcpy(adapter->macaddr, temp_mac_address, sizeof(struct SXG_CONFIG_MAC)); /* DBG_ERROR ("%s AFTER copying from config.macinfo into currmacaddr\n", __func__); */ /* sxg_dbg_macaddrs(adapter); */ if (!(adapter->currmacaddr[0] || @@ -3271,7 +3271,7 @@ static void sxg_adapter_set_hwaddr(p_ada #if XXXTODO static int sxg_mac_set_address(p_net_device dev, void *ptr) { - p_adapter_t adapter = (p_adapter_t) netdev_priv(dev); + struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); struct sockaddr *addr = ptr; DBG_ERROR("%s ENTER (%s)\n", __func__, adapter->netdev->name); @@ -3313,7 +3313,7 @@ static int sxg_mac_set_address(p_net_dev * Return * int */ -static int sxg_initialize_adapter(p_adapter_t adapter) +static int sxg_initialize_adapter(struct adapter_t *adapter) { u32 RssIds, IsrCount; u32 i; @@ -3327,7 +3327,7 @@ static int sxg_initialize_adapter(p_adap /* Sanity check SXG_UCODE_REGS structure definition to */ /* make sure the length is correct */ - ASSERT(sizeof(SXG_UCODE_REGS) == SXG_REGISTER_SIZE_PER_CPU); + ASSERT(sizeof(struct SXG_UCODE_REGS) == SXG_REGISTER_SIZE_PER_CPU); /* Disable interrupts */ SXG_DISABLE_ALL_INTERRUPTS(adapter); @@ -3412,16 +3412,16 @@ static int sxg_initialize_adapter(p_adap * Return * status */ -static int sxg_fill_descriptor_block(p_adapter_t adapter, - PSXG_RCV_DESCRIPTOR_BLOCK_HDR - RcvDescriptorBlockHdr) +static int sxg_fill_descriptor_block(struct adapter_t *adapter, + struct SXG_RCV_DESCRIPTOR_BLOCK_HDR + *RcvDescriptorBlockHdr) { u32 i; - PSXG_RING_INFO RcvRingInfo = &adapter->RcvRingZeroInfo; - PSXG_RCV_DATA_BUFFER_HDR RcvDataBufferHdr; - PSXG_RCV_DESCRIPTOR_BLOCK RcvDescriptorBlock; - PSXG_CMD RingDescriptorCmd; - PSXG_RCV_RING RingZero = &adapter->RcvRings[0]; + struct SXG_RING_INFO *RcvRingInfo = &adapter->RcvRingZeroInfo; + struct SXG_RCV_DATA_BUFFER_HDR *RcvDataBufferHdr; + struct SXG_RCV_DESCRIPTOR_BLOCK *RcvDescriptorBlock; + struct SXG_CMD *RingDescriptorCmd; + struct SXG_RCV_RING *RingZero = &adapter->RcvRings[0]; SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FilBlk", adapter, adapter->RcvBuffersOnCard, @@ -3442,7 +3442,7 @@ static int sxg_fill_descriptor_block(p_a ASSERT(RingDescriptorCmd); RcvDescriptorBlockHdr->State = SXG_BUFFER_ONCARD; RcvDescriptorBlock = - (PSXG_RCV_DESCRIPTOR_BLOCK) RcvDescriptorBlockHdr->VirtualAddress; + (struct SXG_RCV_DESCRIPTOR_BLOCK*) RcvDescriptorBlockHdr->VirtualAddress; /* Fill in the descriptor block */ for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; i++) { @@ -3484,9 +3484,9 @@ static int sxg_fill_descriptor_block(p_a * Return * None */ -static void sxg_stock_rcv_buffers(p_adapter_t adapter) +static void sxg_stock_rcv_buffers(struct adapter_t *adapter) { - PSXG_RCV_DESCRIPTOR_BLOCK_HDR RcvDescriptorBlockHdr; + struct SXG_RCV_DESCRIPTOR_BLOCK_HDR *RcvDescriptorBlockHdr; SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "StockBuf", adapter, adapter->RcvBuffersOnCard, @@ -3506,14 +3506,14 @@ static void sxg_stock_rcv_buffers(p_adap /* Now grab the RcvQLock lock and proceed */ spin_lock(&adapter->RcvQLock); while (adapter->RcvBuffersOnCard < SXG_RCV_DATA_BUFFERS) { - PLIST_ENTRY _ple; + struct LIST_ENTRY *_ple; /* Get a descriptor block */ RcvDescriptorBlockHdr = NULL; if (adapter->FreeRcvBlockCount) { _ple = RemoveHeadList(&adapter->FreeRcvBlocks); RcvDescriptorBlockHdr = - container_of(_ple, SXG_RCV_DESCRIPTOR_BLOCK_HDR, + container_of(_ple, struct SXG_RCV_DESCRIPTOR_BLOCK_HDR, FreeList); adapter->FreeRcvBlockCount--; RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY; @@ -3550,13 +3550,13 @@ static void sxg_stock_rcv_buffers(p_adap * Return * None */ -static void sxg_complete_descriptor_blocks(p_adapter_t adapter, +static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, unsigned char Index) { - PSXG_RCV_RING RingZero = &adapter->RcvRings[0]; - PSXG_RING_INFO RcvRingInfo = &adapter->RcvRingZeroInfo; - PSXG_RCV_DESCRIPTOR_BLOCK_HDR RcvDescriptorBlockHdr; - PSXG_CMD RingDescriptorCmd; + struct SXG_RCV_RING *RingZero = &adapter->RcvRings[0]; + struct SXG_RING_INFO *RcvRingInfo = &adapter->RcvRingZeroInfo; + struct SXG_RCV_DESCRIPTOR_BLOCK_HDR *RcvDescriptorBlockHdr; + struct SXG_CMD *RingDescriptorCmd; SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlks", adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); --- a/drivers/staging/sxg/sxgdbg.h +++ b/drivers/staging/sxg/sxgdbg.h @@ -86,7 +86,7 @@ extern ulong ATKTimerDiv; * needs of the trace entry. Typically they are function call * parameters. */ -typedef struct _trace_entry_s { +struct trace_entry_t { char name[8]; /* 8 character name - like 's'i'm'b'a'r'c'v' */ u32 time; /* Current clock tic */ unsigned char cpu; /* Current CPU */ @@ -97,7 +97,7 @@ typedef struct _trace_entry_s { u32 arg2; /* Caller arg2 */ u32 arg3; /* Caller arg3 */ u32 arg4; /* Caller arg4 */ -} trace_entry_t, *ptrace_entry_t; +}; /* * Driver types for driver field in trace_entry_t @@ -108,14 +108,13 @@ typedef struct _trace_entry_s { #define TRACE_ENTRIES 1024 -typedef struct _sxg_trace_buffer_t -{ +struct sxg_trace_buffer_t { unsigned int size; /* aid for windbg extension */ unsigned int in; /* Where to add */ unsigned int level; /* Current Trace level */ spinlock_t lock; /* For MP tracing */ - trace_entry_t entries[TRACE_ENTRIES];/* The circular buffer */ -} sxg_trace_buffer_t; + struct trace_entry_t entries[TRACE_ENTRIES];/* The circular buffer */ +}; /* * The trace levels @@ -137,7 +136,7 @@ typedef struct _sxg_trace_buffer_t #if ATK_TRACE_ENABLED #define SXG_TRACE_INIT(buffer, tlevel) \ { \ - memset((buffer), 0, sizeof(sxg_trace_buffer_t)); \ + memset((buffer), 0, sizeof(struct sxg_trace_buffer_t)); \ (buffer)->level = (tlevel); \ (buffer)->size = TRACE_ENTRIES; \ spin_lock_init(&(buffer)->lock); \ @@ -154,7 +153,7 @@ typedef struct _sxg_trace_buffer_t if ((buffer) && ((buffer)->level >= (tlevel))) { \ unsigned int trace_irql = 0; /* ?????? FIX THIS */ \ unsigned int trace_len; \ - ptrace_entry_t trace_entry; \ + struct trace_entry_t *trace_entry; \ struct timeval timev; \ \ spin_lock(&(buffer)->lock); \ --- a/drivers/staging/sxg/sxg.h +++ b/drivers/staging/sxg/sxg.h @@ -45,7 +45,7 @@ #define p_net_device struct net_device * // SXG_STATS - Probably move these to someplace where // the slicstat (sxgstat?) program can get them. -typedef struct _SXG_STATS { +struct SXG_STATS { // Xmt u32 XmtNBL; // Offload send NBL count u64 DumbXmtBytes; // Dumbnic send bytes @@ -109,7 +109,7 @@ typedef struct _SXG_STATS { u64 LinkCrc; // SXG_RCV_STATUS_LINK_CRC: u64 LinkOflow; // SXG_RCV_STATUS_LINK_OFLOW: u64 LinkUflow; // SXG_RCV_STATUS_LINK_UFLOW: -} SXG_STATS, *PSXG_STATS; +}; /**************************************************************************** @@ -215,12 +215,12 @@ typedef struct _SXG_STATS { /////////////////////////////////////////////////////////////////////////////// // NOTE - Lock must be held with RCV macros #define SXG_GET_RCV_DATA_BUFFER(_pAdapt, _Hdr) { \ - PLIST_ENTRY _ple; \ + struct LIST_ENTRY *_ple; \ _Hdr = NULL; \ if((_pAdapt)->FreeRcvBufferCount) { \ ASSERT(!(IsListEmpty(&(_pAdapt)->FreeRcvBuffers))); \ _ple = RemoveHeadList(&(_pAdapt)->FreeRcvBuffers); \ - (_Hdr) = container_of(_ple, SXG_RCV_DATA_BUFFER_HDR, FreeList); \ + (_Hdr) = container_of(_ple, struct SXG_RCV_DATA_BUFFER_HDR, FreeList); \ (_pAdapt)->FreeRcvBufferCount--; \ ASSERT((_Hdr)->State == SXG_BUFFER_FREE); \ } \ @@ -263,12 +263,12 @@ typedef struct _SXG_STATS { // until after that. We're dealing with round numbers here, so we don't need to, // and not grabbing it avoids a possible double-trip. #define SXG_GET_SGL_BUFFER(_pAdapt, _Sgl) { \ - PLIST_ENTRY _ple; \ + struct LIST_ENTRY *_ple; \ if ((_pAdapt->FreeSglBufferCount < SXG_MIN_SGL_BUFFERS) && \ (_pAdapt->AllSglBufferCount < SXG_MAX_SGL_BUFFERS) && \ (_pAdapt->AllocationsPending == 0)) { \ sxg_allocate_buffer_memory(_pAdapt, \ - (sizeof(SXG_SCATTER_GATHER) + SXG_SGL_BUF_SIZE),\ + (sizeof(struct SXG_SCATTER_GATHER) + SXG_SGL_BUF_SIZE),\ SXG_BUFFER_TYPE_SGL); \ } \ _Sgl = NULL; \ @@ -276,7 +276,7 @@ typedef struct _SXG_STATS { if((_pAdapt)->FreeSglBufferCount) { \ ASSERT(!(IsListEmpty(&(_pAdapt)->FreeSglBuffers))); \ _ple = RemoveHeadList(&(_pAdapt)->FreeSglBuffers); \ - (_Sgl) = container_of(_ple, SXG_SCATTER_GATHER, FreeList); \ + (_Sgl) = container_of(_ple, struct SXG_SCATTER_GATHER, FreeList); \ (_pAdapt)->FreeSglBufferCount--; \ ASSERT((_Sgl)->State == SXG_BUFFER_FREE); \ (_Sgl)->State = SXG_BUFFER_BUSY; \ @@ -289,17 +289,17 @@ typedef struct _SXG_STATS { // SXG_MULTICAST_ADDRESS // // Linked list of multicast addresses. -typedef struct _SXG_MULTICAST_ADDRESS { +struct SXG_MULTICAST_ADDRESS { unsigned char Address[6]; - struct _SXG_MULTICAST_ADDRESS *Next; -} SXG_MULTICAST_ADDRESS, *PSXG_MULTICAST_ADDRESS; + struct SXG_MULTICAST_ADDRESS *Next; +}; // Structure to maintain chimney send and receive buffer queues. // This structure maintains NET_BUFFER_LIST queues that are // given to us via the Chimney MiniportTcpOffloadSend and // MiniportTcpOffloadReceive routines. This structure DOES NOT // manage our data buffer queue -typedef struct _SXG_BUFFER_QUEUE { +struct SXG_BUFFER_QUEUE { u32 Type; // Slow or fast - See below u32 Direction; // Xmt or Rcv u32 Bytes; // Byte count @@ -307,7 +307,7 @@ typedef struct _SXG_BUFFER_QUEUE { u32 * Tail; // Send queue tail // PNET_BUFFER_LIST NextNBL; // Short cut - next NBL // PNET_BUFFER NextNB; // Short cut - next NB -} SXG_BUFFER_QUEUE, *PSXG_BUFFER_QUEUE; +}; #define SXG_SLOW_SEND_BUFFER 0 #define SXG_FAST_SEND_BUFFER 1 @@ -335,7 +335,7 @@ typedef struct _SXG_BUFFER_QUEUE { // Adapter states - These states closely match the adapter states // documented in the DDK (with a few exceptions). -typedef enum _SXG_STATE { +enum SXG_STATE { SXG_STATE_INITIALIZING, // Initializing SXG_STATE_BOOTDIAG, // Boot-Diagnostic mode SXG_STATE_PAUSING, // Pausing @@ -347,24 +347,24 @@ typedef enum _SXG_STATE { SXG_STATE_HALTING, // Halting SXG_STATE_HALTED, // Down or not-initialized SXG_STATE_SHUTDOWN // shutdown -} SXG_STATE, *PSXG_STATE; +}; // Link state -typedef enum _SXG_LINK_STATE { +enum SXG_LINK_STATE { SXG_LINK_DOWN, SXG_LINK_UP -} SXG_LINK_STATE, *PSXG_LINK_STATE; +}; // Link initialization timeout in 100us units #define SXG_LINK_TIMEOUT 100000 // 10 Seconds - REDUCE! // Microcode file selection codes -typedef enum _SXG_UCODE_SEL { +enum SXG_UCODE_SEL { SXG_UCODE_SAHARA, // Sahara ucode SXG_UCODE_SDIAGCPU, // Sahara CPU diagnostic ucode SXG_UCODE_SDIAGSYS // Sahara system diagnostic ucode -} SXG_UCODE_SEL; +}; #define SXG_DISABLE_ALL_INTERRUPTS(_padapt) sxg_disable_interrupt(_padapt) @@ -384,10 +384,10 @@ typedef enum _SXG_UCODE_SEL { // // contains information about the sxg driver. There is only // one of these, and it is defined as a global. -typedef struct _SXG_DRIVER { - struct _adapter_t *Adapters; // Linked list of adapters +struct SXG_DRIVER { + struct adapter_t *Adapters; // Linked list of adapters ushort AdapterID; // Maintain unique adapter ID -} SXG_DRIVER, *PSXG_DRIVER; +}; #ifdef STATUS_SUCCESS #undef STATUS_SUCCESS @@ -416,11 +416,10 @@ typedef struct _SXG_DRIVER { #define MIN(a, b) ((u32)(a) < (u32)(b) ? (a) : (b)) #define MAX(a, b) ((u32)(a) > (u32)(b) ? (a) : (b)) -typedef struct _mcast_address_t -{ +struct mcast_address_t { unsigned char address[6]; - struct _mcast_address_t *next; -} mcast_address_t, *p_mcast_address_t; + struct mcast_address_t *next; +}; #define CARD_DOWN 0x00000000 #define CARD_UP 0x00000001 @@ -472,41 +471,37 @@ typedef struct _mcast_address_t #define SLIC_CARD_STATE(x) ((x==CARD_UP) ? "UP" : "Down") -typedef struct _ether_header -{ +struct ether_header { unsigned char ether_dhost[6]; unsigned char ether_shost[6]; ushort ether_type; -} ether_header, *p_ether_header; +}; #define NUM_CFG_SPACES 2 #define NUM_CFG_REGS 64 -typedef struct _physcard_t -{ - struct _adapter_t *adapter[SLIC_MAX_PORTS]; - struct _physcard_t *next; +struct physcard_t { + struct adapter_t *adapter[SLIC_MAX_PORTS]; + struct physcard_t *next; unsigned int adapters_allocd; -} physcard_t, *p_physcard_t; +}; -typedef struct _sxgbase_driver -{ +struct sxgbase_driver_t { spinlock_t driver_lock; unsigned long flags; /* irqsave for spinlock */ u32 num_sxg_cards; u32 num_sxg_ports; u32 num_sxg_ports_active; u32 dynamic_intagg; - p_physcard_t phys_card; -} sxgbase_driver_t; + struct physcard_t *phys_card; +}; -typedef struct _adapter_t -{ +struct adapter_t { void * ifp; unsigned int port; - p_physcard_t physcard; + struct physcard_t *physcard; unsigned int physport; unsigned int cardindex; unsigned int card_size; @@ -544,7 +539,7 @@ typedef struct _adapter_t u32 macopts; ushort devflags_prev; u64 mcastmask; - p_mcast_address_t mcastaddrs; + struct mcast_address_t *mcastaddrs; struct timer_list pingtimer; u32 pingtimerset; struct timer_list statstimer; @@ -580,11 +575,11 @@ typedef struct _adapter_t u32 intagg_period; struct net_device_stats stats; u32 * MiniportHandle; // Our miniport handle - SXG_STATE State; // Adapter state - SXG_LINK_STATE LinkState; // Link state + enum SXG_STATE State; // Adapter state + enum SXG_LINK_STATE LinkState; // Link state u64 LinkSpeed; // Link Speed u32 PowerState; // NDIS power state - struct _adapter_t *Next; // Linked list + struct adapter_t *Next; // Linked list ushort AdapterID; // 1..n unsigned char MacAddr[6]; // Our permanent HW mac address unsigned char CurrMacAddr[6]; // Our Current mac address @@ -592,16 +587,16 @@ typedef struct _adapter_t p_net_device next_netdevice; struct pci_dev * pcidev; - PSXG_MULTICAST_ADDRESS MulticastAddrs; // Multicast list + struct SXG_MULTICAST_ADDRESS *MulticastAddrs; // Multicast list u64 MulticastMask; // Multicast mask u32 * InterruptHandle; // Register Interrupt handle u32 InterruptLevel; // From Resource list u32 InterruptVector; // From Resource list spinlock_t AdapterLock; /* Serialize access adapter routines */ spinlock_t Bit64RegLock; /* For writing 64-bit addresses */ - PSXG_HW_REGS HwRegs; // Sahara HW Register Memory (BAR0/1) - PSXG_UCODE_REGS UcodeRegs; // Microcode Register Memory (BAR2/3) - PSXG_TCB_REGS TcbRegs; // Same as Ucode regs - See sxghw.h + struct SXG_HW_REGS *HwRegs; // Sahara HW Register Memory (BAR0/1) + struct SXG_UCODE_REGS *UcodeRegs; // Microcode Register Memory (BAR2/3) + struct SXG_TCB_REGS *TcbRegs; // Same as Ucode regs - See sxghw.h ushort ResetDpcCount; // For timeout ushort RssDpcCount; // For timeout ushort VendorID; // Vendor ID @@ -613,25 +608,25 @@ typedef struct _adapter_t u32 * BufferPoolHandle; // Used with NDIS 5.2 only. Don't ifdef out u32 MacFilter; // NDIS MAC Filter ushort IpId; // For slowpath - PSXG_EVENT_RING EventRings; // Host event rings. 1/CPU to 16 max + struct SXG_EVENT_RING *EventRings; // Host event rings. 1/CPU to 16 max dma_addr_t PEventRings; // Physical address u32 NextEvent[SXG_MAX_RSS]; // Current location in ring dma_addr_t PTcbBuffers; // TCB Buffers - physical address dma_addr_t PTcbCompBuffers; // TCB Composite Buffers - phys addr - PSXG_XMT_RING XmtRings; // Transmit rings + struct SXG_XMT_RING *XmtRings; // Transmit rings dma_addr_t PXmtRings; // Transmit rings - physical address - SXG_RING_INFO XmtRingZeroInfo; // Transmit ring 0 info + struct SXG_RING_INFO XmtRingZeroInfo; // Transmit ring 0 info spinlock_t XmtZeroLock; /* Transmit ring 0 lock */ u32 * XmtRingZeroIndex; // Shared XMT ring 0 index dma_addr_t PXmtRingZeroIndex; // Shared XMT ring 0 index - physical - LIST_ENTRY FreeProtocolHeaders;// Free protocol headers + struct LIST_ENTRY FreeProtocolHeaders;// Free protocol headers u32 FreeProtoHdrCount; // Count void * ProtocolHeaders; // Block of protocol header dma_addr_t PProtocolHeaders; // Block of protocol headers - phys - PSXG_RCV_RING RcvRings; // Receive rings + struct SXG_RCV_RING *RcvRings; // Receive rings dma_addr_t PRcvRings; // Receive rings - physical address - SXG_RING_INFO RcvRingZeroInfo; // Receive ring 0 info + struct SXG_RING_INFO RcvRingZeroInfo; // Receive ring 0 info u32 * Isr; // Interrupt status register dma_addr_t PIsr; // ISR - physical address @@ -645,9 +640,9 @@ typedef struct _adapter_t u32 HashInformation; // Receive buffer queues spinlock_t RcvQLock; /* Receive Queue Lock */ - LIST_ENTRY FreeRcvBuffers; // Free SXG_DATA_BUFFER queue - LIST_ENTRY FreeRcvBlocks; // Free SXG_RCV_DESCRIPTOR_BLOCK Q - LIST_ENTRY AllRcvBlocks; // All SXG_RCV_BLOCKs + struct LIST_ENTRY FreeRcvBuffers; // Free SXG_DATA_BUFFER queue + struct LIST_ENTRY FreeRcvBlocks; // Free SXG_RCV_DESCRIPTOR_BLOCK Q + struct LIST_ENTRY AllRcvBlocks; // All SXG_RCV_BLOCKs ushort FreeRcvBufferCount; // Number of free rcv data buffers ushort FreeRcvBlockCount; // # of free rcv descriptor blocks ushort AllRcvBlockCount; // Number of total receive blocks @@ -656,8 +651,8 @@ typedef struct _adapter_t u32 RcvBuffersOnCard; // SXG_DATA_BUFFERS owned by card // SGL buffers spinlock_t SglQLock; /* SGL Queue Lock */ - LIST_ENTRY FreeSglBuffers; // Free SXG_SCATTER_GATHER - LIST_ENTRY AllSglBuffers; // All SXG_SCATTER_GATHER + struct LIST_ENTRY FreeSglBuffers; // Free SXG_SCATTER_GATHER + struct LIST_ENTRY AllSglBuffers; // All SXG_SCATTER_GATHER ushort FreeSglBufferCount; // Number of free SGL buffers ushort AllSglBufferCount; // Number of total SGL buffers u32 CurrentTime; // Tick count @@ -679,7 +674,7 @@ typedef struct _adapter_t // Stats u32 PendingRcvCount; // Outstanding rcv indications u32 PendingXmtCount; // Outstanding send requests - SXG_STATS Stats; // Statistics + struct SXG_STATS Stats; // Statistics u32 ReassBufs; // Number of reassembly buffers // Card Crash Info ushort CrashLocation; // Microcode crash location @@ -708,7 +703,7 @@ typedef struct _adapter_t // dma_addr_t PDumpBuffer; // Physical address //#endif // SXG_FAILURE_DUMP -} adapter_t, *p_adapter_t; +}; #if SLIC_DUMP_ENABLED #define SLIC_DUMP_REQUESTED 1 @@ -721,10 +716,10 @@ typedef struct _adapter_t * structure is written out to the card's SRAM when the microcode panic's. * ****************************************************************************/ -typedef struct _slic_crash_info { +struct slic_crash_info { ushort cpu_id; ushort crash_pc; -} slic_crash_info, *p_slic_crash_info; +}; #define CRASH_INFO_OFFSET 0x155C --- a/drivers/staging/sxg/sxghif.h +++ b/drivers/staging/sxg/sxghif.h @@ -12,7 +12,7 @@ /******************************************************************************* * UCODE Registers *******************************************************************************/ -typedef struct _SXG_UCODE_REGS { +struct SXG_UCODE_REGS { // Address 0 - 0x3F = Command codes 0-15 for TCB 0. Excode 0 u32 Icr; // Code = 0 (extended), ExCode = 0 - Int control u32 RsvdReg1; // Code = 1 - TOE -NA @@ -127,7 +127,7 @@ typedef struct _SXG_UCODE_REGS { // base. As extended codes are added, reduce the first array value in // the following field u32 PadToNextCpu[94][16]; // 94 = 128 - 34 (34 = Excodes 0 - 33) -} SXG_UCODE_REGS, *PSXG_UCODE_REGS; +}; // Interrupt control register (0) values #define SXG_ICR_DISABLE 0x00000000 @@ -169,7 +169,7 @@ typedef struct _SXG_UCODE_REGS { * is happening is that these registers occupy the "PadEx[15]" areas in the * SXG_UCODE_REGS definition above */ -typedef struct _SXG_TCB_REGS { +struct SXG_TCB_REGS { u32 ExCode; /* Extended codes - see SXG_UCODE_REGS */ u32 Xmt; /* Code = 1 - # of Xmt descriptors added to ring */ u32 Rcv; /* Code = 2 - # of Rcv descriptors added to ring */ @@ -180,7 +180,7 @@ typedef struct _SXG_TCB_REGS { u32 Rsvd4; /* Code = 7 - TOE NA */ u32 Rsvd5; /* Code = 8 - TOE NA */ u32 Pad[7]; /* Codes 8-15 - Not used. */ -} SXG_TCB_REGS, *PSXG_TCB_REGS; +}; /*************************************************************************** * ISR Format @@ -272,7 +272,7 @@ typedef struct _SXG_TCB_REGS { * */ #pragma pack(push, 1) -typedef struct _SXG_EVENT { +struct SXG_EVENT { u32 Pad[1]; // not used u32 SndUna; // SndUna value u32 Resid; // receive MDL resid @@ -294,7 +294,7 @@ typedef struct _SXG_EVENT { unsigned char Code; // Event code unsigned char CommandIndex; // New ring index unsigned char Status; // Event status -} SXG_EVENT, *PSXG_EVENT; +}; #pragma pack(pop) // Event code definitions @@ -321,9 +321,9 @@ typedef struct _SXG_EVENT { #define EVENT_RING_BATCH 16 // Hand entries back 16 at a time. #define EVENT_BATCH_LIMIT 256 // Stop processing events after 256 (16 * 16) -typedef struct _SXG_EVENT_RING { - SXG_EVENT Ring[EVENT_RING_SIZE]; -} SXG_EVENT_RING, *PSXG_EVENT_RING; +struct SXG_EVENT_RING { + struct SXG_EVENT Ring[EVENT_RING_SIZE]; +}; /*************************************************************************** * @@ -400,12 +400,12 @@ typedef struct _SXG_EVENT_RING { #define SXG_MAX_ENTRIES 4096 // Structure and macros to manage a ring -typedef struct _SXG_RING_INFO { +struct SXG_RING_INFO { unsigned char Head; // Where we add entries - Note unsigned char:RING_SIZE unsigned char Tail; // Where we pull off completed entries ushort Size; // Ring size - Must be multiple of 2 void *Context[SXG_MAX_RING_SIZE]; // Shadow ring -} SXG_RING_INFO, *PSXG_RING_INFO; +}; #define SXG_INITIALIZE_RING(_ring, _size) { \ (_ring).Head = 0; \ @@ -481,7 +481,7 @@ typedef struct _SXG_RING_INFO { * |_________|_________|_________|_________|28 0x1c */ #pragma pack(push, 1) -typedef struct _SXG_CMD { +struct SXG_CMD { dma_addr_t Sgl; // Physical address of SGL union { struct { @@ -518,14 +518,14 @@ typedef struct _SXG_CMD { unsigned char NotUsed; } Status; }; -} SXG_CMD, *PSXG_CMD; +}; #pragma pack(pop) #pragma pack(push, 1) -typedef struct _VLAN_HDR { +struct VLAN_HDR { ushort VlanTci; ushort VlanTpid; -} VLAN_HDR, *PVLAN_HDR; +}; #pragma pack(pop) /* @@ -564,22 +564,22 @@ typedef struct _VLAN_HDR { #define SXG_SLOWCMD_CSUM_TCP 0x02 // Checksum TCP #define SXG_SLOWCMD_LSO 0x04 // Large segment send -typedef struct _SXG_XMT_RING { - SXG_CMD Descriptors[SXG_XMT_RING_SIZE]; -} SXG_XMT_RING, *PSXG_XMT_RING; - -typedef struct _SXG_RCV_RING { - SXG_CMD Descriptors[SXG_RCV_RING_SIZE]; -} SXG_RCV_RING, *PSXG_RCV_RING; +struct SXG_XMT_RING { + struct SXG_CMD Descriptors[SXG_XMT_RING_SIZE]; +}; + +struct SXG_RCV_RING { + struct SXG_CMD Descriptors[SXG_RCV_RING_SIZE]; +}; /*************************************************************************** * Share memory buffer types - Used to identify asynchronous * shared memory allocation ***************************************************************************/ -typedef enum { +enum SXG_BUFFER_TYPE { SXG_BUFFER_TYPE_RCV, // Receive buffer SXG_BUFFER_TYPE_SGL // SGL buffer -} SXG_BUFFER_TYPE; +}; // State for SXG buffers #define SXG_BUFFER_FREE 0x01 @@ -670,19 +670,19 @@ typedef enum { #define SXG_MAX_RCV_BLOCKS 128 // = 16384 receive buffers // Receive buffer header -typedef struct _SXG_RCV_DATA_BUFFER_HDR { +struct SXG_RCV_DATA_BUFFER_HDR { dma_addr_t PhysicalAddress; // Buffer physical address // Note - DO NOT USE the VirtualAddress field to locate data. // Use the sxg.h:SXG_RECEIVE_DATA_LOCATION macro instead. void *VirtualAddress; // Start of buffer - LIST_ENTRY FreeList; // Free queue of buffers - struct _SXG_RCV_DATA_BUFFER_HDR *Next; // Fastpath data buffer queue + struct LIST_ENTRY FreeList; // Free queue of buffers + struct SXG_RCV_DATA_BUFFER_HDR *Next; // Fastpath data buffer queue u32 Size; // Buffer size u32 ByteOffset; // See SXG_RESTORE_MDL_OFFSET unsigned char State; // See SXG_BUFFER state above unsigned char Status; // Event status (to log PUSH) struct sk_buff *skb; // Double mapped (nbl and pkt) -} SXG_RCV_DATA_BUFFER_HDR, *PSXG_RCV_DATA_BUFFER_HDR; +}; // SxgSlowReceive uses the PACKET (skb) contained // in the SXG_RCV_DATA_BUFFER_HDR when indicating dumb-nic data @@ -693,42 +693,43 @@ typedef struct _SXG_RCV_DATA_BUFFER_HDR #define SXG_RCV_JUMBO_BUFFER_SIZE 10240 // jumbo = 10k including HDR // Receive data descriptor -typedef struct _SXG_RCV_DATA_DESCRIPTOR { +struct SXG_RCV_DATA_DESCRIPTOR { union { struct sk_buff *VirtualAddress; // Host handle u64 ForceTo8Bytes; // Force x86 to 8-byte boundary }; dma_addr_t PhysicalAddress; -} SXG_RCV_DATA_DESCRIPTOR, *PSXG_RCV_DATA_DESCRIPTOR; +}; // Receive descriptor block #define SXG_RCV_DESCRIPTORS_PER_BLOCK 128 #define SXG_RCV_DESCRIPTOR_BLOCK_SIZE 2048 // For sanity check -typedef struct _SXG_RCV_DESCRIPTOR_BLOCK { - SXG_RCV_DATA_DESCRIPTOR Descriptors[SXG_RCV_DESCRIPTORS_PER_BLOCK]; -} SXG_RCV_DESCRIPTOR_BLOCK, *PSXG_RCV_DESCRIPTOR_BLOCK; + +struct SXG_RCV_DESCRIPTOR_BLOCK { + struct SXG_RCV_DATA_DESCRIPTOR Descriptors[SXG_RCV_DESCRIPTORS_PER_BLOCK]; +}; // Receive descriptor block header -typedef struct _SXG_RCV_DESCRIPTOR_BLOCK_HDR { +struct SXG_RCV_DESCRIPTOR_BLOCK_HDR { void *VirtualAddress; // Start of 2k buffer dma_addr_t PhysicalAddress; // ..and it's physical address - LIST_ENTRY FreeList; // Free queue of descriptor blocks + struct LIST_ENTRY FreeList; // Free queue of descriptor blocks unsigned char State; // See SXG_BUFFER state above -} SXG_RCV_DESCRIPTOR_BLOCK_HDR, *PSXG_RCV_DESCRIPTOR_BLOCK_HDR; +}; // Receive block header -typedef struct _SXG_RCV_BLOCK_HDR { +struct SXG_RCV_BLOCK_HDR { void *VirtualAddress; // Start of virtual memory dma_addr_t PhysicalAddress; // ..and it's physical address - LIST_ENTRY AllList; // Queue of all SXG_RCV_BLOCKS -} SXG_RCV_BLOCK_HDR, *PSXG_RCV_BLOCK_HDR; + struct LIST_ENTRY AllList; // Queue of all SXG_RCV_BLOCKS +}; // Macros to determine data structure offsets into receive block #define SXG_RCV_BLOCK_SIZE(_Buffersize) \ (((_Buffersize) * SXG_RCV_DESCRIPTORS_PER_BLOCK) + \ - (sizeof(SXG_RCV_DESCRIPTOR_BLOCK)) + \ - (sizeof(SXG_RCV_DESCRIPTOR_BLOCK_HDR)) + \ - (sizeof(SXG_RCV_BLOCK_HDR))) + (sizeof(struct SXG_RCV_DESCRIPTOR_BLOCK)) + \ + (sizeof(struct SXG_RCV_DESCRIPTOR_BLOCK_HDR)) + \ + (sizeof(struct SXG_RCV_BLOCK_HDR))) #define SXG_RCV_BUFFER_DATA_SIZE(_Buffersize) \ ((_Buffersize) - SXG_RCV_DATA_HDR_SIZE) #define SXG_RCV_DATA_BUFFER_HDR_OFFSET(_Buffersize) \ @@ -737,18 +738,18 @@ typedef struct _SXG_RCV_BLOCK_HDR { ((_Buffersize) * SXG_RCV_DESCRIPTORS_PER_BLOCK) #define SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET(_Buffersize) \ (((_Buffersize) * SXG_RCV_DESCRIPTORS_PER_BLOCK) + \ - (sizeof(SXG_RCV_DESCRIPTOR_BLOCK))) + (sizeof(struct SXG_RCV_DESCRIPTOR_BLOCK))) #define SXG_RCV_BLOCK_HDR_OFFSET(_Buffersize) \ (((_Buffersize) * SXG_RCV_DESCRIPTORS_PER_BLOCK) + \ - (sizeof(SXG_RCV_DESCRIPTOR_BLOCK)) + \ - (sizeof(SXG_RCV_DESCRIPTOR_BLOCK_HDR))) + (sizeof(struct SXG_RCV_DESCRIPTOR_BLOCK)) + \ + (sizeof(struct SXG_RCV_DESCRIPTOR_BLOCK_HDR))) // Use the miniport reserved portion of the NBL to locate // our SXG_RCV_DATA_BUFFER_HDR structure. -typedef struct _SXG_RCV_NBL_RESERVED { - PSXG_RCV_DATA_BUFFER_HDR RcvDataBufferHdr; +struct SXG_RCV_NBL_RESERVED { + struct SXG_RCV_DATA_BUFFER_HDR *RcvDataBufferHdr; void *Available; -} SXG_RCV_NBL_RESERVED, *PSXG_RCV_NBL_RESERVED; +}; #define SXG_RCV_NBL_BUFFER_HDR(_NBL) (((PSXG_RCV_NBL_RESERVED)NET_BUFFER_LIST_MINIPORT_RESERVED(_NBL))->RcvDataBufferHdr) @@ -760,11 +761,11 @@ typedef struct _SXG_RCV_NBL_RESERVED { #define SXG_MAX_SGL_BUFFERS 16384 // Maximum to allocate (note ADAPT:ushort) // Self identifying structure type -typedef enum _SXG_SGL_TYPE { +enum SXG_SGL_TYPE { SXG_SGL_DUMB, // Dumb NIC SGL SXG_SGL_SLOW, // Slowpath protocol header - see below SXG_SGL_CHIMNEY // Chimney offload SGL -} SXG_SGL_TYPE, PSXG_SGL_TYPE; +}; // Note - the description below is Microsoft specific // @@ -798,41 +799,41 @@ typedef enum _SXG_SGL_TYPE { // to the card directly. For x86 systems we must reconstruct // the SGL. The following structure defines an x64 // formatted SGL entry -typedef struct _SXG_X64_SGE { +struct SXG_X64_SGE { dma64_addr_t Address; // same as wdm.h u32 Length; // same as wdm.h u32 CompilerPad; // The compiler pads to 8-bytes u64 Reserved; // u32 * in wdm.h. Force to 8 bytes -} SXG_X64_SGE, *PSXG_X64_SGE; +}; -typedef struct _SCATTER_GATHER_ELEMENT { +struct SCATTER_GATHER_ELEMENT { dma64_addr_t Address; // same as wdm.h u32 Length; // same as wdm.h u32 CompilerPad; // The compiler pads to 8-bytes u64 Reserved; // u32 * in wdm.h. Force to 8 bytes -} SCATTER_GATHER_ELEMENT, *PSCATTER_GATHER_ELEMENT; +}; -typedef struct _SCATTER_GATHER_LIST { +struct SCATTER_GATHER_LIST { u32 NumberOfElements; u32 *Reserved; - SCATTER_GATHER_ELEMENT Elements[]; -} SCATTER_GATHER_LIST, *PSCATTER_GATHER_LIST; + struct SCATTER_GATHER_ELEMENT Elements[]; +}; // The card doesn't care about anything except elements, so // we can leave the u32 * reserved field alone in the following // SGL structure. But redefine from wdm.h:SCATTER_GATHER_LIST so // we can specify SXG_X64_SGE and define a fixed number of elements -typedef struct _SXG_X64_SGL { +struct SXG_X64_SGL { u32 NumberOfElements; u32 *Reserved; - SXG_X64_SGE Elements[SXG_SGL_ENTRIES]; -} SXG_X64_SGL, *PSXG_X64_SGL; + struct SXG_X64_SGE Elements[SXG_SGL_ENTRIES]; +}; -typedef struct _SXG_SCATTER_GATHER { - SXG_SGL_TYPE Type; // FIRST! Dumb-nic or offload +struct SXG_SCATTER_GATHER { + enum SXG_SGL_TYPE Type; // FIRST! Dumb-nic or offload void *adapter; // Back pointer to adapter - LIST_ENTRY FreeList; // Free SXG_SCATTER_GATHER blocks - LIST_ENTRY AllList; // All SXG_SCATTER_GATHER blocks + struct LIST_ENTRY FreeList; // Free SXG_SCATTER_GATHER blocks + struct LIST_ENTRY AllList; // All SXG_SCATTER_GATHER blocks dma_addr_t PhysicalAddress; // physical address unsigned char State; // See SXG_BUFFER state above unsigned char CmdIndex; // Command ring index @@ -840,14 +841,14 @@ typedef struct _SXG_SCATTER_GATHER { u32 Direction; // For asynchronous completions u32 CurOffset; // Current SGL offset u32 SglRef; // SGL reference count - VLAN_HDR VlanTag; // VLAN tag to be inserted into SGL - PSCATTER_GATHER_LIST pSgl; // SGL Addr. Possibly &Sgl - SXG_X64_SGL Sgl; // SGL handed to card -} SXG_SCATTER_GATHER, *PSXG_SCATTER_GATHER; + struct VLAN_HDR VlanTag; // VLAN tag to be inserted into SGL + struct SCATTER_GATHER_LIST *pSgl; // SGL Addr. Possibly &Sgl + struct SXG_X64_SGL Sgl; // SGL handed to card +}; #if defined(CONFIG_X86_64) #define SXG_SGL_BUFFER(_SxgSgl) (&_SxgSgl->Sgl) -#define SXG_SGL_BUF_SIZE sizeof(SXG_X64_SGL) +#define SXG_SGL_BUF_SIZE sizeof(struct SXG_X64_SGL) #elif defined(CONFIG_X86) // Force NDIS to give us it's own buffer so we can reformat to our own #define SXG_SGL_BUFFER(_SxgSgl) NULL --- a/drivers/staging/sxg/sxghw.h +++ b/drivers/staging/sxg/sxghw.h @@ -48,7 +48,7 @@ #define SXG_HWREG_MEMSIZE 0x4000 // 16k #pragma pack(push, 1) -typedef struct _SXG_HW_REGS { +struct SXG_HW_REGS { u32 Reset; // Write 0xdead to invoke soft reset u32 Pad1; // No register defined at offset 4 u32 InterruptMask0; // Deassert legacy interrupt on function 0 @@ -113,7 +113,7 @@ typedef struct _SXG_HW_REGS { u32 Software[1920]; // 0x200 - 0x2000 - Software defined (not used) u32 MsixTable[1024]; // 0x2000 - 0x3000 - MSIX Table u32 MsixBitArray[1024]; // 0x3000 - 0x4000 - MSIX Pending Bit Array -} SXG_HW_REGS, *PSXG_HW_REGS; +}; #pragma pack(pop) // Microcode Address Flags @@ -519,10 +519,10 @@ typedef struct _SXG_HW_REGS { #define XS_LANE_ALIGN 0x1000 // XS transmit lanes aligned // PHY Microcode download data structure -typedef struct _PHY_UCODE { +struct PHY_UCODE { ushort Addr; ushort Data; -} PHY_UCODE, *PPHY_UCODE; +}; /***************************************************************************** @@ -537,7 +537,7 @@ typedef struct _PHY_UCODE { // all commands - see the Sahara spec for details. Note that this structure is // only valid when compiled on a little endian machine. #pragma pack(push, 1) -typedef struct _XMT_DESC { +struct XMT_DESC { ushort XmtLen; // word 0, bits [15:0] - transmit length unsigned char XmtCtl; // word 0, bits [23:16] - transmit control byte unsigned char Cmd; // word 0, bits [31:24] - transmit command plus misc. @@ -551,7 +551,7 @@ typedef struct _XMT_DESC { u32 Rsvd3; // word 5, bits [31:0] - PAD u32 Rsvd4; // word 6, bits [31:0] - PAD u32 Rsvd5; // word 7, bits [31:0] - PAD -} XMT_DESC, *PXMT_DESC; +}; #pragma pack(pop) // XMT_DESC Cmd byte definitions @@ -600,7 +600,7 @@ typedef struct _XMT_DESC { // Format of the 18 byte Receive Buffer returned by the // Receive Sequencer for received packets #pragma pack(push, 1) -typedef struct _RCV_BUF_HDR { +struct RCV_BUF_HDR { u32 Status; // Status word from Rcv Seq Parser ushort Length; // Rcv packet byte count union { @@ -615,7 +615,7 @@ typedef struct _RCV_BUF_HDR { unsigned char IpHdrOffset; // IP header offset into packet u32 TpzHash; // Toeplitz hash ushort Reserved; // Reserved -} RCV_BUF_HDR, *PRCV_BUF_HDR; +}; #pragma pack(pop) @@ -665,28 +665,28 @@ typedef struct _RCV_BUF_HDR { #pragma pack(push, 1) /* */ -typedef struct _HW_CFG_DATA { +struct HW_CFG_DATA { ushort Addr; union { ushort Data; ushort Checksum; }; -} HW_CFG_DATA, *PHW_CFG_DATA; +}; /* */ -#define NUM_HW_CFG_ENTRIES ((128/sizeof(HW_CFG_DATA)) - 4) +#define NUM_HW_CFG_ENTRIES ((128/sizeof(struct HW_CFG_DATA)) - 4) /* MAC address */ -typedef struct _SXG_CONFIG_MAC { +struct SXG_CONFIG_MAC { unsigned char MacAddr[6]; /* MAC Address */ -} SXG_CONFIG_MAC, *PSXG_CONFIG_MAC; +}; /* */ -typedef struct _ATK_FRU { +struct ATK_FRU { unsigned char PartNum[6]; unsigned char Revision[2]; unsigned char Serial[14]; -} ATK_FRU, *PATK_FRU; +}; /* OEM FRU Format types */ #define ATK_FRU_FORMAT 0x0000 @@ -698,24 +698,24 @@ typedef struct _ATK_FRU { #define NO_FRU_FORMAT 0xFFFF /* EEPROM/Flash Format */ -typedef struct _SXG_CONFIG { +struct SXG_CONFIG { /* */ /* Section 1 (128 bytes) */ /* */ ushort MagicWord; /* EEPROM/FLASH Magic code 'A5A5' */ ushort SpiClks; /* SPI bus clock dividers */ - HW_CFG_DATA HwCfg[NUM_HW_CFG_ENTRIES]; + struct HW_CFG_DATA HwCfg[NUM_HW_CFG_ENTRIES]; /* */ /* */ /* */ ushort Version; /* EEPROM format version */ - SXG_CONFIG_MAC MacAddr[4]; /* space for 4 MAC addresses */ - ATK_FRU AtkFru; /* FRU information */ + struct SXG_CONFIG_MAC MacAddr[4]; /* space for 4 MAC addresses */ + struct ATK_FRU AtkFru; /* FRU information */ ushort OemFruFormat; /* OEM FRU format type */ unsigned char OemFru[76]; /* OEM FRU information (optional) */ ushort Checksum; /* Checksum of section 2 */ /* CS info XXXTODO */ -} SXG_CONFIG, *PSXG_CONFIG; +}; #pragma pack(pop) /***************************************************************************** --- a/drivers/staging/sxg/sxg_os.h +++ b/drivers/staging/sxg/sxg_os.h @@ -44,10 +44,10 @@ #define FALSE (0) #define TRUE (1) -typedef struct _LIST_ENTRY { - struct _LIST_ENTRY *nle_flink; - struct _LIST_ENTRY *nle_blink; -} list_entry, LIST_ENTRY, *PLIST_ENTRY; +struct LIST_ENTRY { + struct LIST_ENTRY *nle_flink; + struct LIST_ENTRY *nle_blink; +}; #define InitializeListHead(l) \ (l)->nle_flink = (l)->nle_blink = (l) @@ -68,10 +68,10 @@ typedef struct _LIST_ENTRY { /* These two have to be inlined since they return things. */ -static __inline PLIST_ENTRY RemoveHeadList(list_entry * l) +static __inline struct LIST_ENTRY *RemoveHeadList(struct LIST_ENTRY *l) { - list_entry *f; - list_entry *e; + struct LIST_ENTRY *f; + struct LIST_ENTRY *e; e = l->nle_flink; f = e->nle_flink; @@ -81,10 +81,10 @@ static __inline PLIST_ENTRY RemoveHeadLi return (e); } -static __inline PLIST_ENTRY RemoveTailList(list_entry * l) +static __inline struct LIST_ENTRY *RemoveTailList(struct LIST_ENTRY *l) { - list_entry *b; - list_entry *e; + struct LIST_ENTRY *b; + struct LIST_ENTRY *e; e = l->nle_blink; b = e->nle_blink; @@ -96,7 +96,7 @@ static __inline PLIST_ENTRY RemoveTailLi #define InsertTailList(l, e) \ do { \ - list_entry *b; \ + struct LIST_ENTRY *b; \ \ b = (l)->nle_blink; \ (e)->nle_flink = (l); \ @@ -107,7 +107,7 @@ static __inline PLIST_ENTRY RemoveTailLi #define InsertHeadList(l, e) \ do { \ - list_entry *f; \ + struct LIST_ENTRY *f; \ \ f = (l)->nle_flink; \ (e)->nle_flink = f; \ --- a/drivers/staging/sxg/sxgphycode.h +++ b/drivers/staging/sxg/sxgphycode.h @@ -18,7 +18,7 @@ /* * Download for AEL2005C PHY with SR/LR transceiver (10GBASE-SR or 10GBASE-LR) */ -static PHY_UCODE PhyUcode[] = { +static struct PHY_UCODE PhyUcode[] = { /* * NOTE: An address of 0 is a special case. When the download routine * sees an address of 0, it does not write to the PHY. Instead, it