diff -ur stock/linux-2.4.20-pre5/drivers/ide/alim15x3.c linux-2.4.20-pre5/drivers/ide/alim15x3.c --- stock/linux-2.4.20-pre5/drivers/ide/alim15x3.c Fri Aug 2 17:39:44 2002 +++ linux-2.4.20-pre5/drivers/ide/alim15x3.c Thu Sep 5 12:49:46 2002 @@ -541,8 +541,21 @@ /* * This checks if the controller and the cable are capable * of UDMA66 transfers. It doesn't check the drives. - * But see note 2 below! + * But see note 2 below -- the following list specifies platforms + * on which this probe should *NOT* be performed! The "enable" field + * is a bitmap indicating if UDMA66 is OK on the primary/secondary channel. */ +struct ata66_noprobe { + u32 sid_svid; /* SID:SVID for this platform */ + byte enable; /* Enable bits */ +}; + +static __init struct ata66_noprobe ata66_noprobe_list[] = +{ + { 0x10a410cf, 3 }, /* Fujitsu P-2000 series laptop */ + { 0, 0 } /* End of list */ +}; + unsigned int __init ata66_ali15x3 (ide_hwif_t *hwif) { struct pci_dev *dev = hwif->pci_dev; @@ -550,7 +563,9 @@ byte cable_80_pin[2] = { 0, 0 }; unsigned long flags; - byte tmpbyte; + byte tmpbyte = 0xff; + struct ata66_noprobe *npp; + u32 id; __save_flags(flags); __cli(); @@ -563,33 +578,51 @@ * but in this case, we will not set the device to * ultra 66, the detection result is not important */ - + /* - * enable "Cable Detection", m5229, 0x4b, bit3 + * List of SVID:SID on which not to attempt this detection; + * generally these are laptops so we can assume the cable is not + * an issue. This gets the SVID in the low 16 bits and the SID in + * the high 16 bits. */ - pci_read_config_byte(dev, 0x4b, &tmpbyte); - pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08); - /* - * set south-bridge's enable bit, m1533, 0x79 - */ - pci_read_config_byte(isa_dev, 0x79, &tmpbyte); - if (m5229_revision == 0xC2) { + pci_read_config_dword(dev, PCI_SUBSYSTEM_VENDOR_ID, &id); + for ( npp = ata66_noprobe_list ; npp->sid_svid ; npp++ ) { + if ( id == npp->sid_svid ) { + tmpbyte = ~npp->enable & 3; + break; + } + } + + if ( tmpbyte == 0xff ) { + /* + * enable "Cable Detection", m5229, 0x4b, bit3 + */ + pci_read_config_byte(dev, 0x4b, &tmpbyte); + pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08); + /* - * 1543C-B0 (m1533, 0x79, bit 2) + * set south-bridge's enable bit, m1533, 0x79 */ - pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04); - } else if (m5229_revision >= 0xC3) { + pci_read_config_byte(isa_dev, 0x79, &tmpbyte); + if (m5229_revision == 0xC2) { + /* + * 1543C-B0 (m1533, 0x79, bit 2) + */ + pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04); + } else if (m5229_revision >= 0xC3) { + /* + * 1553/1535 (m1533, 0x79, bit 1) + */ + pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); + } /* - * 1553/1535 (m1533, 0x79, bit 1) + * Ultra66 cable detection (from Host View) + * m5229, 0x4a, bit0: primary, bit1: secondary 80 pin */ - pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); + pci_read_config_byte(dev, 0x4a, &tmpbyte); } - /* - * Ultra66 cable detection (from Host View) - * m5229, 0x4a, bit0: primary, bit1: secondary 80 pin - */ - pci_read_config_byte(dev, 0x4a, &tmpbyte); + /* * 0x4a, bit0 is 0 => primary channel * has 80-pin (from host view)