diff --git a/arch/i386/boot/pm.c b/arch/i386/boot/pm.c
index 1df025c..5f45385 100644
--- a/arch/i386/boot/pm.c
+++ b/arch/i386/boot/pm.c
@@ -116,14 +116,18 @@ static void setup_gdt(void)
 {
 	/* There are machines which are known to not boot with the GDT
 	   being 8-byte unaligned.  Intel recommends 16 byte alignment. */
-	static const u64 boot_gdt[] __attribute__((aligned(16))) = {
+	static u64 boot_gdt[] __attribute__((aligned(16))) = {
 		/* CS: code, read/execute, 4 GB, base 0 */
 		[GDT_ENTRY_BOOT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff),
 		/* DS: data, read/write, 4 GB, base 0 */
 		[GDT_ENTRY_BOOT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff),
+		/* Transition CS: code, read/execute, 64K, base <setup> */
+		[GDT_ENTRY_BOOT_DS+1] = 0,
 	};
 	struct gdt_ptr gdt;
 
+	boot_gdt[GDT_ENTRY_BOOT_DS+1] = GDT_ENTRY(0x009b, ds() << 4, 0xffff);
+
 	gdt.len = sizeof(boot_gdt)-1;
 	gdt.ptr = (u32)&boot_gdt + (ds() << 4);
 
diff --git a/arch/i386/boot/pmjump.S b/arch/i386/boot/pmjump.S
index 2e55923..421e7c2 100644
--- a/arch/i386/boot/pmjump.S
+++ b/arch/i386/boot/pmjump.S
@@ -39,7 +39,9 @@ protected_mode_jump:
 	movl	%cr0, %edx
 	orb	$1, %dl			# Protected mode (PE) bit
 	movl	%edx, %cr0
-
+	ljmp	$__BOOT_DS+8, $3f
+	
+3:
 	movw	%cx, %ds
 	movw	%cx, %es
 	movw	%cx, %fs