Index: GL/dri/dri.h =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/GL/dri/dri.h,v retrieving revision 1.3 diff -u -r1.3 dri.h --- GL/dri/dri.h 16 Jun 2004 09:37:58 -0000 1.3 +++ GL/dri/dri.h 19 Apr 2005 15:37:04 -0000 @@ -141,7 +141,7 @@ int ddxDriverMajorVersion; int ddxDriverMinorVersion; int ddxDriverPatchVersion; - CARD32 frameBufferPhysicalAddress; + pointer frameBufferPhysicalAddress; long frameBufferSize; long frameBufferStride; long SAREASize; Index: GL/dri/dri.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/GL/dri/dri.c,v retrieving revision 1.7 diff -u -r1.7 dri.c --- GL/dri/dri.c 8 Dec 2004 05:52:20 -0000 1.7 +++ GL/dri/dri.c 19 Apr 2005 15:37:04 -0000 @@ -284,7 +284,7 @@ return FALSE; } DRIDrvMsg(pScreen->myNum, X_INFO, - "[drm] added %d byte SAREA at 0x%08lx\n", + "[drm] added %d byte SAREA at 0x%016lx\n", pDRIPriv->pDriverInfo->SAREASize, pDRIPriv->hSAREA); if (drmMap( pDRIPriv->drmFD, @@ -300,7 +300,7 @@ return FALSE; } memset(pDRIPriv->pSAREA, 0, pDRIPriv->pDriverInfo->SAREASize); - DRIDrvMsg(pScreen->myNum, X_INFO, "[drm] mapped SAREA 0x%08lx to %p\n", + DRIDrvMsg(pScreen->myNum, X_INFO, "[drm] mapped SAREA 0x%016lx to %p\n", pDRIPriv->hSAREA, pDRIPriv->pSAREA); if (drmAddMap( pDRIPriv->drmFD, @@ -318,7 +318,7 @@ "[drm] drmAddMap failed\n"); return FALSE; } - DRIDrvMsg(pScreen->myNum, X_INFO, "[drm] framebuffer handle = 0x%08lx\n", + DRIDrvMsg(pScreen->myNum, X_INFO, "[drm] framebuffer handle = 0x%016lx\n", pDRIPriv->hFrameBuffer); /* Add tags for reserved contexts */ @@ -381,7 +381,7 @@ pDRIPriv->myContextPriv = pDRIContextPriv; DRIDrvMsg(pScreen->myNum, X_INFO, - "X context handle = 0x%08lx\n", pDRIPriv->myContext); + "X context handle = 0x%016lx\n", pDRIPriv->myContext); /* Now that we have created the X server's context, we can grab the * hardware lock for the X server. @@ -565,14 +565,14 @@ drmUnlock(pDRIPriv->drmFD, pDRIPriv->myContext); lockRefCount=0; DRIDrvMsg(pScreen->myNum, X_INFO, - "[drm] unmapping %d bytes of SAREA 0x%08lx at %p\n", + "[drm] unmapping %d bytes of SAREA 0x%016lx at %p\n", pDRIInfo->SAREASize, pDRIPriv->hSAREA, pDRIPriv->pSAREA); if (drmUnmap(pDRIPriv->pSAREA, pDRIInfo->SAREASize)) { DRIDrvMsg(pScreen->myNum, X_ERROR, "[drm] unable to unmap %d bytes" - " of SAREA 0x%08lx at %p\n", + " of SAREA 0x%016lx at %p\n", pDRIInfo->SAREASize, pDRIPriv->hSAREA, pDRIPriv->pSAREA); Index: hw/xfree86/drivers/ati/radeon_dri.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c,v retrieving revision 1.16 diff -u -r1.16 radeon_dri.c --- hw/xfree86/drivers/ati/radeon_dri.c 24 Mar 2005 06:45:51 -0000 1.16 +++ hw/xfree86/drivers/ati/radeon_dri.c 19 Apr 2005 15:39:55 -0000 @@ -806,7 +806,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] %d kB allocated with handle 0x%08lx\n", + "[agp] %d kB allocated with handle 0x%016lx\n", info->gartSize*1024, info->agpMemHandle); if (drmAgpBind(info->drmFD, @@ -824,7 +824,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] ring handle = 0x%08lx\n", info->ringHandle); + "[agp] ring handle = 0x%016lx\n", info->ringHandle); if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize, (drmAddressPtr)&info->ring) < 0) { @@ -832,7 +832,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] Ring mapped at 0x%08lx\n", + "[agp] Ring mapped at 0x%016lx\n", (unsigned long)info->ring); if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize, @@ -842,7 +842,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] ring read ptr handle = 0x%08lx\n", + "[agp] ring read ptr handle = 0x%016lx\n", info->ringReadPtrHandle); if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize, @@ -852,7 +852,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] Ring read ptr mapped at 0x%08lx\n", + "[agp] Ring read ptr mapped at 0x%016lx\n", (unsigned long)info->ringReadPtr); if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize, @@ -862,7 +862,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] vertex/indirect buffers handle = 0x%08lx\n", + "[agp] vertex/indirect buffers handle = 0x%016lx\n", info->bufHandle); if (drmMap(info->drmFD, info->bufHandle, info->bufMapSize, @@ -872,7 +872,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] Vertex/indirect buffers mapped at 0x%08lx\n", + "[agp] Vertex/indirect buffers mapped at 0x%016lx\n", (unsigned long)info->buf); if (drmAddMap(info->drmFD, info->gartTexStart, info->gartTexMapSize, @@ -882,7 +882,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] GART texture map handle = 0x%08lx\n", + "[agp] GART texture map handle = 0x%016lx\n", info->gartTexHandle); if (drmMap(info->drmFD, info->gartTexHandle, info->gartTexMapSize, @@ -892,7 +892,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] GART Texture map mapped at 0x%08lx\n", + "[agp] GART Texture map mapped at 0x%016lx\n", (unsigned long)info->gartTex); RADEONSetAgpBase(info); @@ -915,7 +915,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] %d kB allocated with handle 0x%08lx\n", + "[pci] %d kB allocated with handle 0x%016lx\n", info->gartSize*1024, info->pciMemHandle); RADEONDRIInitGARTValues(info); @@ -927,7 +927,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] ring handle = 0x%08lx\n", info->ringHandle); + "[pci] ring handle = 0x%016lx\n", info->ringHandle); if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize, (drmAddressPtr)&info->ring) < 0) { @@ -935,10 +935,10 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] Ring mapped at 0x%08lx\n", + "[pci] Ring mapped at 0x%016lx\n", (unsigned long)info->ring); xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] Ring contents 0x%08lx\n", + "[pci] Ring contents 0x%016lx\n", *(unsigned long *)(pointer)info->ring); if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize, @@ -948,7 +948,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] ring read ptr handle = 0x%08lx\n", + "[pci] ring read ptr handle = 0x%016lx\n", info->ringReadPtrHandle); if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize, @@ -958,10 +958,10 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] Ring read ptr mapped at 0x%08lx\n", + "[pci] Ring read ptr mapped at 0x%016lx\n", (unsigned long)info->ringReadPtr); xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] Ring read ptr contents 0x%08lx\n", + "[pci] Ring read ptr contents 0x%016lx\n", *(unsigned long *)(pointer)info->ringReadPtr); if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize, @@ -971,7 +971,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] vertex/indirect buffers handle = 0x%08lx\n", + "[pci] vertex/indirect buffers handle = 0x%016lx\n", info->bufHandle); if (drmMap(info->drmFD, info->bufHandle, info->bufMapSize, @@ -981,10 +981,10 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] Vertex/indirect buffers mapped at 0x%08lx\n", + "[pci] Vertex/indirect buffers mapped at 0x%016lx\n", (unsigned long)info->buf); xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] Vertex/indirect buffers contents 0x%08lx\n", + "[pci] Vertex/indirect buffers contents 0x%016lx\n", *(unsigned long *)(pointer)info->buf); if (drmAddMap(info->drmFD, info->gartTexStart, info->gartTexMapSize, @@ -994,7 +994,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] GART texture map handle = 0x%08lx\n", + "[pci] GART texture map handle = 0x%016lx\n", info->gartTexHandle); if (drmMap(info->drmFD, info->gartTexHandle, info->gartTexMapSize, @@ -1004,7 +1004,7 @@ return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] GART Texture map mapped at 0x%08lx\n", + "[pci] GART Texture map mapped at 0x%016lx\n", (unsigned long)info->gartTex); return TRUE; @@ -1017,12 +1017,16 @@ { /* Map registers */ info->registerSize = RADEON_MMIOSIZE; - if (drmAddMap(info->drmFD, info->MMIOAddr, info->registerSize, - DRM_REGISTERS, DRM_READ_ONLY, &info->registerHandle) < 0) { + if (drmAddMap(info->drmFD, + pciBusAddrToHostAddr(info->PciTag, PCI_MEM, info->MMIOAddr), + info->registerSize, + DRM_REGISTERS, + DRM_READ_ONLY, + &info->registerHandle) < 0) { return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] register handle = 0x%08lx\n", info->registerHandle); + "[drm] register handle = 0x%016lx\n", info->registerHandle); return TRUE; } @@ -1271,7 +1275,9 @@ RADEON_VERSION_MAJOR_TILED : RADEON_VERSION_MAJOR; pDRIInfo->ddxDriverMinorVersion = RADEON_VERSION_MINOR; pDRIInfo->ddxDriverPatchVersion = RADEON_VERSION_PATCH; - pDRIInfo->frameBufferPhysicalAddress = info->LinearAddr; + pDRIInfo->frameBufferPhysicalAddress = pciBusAddrToHostAddr(info->PciTag, + PCI_MEM, + info->LinearAddr); pDRIInfo->frameBufferSize = info->FbMapSize; pDRIInfo->frameBufferStride = (pScrn->displayWidth * info->CurrentLayout.pixel_bytes); @@ -1284,6 +1290,10 @@ correctly with pageflip + mergedfb/color tiling */ pDRIInfo->wrap.AdjustFrame = NULL; + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] frameBuffer handle = 0x%016lx\n", + pDRIInfo->frameBufferPhysicalAddress); + #ifdef PER_CONTEXT_SAREA /* This is only here for testing per-context SAREAs. When used, the magic number below would be properly defined in a header file. */