diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/arch/i386/pci/fixup.c linux-2.6.21-rc4-modesetting/arch/i386/pci/fixup.c
--- linux-2.6.21-rc4/arch/i386/pci/fixup.c	2007-03-15 17:20:01.000000000 -0700
+++ linux-2.6.21-rc4-modesetting/arch/i386/pci/fixup.c	2007-03-24 10:46:57.000000000 -0700
@@ -354,7 +354,7 @@ static void __devinit pci_fixup_video(st
 		printk(KERN_DEBUG "Boot video device is %s\n", pci_name(pdev));
 	}
 }
-DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
 
 /*
  * Some Toshiba laptops need extra code to enable their TI TSB43AB22/A.
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/Documentation/drm/modesetting.txt linux-2.6.21-rc4-modesetting/Documentation/drm/modesetting.txt
--- linux-2.6.21-rc4/Documentation/drm/modesetting.txt	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.21-rc4-modesetting/Documentation/drm/modesetting.txt	2007-03-26 11:01:24.000000000 -0700
@@ -0,0 +1,87 @@
+Video modesetting and multihead support in the kernel
+-----------------------------------------------------
+
+Why in the kernel?
+
+There are several reasons to pull modesetting and proper multihead support
+into the kernel:
+  - suspend/resume
+  - debugging (e.g. panic)
+  - non-X uses
+  - more reliable VT switch
+Each of the above is covered in more detail below.
+
+Suspend/resume
+--------------
+Currently, the kernel has to rely on an external application (X, vbetool, etc.)
+to reset video devices to the proper state after resume.  If one of these
+processes has trouble or crashes during or shortly after resume, the system
+will become unusable, with little indication as to why (see Debugging below).
+Putting code into the kernel to perform low level modesetting (i.e. without
+video BIOS support) will allow the kernel to resume to the correct mode
+automatically and more quickly than would be possible otherwise.
+
+Debugging
+---------
+As mentioned above, if something goes wrong with modesetting during resume, the
+user has very little indication of where things went wrong.  Likewise, if a
+panic or oops occurs while an application like X is running, the user will
+experience a hard hang, rather than the much more pleasant "blue penguin of
+death" (to be coded).  When a panic type event occurs, the kernel could set an
+appropriate mode, ideally one that can fit lots of panic data or long
+backtraces.  Another possibility is multihead debugging:  one display could run
+the user's applications (i.e. a "normal" display) while a secondary display
+could run a system level debugger, allowing the user to stop the machine,
+investigate memory, step through programs, etc.
+
+Non-X uses
+----------
+As it stands, non-X based applications wanting to use video devices have two
+options:  either take over the hardware themselves or use the existing kernel
+fb layer.  The former is obviously a tall order, while the latter isn't
+featureful enough to expose multiple outputs, perform per-device locking so
+that multiple clients can share the device, etc.  A kernel based modsetting
+and multihead API would make developing such applications much easier.
+
+VT switch
+---------
+Currently, the kernel relies on an external program to restore the graphics
+state when a VT switch occurs.  This doesn't always work, with similar results
+to the suspend/resume case:  an apparently hung or unusable machine.  Of
+course, the kernel can't unconditionally preempt the graphics device to set
+a new mode, but having modesetting in the kernel will give it a much better
+chance of coordinating with the DRM command dispatch code to find a good time
+to set a new mode.
+
+Interfaces
+----------
+The kernel DRM layer manages the output devices, available modes, and calls
+into the low level DRM drivers to set modes and probe outputs devices for
+attached displays, much like the X server's internal RandR 1.2 APIs.  It also
+provides userspace with an interface to these functions, based on the X
+server's external RandR 1.2 APIs.
+
+Implementation plan
+-------------------
+Port output detection and modesetting code from the X server's Intel driver to
+the kernel's Intel DRM driver.  Get output detection and mode detection
+working, then add the high level management layer to the DRM and start adding
+support to other low level drivers.
+  - port VGA output code to the Intel DRM driver
+  - set modes on an external VGA device using an ioctl (throwaway)
+    - need i2c layer for DDC?
+  - port other output management code from the X driver
+    - need i2c layer
+  - write a new DRM layer to manage and enumerate output devices and displays
+  - modify Intel code to use new layer
+  - modify X server to use new API
+  - float on lkml
+  - revise, add support for other drivers, revise X code
+
+Structure
+---------
+
+Sources
+-------
+Linux FB layer
+X.Org Crtc, EDID and mode code
\ No newline at end of file
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/drm_crtc.c linux-2.6.21-rc4-modesetting/drivers/char/drm/drm_crtc.c
--- linux-2.6.21-rc4/drivers/char/drm/drm_crtc.c	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/drm_crtc.c	2007-03-29 17:23:00.000000000 -0700
@@ -0,0 +1,97 @@
+#include <linux/list.h>
+#include "drmP.h"
+#include "drm.h"
+#include "drm_crtc.h"
+
+/**
+ * drm_mode_add - add a mode to the specified output's mode list
+ * @output: output the new mode
+ * @mode: mode data
+ *
+ * Add @mode to @output's mode list for later use.
+ */
+void drm_mode_add(struct drm_output *output, struct drm_display_mode *mode)
+{
+	printk(KERN_ERR "adding mode %s to output %s\n", mode->name,
+	       output->name);
+	spin_lock(&output->modes_lock);
+	list_add(&mode->head, &output->modes);
+	spin_unlock(&output->modes_lock);
+}
+EXPORT_SYMBOL(drm_mode_add);
+
+/**
+ * drm_mode_remove - remove and free a mode
+ * @output: output list to modify
+ * @mode: mode to remove
+ *
+ * Remove @mode from @output's mode list, then free it.
+ */
+void drm_mode_remove(struct drm_output *output, struct drm_display_mode *mode)
+{
+	spin_lock(&output->modes_lock);
+	list_del(&mode->head);
+	spin_unlock(&output->modes_lock);
+	kfree(mode);
+}
+EXPORT_SYMBOL(drm_mode_remove);
+
+/*
+ * Probably belongs in the DRM device structure
+ */
+static DEFINE_SPINLOCK(drm_output_lock);
+static LIST_HEAD(drm_outputs);
+
+struct drm_output *drm_output_create(drm_device_t *dev,
+				     const struct drm_output_funcs *funcs,
+				     const char *name)
+{
+	struct drm_output *output;
+
+	if (!name) {
+		dev_printk(KERN_ERR, &dev->pdev->dev, "%s: name missing.\n",
+			   __FUNCTION__);
+		return NULL;
+	}
+
+	output = kmalloc(sizeof(struct drm_output), GFP_KERNEL);
+	if (!output)
+		return NULL;
+		
+	output->dev = dev;
+	output->funcs = funcs;
+	strncpy(output->name, name, DRM_OUTPUT_LEN);
+	output->name[DRM_OUTPUT_LEN - 1] = 0;
+	output->subpixel_order = SubPixelUnknown;
+	INIT_LIST_HEAD(&output->modes);
+	spin_lock_init(&output->modes_lock);
+	/* randr_output? */
+	/* output_set_monitor(output)? */
+	/* check for output_ignored(output)? */
+
+	spin_lock(&drm_output_lock);
+	list_add(&output->head, &drm_outputs);
+	spin_unlock(&drm_output_lock);
+
+	return output;
+}
+EXPORT_SYMBOL(drm_output_create);
+
+void drm_output_destroy(struct drm_output *output)
+{
+	struct drm_display_mode *mode, *t;
+
+	list_for_each_entry_safe(mode, t, &output->modes, head)
+		drm_mode_remove(output, mode);
+
+	spin_lock(&drm_output_lock);
+	list_del(&output->head);
+	spin_unlock(&drm_output_lock);
+	kfree(output);
+}
+EXPORT_SYMBOL(drm_output_destroy);
+
+bool drm_initial_config(drm_device_t *dev, bool can_grow)
+{
+	return 0;
+}
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/drm_crtc.h linux-2.6.21-rc4-modesetting/drivers/char/drm/drm_crtc.h
--- linux-2.6.21-rc4/drivers/char/drm/drm_crtc.h	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/drm_crtc.h	2007-03-29 17:13:02.000000000 -0700
@@ -0,0 +1,391 @@
+/*
+ * Copyright © 2006 Keith Packard
+ * Copyright © 2007 Intel Corporation
+ *   Jesse Barnes <jesse.barnes@intel.com>
+ */
+#ifndef __DRM_CRTC_H__
+#define __DRM_CRTC_H__
+
+#include <linux/i2c.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include "drmP.h"
+#include "drm.h"
+
+/*
+ * Note on terminology:  here, for brevity and convenience, we refer to output
+ * control chips as 'CRTCs'.  They can control any type of output, VGA, LVDS,
+ * DVI, etc.  And 'screen' refers to the whole of the visible display, which
+ * may span multiple monitors (and therefore multiple CRTC and output
+ * structures).
+ */
+
+enum drm_mode_status {
+    MODE_OK	= 0,	/* Mode OK */
+    MODE_HSYNC,		/* hsync out of range */
+    MODE_VSYNC,		/* vsync out of range */
+    MODE_H_ILLEGAL,	/* mode has illegal horizontal timings */
+    MODE_V_ILLEGAL,	/* mode has illegal horizontal timings */
+    MODE_BAD_WIDTH,	/* requires an unsupported linepitch */
+    MODE_NOMODE,	/* no mode with a maching name */
+    MODE_NO_INTERLACE,	/* interlaced mode not supported */
+    MODE_NO_DBLESCAN,	/* doublescan mode not supported */
+    MODE_NO_VSCAN,	/* multiscan mode not supported */
+    MODE_MEM,		/* insufficient video memory */
+    MODE_VIRTUAL_X,	/* mode width too large for specified virtual size */
+    MODE_VIRTUAL_Y,	/* mode height too large for specified virtual size */
+    MODE_MEM_VIRT,	/* insufficient video memory given virtual size */
+    MODE_NOCLOCK,	/* no fixed clock available */
+    MODE_CLOCK_HIGH,	/* clock required is too high */
+    MODE_CLOCK_LOW,	/* clock required is too low */
+    MODE_CLOCK_RANGE,	/* clock/mode isn't in a ClockRange */
+    MODE_BAD_HVALUE,	/* horizontal timing was out of range */
+    MODE_BAD_VVALUE,	/* vertical timing was out of range */
+    MODE_BAD_VSCAN,	/* VScan value out of range */
+    MODE_HSYNC_NARROW,	/* horizontal sync too narrow */
+    MODE_HSYNC_WIDE,	/* horizontal sync too wide */
+    MODE_HBLANK_NARROW,	/* horizontal blanking too narrow */
+    MODE_HBLANK_WIDE,	/* horizontal blanking too wide */
+    MODE_VSYNC_NARROW,	/* vertical sync too narrow */
+    MODE_VSYNC_WIDE,	/* vertical sync too wide */
+    MODE_VBLANK_NARROW,	/* vertical blanking too narrow */
+    MODE_VBLANK_WIDE,	/* vertical blanking too wide */
+    MODE_PANEL,         /* exceeds panel dimensions */
+    MODE_INTERLACE_WIDTH, /* width too large for interlaced mode */
+    MODE_ONE_WIDTH,     /* only one width is supported */
+    MODE_ONE_HEIGHT,    /* only one height is supported */
+    MODE_ONE_SIZE,      /* only one resolution is supported */
+    MODE_NO_REDUCED,    /* monitor doesn't accept reduced blanking */
+    MODE_BAD = -2,	/* unspecified reason */
+    MODE_ERROR	= -1	/* error condition */
+};
+
+#define DRM_MODE_TYPE_BUILTIN	(1<<0)
+#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_PREFERRED	(1<<3)
+#define DRM_MODE_TYPE_DEFAULT	(1<<4)
+#define DRM_MODE_TYPE_USERDEF	(1<<5)
+#define DRM_MODE_TYPE_DRIVER	(1<<6)
+
+#define DRM_MODE_TYPE_CLOCK_CRTC_C (DRM_MODE_TYPE_CLOCK_C | \
+				    DRM_MODE_TYPE_CRTC_C)
+
+#define DRM_DISPLAY_MODE_LEN 32
+
+#define DRM_MODE(nm, t, c, hd, hss, hse, ht, hsk, vd, vss, vse, vt, vs, f) \
+	.name = nm, .status = 0, .type = (t), .clock = (c), \
+	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
+	.htotal = (ht), .hskew = (hsk), .vdisplay = (vd), \
+	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
+	.vscan = (vs), .flags = (f)
+
+struct drm_display_mode {
+	/* Header */
+	struct list_head head;
+	char name[DRM_DISPLAY_MODE_LEN];
+	enum drm_mode_status status;
+	int type;
+
+	/* Proposed mode values */
+	int clock;
+	int hdisplay;
+	int hsync_start;
+	int hsync_end;
+	int htotal;
+	int hskew;
+	int vdisplay;
+	int vsync_start;
+	int vsync_end;
+	int vtotal;
+	int vscan;
+	unsigned int flags;
+
+	/* Actual mode we give to hw */
+	int clock_index;
+	int synth_clock;
+	int crtc_hdisplay;
+	int crtc_hblank_start;
+	int crtc_hsync_start;
+	int crtc_hblank_end;
+	int crtc_htotal;
+	int crtc_hskew;
+	int crtc_vdisplay;
+	int crtc_vblank_start;
+	int crtc_vblank_end;
+	int crtc_vsync_start;
+	int crtc_vsync_end;
+	int crtc_vtotal;
+	int crtc_hadjusted;
+	int crtc_vadjusted;
+
+	/* Driver private mode info */
+	int private_size;
+	int *private;
+	int private_flags;
+
+	float hsync, vrefresh;
+};
+
+/* Video mode flags */
+#define V_PHSYNC	(1<<0)
+#define V_NHSYNC	(1<<1)
+#define V_PVSYNC	(1<<2)
+#define V_NVSYNC	(1<<3)
+#define V_INTERLACE	(1<<4)
+#define V_DBLSCAN	(1<<5)
+#define V_CSYNC		(1<<6)
+#define V_PCSYNC	(1<<7)
+#define V_NCSYNC	(1<<8)
+#define V_HSKEW		(1<<9) /* hskew provided */
+#define V_BCAST		(1<<10)
+#define V_PIXMUX	(1<<11)
+#define V_DBLCLK	(1<<12)
+#define V_CLKDIV2	(1<<13)
+
+enum drm_output_status {
+	output_status_connected,
+	output_status_disconnected,
+	output_status_unknown,
+};
+
+enum subpixel_order {
+	SubPixelUnknown = 0,
+	SubPixelHorizontalRGB,
+	SubPixelHorizontalBGR,
+	SubPixelVerticalRGB,
+	SubPixelVerticalBGR,
+	SubPixelNone,
+};
+
+struct drm_crtc;
+struct drm_output;
+
+/**
+ * drm_crtc_funcs - control CRTCs for a given device
+ * @dpms: control display power levels
+ * @save: save CRTC state
+ * @resore: restore CRTC state
+ * @lock: lock the CRTC
+ * @unlock: unlock the CRTC
+ * @shadow_allocate: allocate shadow pixmap
+ * @shadow_create: create shadow pixmap for rotation support
+ * @shadow_destroy: free shadow pixmap
+ * @mode_fixup: fixup proposed mode
+ * @mode_set: set the desired mode on the CRTC
+ * @gamma_set: specify color ramp for CRTC
+ * @cleanup: cleanup driver private state prior to close
+ *
+ * The drm_crtc_funcs structure is the central CRTC management structure
+ * in the DRM.  Each CRTC controls one or more outputs (note that the name
+ * CRTC is simply historical, a CRTC may control LVDS, VGA, DVI, TV out, etc.
+ * outputs, not just CRTs).
+ *
+ * Each driver is responsible for filling out this structure at startup time,
+ * in addition to providing other modesetting features, like i2c and DDC
+ * bus accessors.
+ */
+struct drm_crtc_funcs {
+	/*
+	 * Control power levels on the CRTC.  If the mode passed in is
+	 * unsupported, the provider must use the next lowest power level.
+	 */
+	void (*dpms)(struct drm_crtc *crtc, int mode);
+
+	/* JJJ:  Are these needed? */
+	/* Save CRTC state */
+	void (*save)(struct drm_crtc *crtc); /* suspend? */
+	/* Restore CRTC state */
+	void (*restore)(struct drm_crtc *crtc); /* resume? */
+	bool (*lock)(struct drm_crtc *crtc);
+	void (*unlock)(struct drm_crtc *crtc);
+
+	/* Rotation related shadow buffers */
+	void (*shadow_allocate)(struct drm_crtc *crtc, int width, int height);
+	void *(*shadow_create)(struct drm_crtc *crtc, void *data, int width,
+			       int height);
+	void (*shadow_destroy)(struct drm_crtc *crtc, void *pPixmap,
+			       void *data);
+
+	/* Provider can fixup or change mode timings before modeset occurs */
+	bool (*mode_fixup)(struct drm_crtc *crtc,
+			   struct drm_display_mode *mode,
+			   struct drm_display_mode *adjusted_mode);
+	/* Actually set the mode */
+	void (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode,
+			 struct drm_display_mode *adjusted_mode, int x, int y);
+	/* Set gamma on the CRTC */
+	void (*gamma_set)(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
+			  int size);
+	/* Driver cleanup routine */
+	void (*cleanup)(struct drm_crtc *crtc);
+};
+
+/**
+ * drm_crtc - central CRTC control structure
+ * @enabled: is this CRTC enabled?
+ * @x: x position on screen
+ * @y: y position on screen
+ * @desired_mode: new desired mode
+ * @desired_x: desired x for desired_mode
+ * @desired_y: desired y for desired_mode
+ * @funcs: CRTC control functions
+ * @driver_private: arbitrary driver data
+ *
+ * Each CRTC may have one or more outputs associated with it.  This structure
+ * allows the CRTC to be controlled.
+ */
+struct drm_crtc {
+	drm_device_t *dev;
+	bool enabled;
+
+	/* JJJ: are these needed? */
+	bool cursor_in_range;
+	bool cursor_shown;
+
+	struct drm_display_mode mode;
+
+	/*
+	  Rotation rotation;
+	  PixmapPtr rotatedPixmap;
+	  void *rotatedData;
+	*/
+
+	int x, y;
+	struct drm_display_mode desired_mode;
+	/* Rotation desiredRotation; */
+	int desired_x, desired_y;
+	const struct drm_crtc_funcs *funcs;
+	void *driver_private;
+
+	/* RRCrtcPtr randr_crtc? */
+};
+
+/**
+ * drm_output_funcs - control outputs on a given device
+ * @init: setup this output
+ * @dpms: set power state (see drm_crtc_funcs above)
+ * @save: save output state
+ * @restore: restore output state
+ * @mode_valid: is this mode valid on the given output?
+ * @mode_fixup: try to fixup proposed mode for this output
+ * @mode_set: set this mode
+ * @detect: is this output active?
+ * @get_modes: get mode list for this output
+ * @set_property: property for this output may need update
+ * @cleanup: output is going away, cleanup
+ *
+ * Each CRTC may have one or more outputs attached to it.  The functions
+ * below allow the core DRM code to control outputs, enumerate available modes,
+ * etc.
+ */
+struct drm_output_funcs {
+	void (*init)(struct drm_output *output);
+	void (*dpms)(struct drm_output *output, int mode);
+	void (*save)(struct drm_output *output);
+	void (*restore)(struct drm_output *output);
+	void (*mode_valid)(struct drm_output *output,
+			   struct drm_display_mode *mode);
+	bool (*mode_fixup)(struct drm_output *output,
+			   struct drm_display_mode *mode,
+			   struct drm_display_mode *adjusted_mode);
+	void (*mode_set)(struct drm_output *output,
+			 struct drm_display_mode *mode,
+			 struct drm_display_mode *adjusted_mode);
+	enum drm_output_status (*detect)(struct drm_output *output);
+	struct drm_display_mode *(*get_modes)(struct drm_output *output);
+	/* JJJ: type checking for properties via property value type */
+	bool (*set_property)(struct drm_output *output, int prop, void *val);
+	void (*cleanup)(struct drm_output *output);
+};
+
+#define DRM_OUTPUT_LEN 32
+/**
+ * drm_output - central DRM output control structure
+ * @crtc: CRTC this output is currently connected to, NULL if none
+ * @possible_crtcs: bitmap of CRTCS this output could be attached to
+ * @possible_clones: bitmap of possible outputs this output could clone
+ * @interlace_allowed: can this output handle interlaced modes?
+ * @doublescan_allowed: can this output handle doublescan?
+ * @available_modes: modes available on this output (from get_modes() + user)
+ * @initial_x: initial x position for this output
+ * @initial_y: initial y position for this output
+ * @status: output connected?
+ * @subpixel_order: for this output
+ * @mm_width: displayable width of output in mm
+ * @mm_height: displayable height of output in mm
+ * @name: name of output (should be one of a few standard names)
+ * @funcs: output control functions
+ * @driver_private: private driver data
+ *
+ * Each output may be connected to one or more CRTCs, or may be clonable by
+ * another output if they can share a CRTC.  Each output also has a specific
+ * position in the broader display (referred to as a 'screen' though it could
+ * span multiple monitors).
+ */
+struct drm_output {
+	drm_device_t *dev;
+	struct list_head head;
+	struct drm_crtc *crtc;
+	unsigned long possible_crtcs;
+	unsigned long possible_clones;
+	bool interlace_allowed;
+	bool doublescan_allowed;
+	spinlock_t modes_lock;
+	struct list_head modes; /* list of modes on this output */
+	/*
+	  OptionInfoPtr options;
+	  XF86ConfMonitorPtr conf_monitor;
+	 */
+	int initial_x, initial_y;
+	/* Rotation initial_rotation */
+	enum drm_output_status status;
+	/* xf86MonPtr MonInfo; */
+	enum subpixel_order subpixel_order;
+	int mm_width, mm_height;
+	char name[DRM_OUTPUT_LEN];
+	const struct drm_output_funcs *funcs;
+	void *driver_private;
+	/* RROutputPtr randr_output? */
+};
+
+/**
+ * struct drm_crtc_config_funcs - configure CRTCs for a given screen layout
+ * @resize: adjust CRTCs as necessary for the proposed layout
+ *
+ * Currently only a resize hook is available.  DRM will call back into the
+ * driver with a new screen width and height.  If the driver can't support
+ * the proposed size, it can return false.  Otherwise it should adjust
+ * the CRTC<->output mappings as needed and update its view of the screen.
+ */
+struct drm_crtc_config_funcs {
+	bool (*resize)(drm_device_t *dev, int width, int height);
+};
+
+/**
+ * drm_crtc_config - CRTC configuration control structure
+ *
+ */
+struct drm_crtc_config {
+	int num_output;
+	struct drm_output *output;
+	/* int compat_output? */
+	int num_crtc;
+	struct drm_crtc *crtc;
+	int min_width, min_height;
+	int max_width, max_height;
+	/* DamagePtr rotationDamage? */
+	/* DGA stuff? */
+	struct drm_crtc_config_funcs *funcs;
+};
+
+struct drm_output *drm_output_create(drm_device_t *dev,
+				     const struct drm_output_funcs *funcs,
+				     const char *name);
+void drm_output_destroy(struct drm_output *output);
+
+int drm_add_edid_modes(struct drm_output *output,
+			struct i2c_adapter *adapter);
+void drm_mode_add(struct drm_output *output, struct drm_display_mode *mode);
+
+#endif /* __DRM_CRTC_H__ */
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/drm_edid.c linux-2.6.21-rc4-modesetting/drivers/char/drm/drm_edid.c
--- linux-2.6.21-rc4/drivers/char/drm/drm_edid.c	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/drm_edid.c	2007-03-29 17:15:10.000000000 -0700
@@ -0,0 +1,526 @@
+#include <linux/i2c.h>
+#include <linux/fb.h>
+#include "intel_drv.h"
+
+/*
+ * DDC/EDID probing rippped off from FB layer
+ */
+
+#include "../../video/edid.h"
+#define DDC_ADDR 0x50
+
+#ifdef BIG_ENDIAN
+#error "EDID structure is little endian, need big endian versions"
+#endif
+
+struct est_timings {
+	u8 t1;
+	u8 t2;
+	u8 mfg_rsvd;
+} __attribute__((packed));
+
+struct std_timing {
+	u8 hsize; /* need to multiply by 8 then add 248 */
+	u8 vfreq:6; /* need to add 60 */
+	u8 aspect_ratio:2; /* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */
+} __attribute__((packed));
+
+/* If detailed data is pixel timing */
+struct detailed_pixel_timing {
+	u8 hactive_lo;
+	u8 hblank_lo;
+	u8 hblank_hi:4;
+	u8 hactive_hi:4;
+	u8 vactive_lo;
+	u8 vblank_lo;
+	u8 vblank_hi:4;
+	u8 vactive_hi:4;
+	u8 hsync_offset_lo;
+	u8 hsync_pulse_width_lo;
+	u8 vsync_pulse_width_lo:4;
+	u8 vsync_offset_lo:4;
+	u8 hsync_pulse_width_hi:2;
+	u8 hsync_offset_hi:2;
+	u8 vsync_pulse_width_hi:2;
+	u8 vsync_offset_hi:2;
+	u8 width_mm_lo;
+	u8 height_mm_lo;
+	u8 height_mm_hi:4;
+	u8 width_mm_hi:4;
+	u8 hborder;
+	u8 vborder;
+	u8 unknown0:1;
+	u8 vsync_positive:1;
+	u8 hsync_positive:1;
+	u8 separate_sync:2;
+	u8 stereo:1;
+	u8 unknown6:1;
+	u8 interlaced:1;
+} __attribute__((packed));
+
+/* If it's not pixel timing, it'll be one of the below */
+struct detailed_data_string {
+	u8 str[13];
+} __attribute__((packed));
+
+struct detailed_data_monitor_range {
+	u8 min_vfreq;
+	u8 max_vfreq;
+	u8 min_hfreq_khz;
+	u8 max_hfreq_khz;
+	u8 pixel_clock_mhz; /* need to multiply by 10 */
+	u16 sec_gtf_toggle; /* A000=use above, 20=use below */
+	u8 hfreq_start_khz; /* need to multiply by 2 */
+	u8 c; /* need to divide by 2 */
+	u16 m;
+	u8 k;
+	u8 j; /* need to divide by 2 */
+} __attribute__((packed));
+
+struct detailed_data_wpindex {
+	u8 white_y_lo:2;
+	u8 white_x_lo:2;
+	u8 pad:4;
+	u8 white_x_hi;
+	u8 white_y_hi;
+	u8 gamma; /* need to divide by 100 then add 1 */
+} __attribute__((packed));
+
+struct detailed_data_color_point {
+	u8 windex1;
+	u8 wpindex1[3];
+	u8 windex2;
+	u8 wpindex2[3];
+} __attribute__((packed));
+
+struct detailed_non_pixel {
+	u8 pad1;
+	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
+		    fb=color point data, fa=standard timing data,
+		    f9=undefined, f8=mfg. reserved */
+	u8 pad2;
+	union {
+		struct detailed_data_string str;
+		struct detailed_data_monitor_range range;
+		struct detailed_data_wpindex color;
+		struct std_timing timings[5];
+	} data;
+} __attribute__((packed));
+
+#define EDID_DETAIL_STD_MODES 0xfa
+#define EDID_DETAIL_CPDATA 0xfb
+#define EDID_DETAIL_NAME 0xfc
+#define EDID_DETAIL_RANGE 0xfd
+#define EDID_DETAIL_STRING 0xfe
+#define EDID_DETAIL_SERIAL 0xff
+
+struct detailed_timing {
+	u16 pixel_clock; /* need to multiply by 10 KHz */
+	union {
+		struct detailed_pixel_timing pixel_data;
+		struct detailed_non_pixel other_data;
+	} data;
+} __attribute__((packed));
+
+struct edid {
+	u8 header[8];
+	/* Vendor & product info */
+	u16 mfg_id;
+	u16 prod_code;
+	u32 serial;
+	u8 mfg_week;
+	u8 mfg_year;
+	/* EDID version */
+	u8 version;
+	u8 revision;
+	/* Display info: */
+	/*   input definition */
+	u8 serration_vsync:1;
+	u8 sync_on_green:1;
+	u8 composite_sync:1;
+	u8 separate_syncs:1;
+	u8 blank_to_black:1;
+	u8 video_level:2;
+	u8 digital:1; /* bits below must be zero if set */
+	u8 width_cm;
+	u8 height_cm;
+	u8 gamma;
+	/*   feature support */
+	u8 default_gtf:1;
+	u8 preferred_timing:1;
+	u8 standard_color:1;
+	u8 display_type:2; /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
+	u8 pm_active_off:1;
+	u8 pm_suspend:1;
+	u8 pm_standby:1;
+	/* Color characteristics */
+	u8 red_green_lo;
+	u8 black_white_lo;
+	u8 red_x;
+	u8 red_y;
+	u8 green_x;
+	u8 green_y;
+	u8 blue_x;
+	u8 blue_y;
+	u8 white_x;
+	u8 white_y;
+	/* Est. timings and mfg rsvd timings*/
+	struct est_timings established_timings;
+	/* Standard timings 1-8*/
+	struct std_timing standard_timings[8];
+	/* Detailing timings 1-4 */
+	struct detailed_timing detailed_timings[4];
+	/* Number of 128 byte ext. blocks */
+	u8 extensions;
+	/* Checksum */
+	u8 checksum;
+} __attribute__((packed));
+
+static u8 edid_header[] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
+
+static bool edid_valid(struct edid *edid)
+{
+	int i;
+	u8 csum = 0;
+	u8 *raw_edid = (u8 *)edid;
+
+	if (memcmp(edid->header, edid_header, sizeof(edid_header)))
+		goto bad;
+	if (edid->version != 1)
+		goto bad;
+	if (edid->revision <= 0 || edid->revision > 3)
+		goto bad;
+
+	for (i = 0; i < EDID_LENGTH; i++)
+		csum += raw_edid[i];
+	if (csum)
+		goto bad;
+
+	return 1;
+
+bad:
+	return 0;
+}
+
+struct drm_display_mode *drm_mode_dup(struct drm_display_mode *m)
+{
+	struct drm_display_mode *new_mode;
+
+	new_mode = kmalloc(sizeof(struct drm_display_mode), GFP_KERNEL);
+	if (!new_mode)
+		return NULL;
+
+	*new_mode = *m;
+	return new_mode;
+}
+
+/**
+ * drm_mode_std - convert standard mode info (width, height, refresh) into mode
+ * @t: standard timing params
+ *
+ * Take the standard timing params (in this case width, aspect, and refresh)
+ * and convert them into a real mode using CVT.
+ *
+ * Punts for now.
+ */
+struct drm_display_mode *drm_mode_std(struct std_timing *t)
+{
+//	struct fb_videomode mode;
+
+//	fb_find_mode_cvt(&mode, 0, 0);
+	/* JJJ:  convert to drm_display_mode */
+	struct drm_display_mode *mode;
+	int hsize = t->hsize * 8 + 248, vsize;
+
+	mode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL);
+	if (!mode)
+		return NULL;
+
+	if (t->aspect_ratio == 0)
+		vsize = (hsize * 10) / 16;
+	else if (t->aspect_ratio == 1)
+		vsize = (hsize * 3) / 4;
+	else if (t->aspect_ratio == 2)
+		vsize = (hsize * 4) / 5;
+	else
+		vsize = (hsize * 9) / 16;
+
+	snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d", hsize, vsize);
+
+	return mode;
+}
+
+struct drm_display_mode *drm_mode_detailed(struct detailed_timing *timing,
+					   bool preferred)
+{
+	struct drm_display_mode *mode;
+	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
+
+	if (pt->stereo) {
+		printk(KERN_ERR "stereo mode not supported\n");
+		return NULL;
+	}
+	if (!pt->separate_sync) {
+		printk(KERN_ERR "integrated sync not supported\n");
+		return NULL;
+	}
+
+	mode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL);
+	if (!mode)
+		return NULL;
+
+	mode->type = DRM_MODE_TYPE_DRIVER;
+	mode->type |= preferred ? DRM_MODE_TYPE_PREFERRED : 0;
+	mode->clock = timing->pixel_clock / 100;
+
+	mode->hdisplay = (pt->hactive_hi << 8) | pt->hactive_lo;
+	mode->hsync_start = mode->hdisplay + ((pt->hsync_offset_hi << 8) |
+					      pt->hsync_offset_lo);
+	mode->hsync_end = mode->hsync_start +
+		((pt->hsync_pulse_width_hi << 8) |
+		 pt->hsync_pulse_width_lo);
+	mode->htotal = mode->hdisplay + ((pt->hblank_hi << 8) | pt->hblank_lo);
+
+	mode->vdisplay = (pt->vactive_hi << 8) | pt->vactive_lo;
+	mode->vsync_start = mode->vdisplay + ((pt->vsync_offset_hi << 8) |
+					      pt->vsync_offset_lo);
+	mode->vsync_end = mode->vsync_start +
+		((pt->vsync_pulse_width_hi << 8) |
+		 pt->vsync_pulse_width_lo);
+	mode->vtotal = mode->vdisplay + ((pt->vblank_hi << 8) | pt->vblank_lo);
+
+	snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d", mode->hdisplay,
+		 mode->vdisplay);
+
+	if (pt->interlaced)
+		mode->flags |= V_INTERLACE;
+
+	mode->flags |= pt->hsync_positive ? V_PHSYNC : V_NHSYNC;
+	mode->flags |= pt->vsync_positive ? V_PVSYNC : V_NVSYNC;
+
+	return mode;
+}
+
+static struct drm_display_mode established_modes[] = {
+	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
+		   968, 1056, 0, 600, 601, 605, 628, 0,
+		   V_PHSYNC | V_PVSYNC) }, /* 800x600@60Hz */
+	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
+		   896, 1024, 0, 600, 601, 603,  625, 0,
+		   V_PHSYNC | V_PVSYNC) }, /* 800x600@56Hz */
+	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
+		   720, 840, 0, 480, 481, 484, 500, 0,
+		   V_NHSYNC | V_NVSYNC) }, /* 640x480@75Hz */
+	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
+		   704,  832, 0, 480, 489, 491, 520, 0,
+		   V_NHSYNC | V_NVSYNC) }, /* 640x480@72Hz */
+	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
+		   768,  864, 0, 480, 483, 486, 525, 0,
+		   V_NHSYNC | V_NVSYNC) }, /* 640x480@67Hz */
+	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
+		   752, 800, 0, 480, 490, 492, 525, 0,
+		   V_NHSYNC | V_NVSYNC) }, /* 640x480@60Hz */
+	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
+		   846, 900, 0, 400, 421, 423,  449, 0,
+		   V_NHSYNC | V_NVSYNC) }, /* 720x400@88Hz */
+	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
+		   846,  900, 0, 400, 412, 414, 449, 0,
+		   V_NHSYNC | V_PVSYNC) }, /* 720x400@70Hz */
+	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
+		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
+		   V_PHSYNC | V_PVSYNC) }, /* 1280x1024@75Hz */
+	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
+		   1136, 1312, 0,  768, 769, 772, 800, 0,
+		   V_PHSYNC | V_PVSYNC) }, /* 1024x768@75Hz */
+	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
+		   1184, 1328, 0,  768, 771, 777, 806, 0,
+		   V_NHSYNC | V_NVSYNC) }, /* 1024x768@70Hz */
+	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
+		   1184, 1344, 0,  768, 771, 777, 806, 0,
+		   V_NHSYNC | V_NVSYNC) }, /* 1024x768@60Hz */
+	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
+		   1208, 1264, 0, 768, 768, 776, 817, 0,
+		   V_PHSYNC | V_PVSYNC | V_INTERLACE) }, /* 1024x768@43Hz */
+	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
+		   928, 1152, 0, 624, 625, 628, 667, 0,
+		   V_NHSYNC | V_NVSYNC) }, /* 832x624@75Hz */
+	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
+		   896, 1056, 0, 600, 601, 604,  625, 0,
+		   V_PHSYNC | V_PVSYNC) }, /* 800x600@75Hz */
+	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
+		   976, 1040, 0, 600, 637, 643, 666, 0,
+		   V_PHSYNC | V_PVSYNC) }, /* 800x600@72Hz */
+	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
+		   1344, 1600, 0,  864, 865, 868, 900, 0,
+		   V_PHSYNC | V_PVSYNC) }, /* 1152x864@75Hz */
+};
+
+#define EDID_EST_TIMINGS 16
+#define EDID_STD_TIMINGS 8
+#define EDID_DETAILED_TIMINGS 4
+
+/**
+ * add_established_modes - get est. modes from EDID and add them
+ * @edid: EDID block to scan
+ *
+ * Each EDID block contains a bitmap of the supported "established modes" list
+ * (defined above).  Tease them out and add them to the global modes list.
+ */
+static int add_established_modes(struct drm_output *output, struct edid *edid)
+{
+	unsigned long est_bits = edid->established_timings.t1 |
+		(edid->established_timings.t2 << 8) |
+		((edid->established_timings.mfg_rsvd & 0x80) << 9);
+	int i, modes = 0;
+
+	for (i = 0; i <= EDID_EST_TIMINGS; i++)
+		if (est_bits & (1<<i)) {
+			drm_mode_add(output,
+				     drm_mode_dup(&established_modes[i]));
+			modes++;
+		}
+
+	return modes;
+}
+
+/**
+ * add_established_modes - get std. modes from EDID and add them
+ * @edid: EDID block to scan
+ *
+ * Standard modes can be calculated using the CVT standard.  Grab them from
+ * @edid, calculate them, and add them to the list.
+ */
+static int add_standard_modes(struct drm_output *output, struct edid *edid)
+{
+	int i, modes = 0;
+
+	for (i = 0; i < EDID_STD_TIMINGS; i++) {
+		struct std_timing *t = &edid->standard_timings[i];
+
+		/* If std timings bytes are 1, 1 it's empty */
+		if (t->hsize == 1 && (t->aspect_ratio | t->vfreq) == 1)
+			continue;
+
+		drm_mode_add(output,
+			     drm_mode_std(&edid->standard_timings[i]));
+		modes++;
+	}
+
+	return modes;
+}
+
+/**
+ * add_detailed_modes - get detailed mode info from EDID data
+ * @edid: EDID block to scan
+ *
+ * Some of the detailed timing sections may contain mode information.  Grab
+ * it and add it to the list.
+ */
+static int add_detailed_info(struct drm_output *output, struct edid *edid)
+{
+	int i, j, modes = 0;
+	bool preferred = 0;
+
+	for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
+		struct detailed_timing *timing = &edid->detailed_timings[i];
+		struct detailed_non_pixel *data = &timing->data.other_data;
+
+		/* EDID up to and including 1.2 may put monitor info here */
+		if (edid->version == 1 && edid->revision < 3)
+			continue;
+
+		/* Detailed mode timing */
+		if (timing->pixel_clock) {
+			if (i == 0 && edid->preferred_timing)
+				preferred = 1;
+			drm_mode_add(output,
+				     drm_mode_detailed(timing, preferred));
+			modes++;
+			continue;
+		}
+
+		/* Other timing or info */
+		switch (data->type) {
+		case EDID_DETAIL_SERIAL:
+			break;
+		case EDID_DETAIL_STRING:
+			break;
+		case EDID_DETAIL_RANGE:
+			break;
+		case EDID_DETAIL_NAME:
+			break;
+		case EDID_DETAIL_CPDATA:
+			break;
+		case EDID_DETAIL_STD_MODES:
+			/* Five modes per detailed section */
+			for (j = 0; j < 5; i++) {
+				struct std_timing *std;
+
+				std = &data->data.timings[j];
+				drm_mode_add(output, drm_mode_std(std));
+				modes++;
+			}
+			break;
+		default:
+			break;
+		}
+	}
+
+	return modes;
+}
+
+/**
+ * drm_add_edid_modes - add modes from EDID data, if available
+ * @output: output we're probing
+ * @adapter: i2c adapter to use for DDC
+ *
+ * Poke the given output's i2c channel to grab EDID data if possible.  If we
+ * get any, add the specified modes to the output's mode list.
+ *
+ * Return number of modes added or 0 if we couldn't find any.
+ */
+int drm_add_edid_modes(struct drm_output *output, struct i2c_adapter *adapter)
+{
+	struct edid *edid;
+	u8 *raw_edid;
+	int i, est_modes, std_modes, det_modes;
+
+	edid = (struct edid *)fb_ddc_read(adapter);
+
+	if (!edid) {
+		dev_warn(&output->dev->pdev->dev, "no EDID data\n");
+		goto out_err;
+	}
+
+	if (!edid_valid(edid)) {
+		dev_warn(&output->dev->pdev->dev, "EDID invalid, ignoring.\n");
+		goto out_err;
+	}
+
+	est_modes = add_established_modes(output, edid);
+	std_modes = add_standard_modes(output, edid);
+	det_modes = add_detailed_info(output, edid);
+	printk(KERN_ERR "est modes: %d, std_modes: %d, det_modes: %d\n",
+	       est_modes, std_modes, det_modes);
+
+	raw_edid = (u8 *)edid;
+	printk(KERN_ERR "EDID:\n" KERN_ERR);
+	for (i = 0; i < EDID_LENGTH; i++) {
+		if (i != 0 && ((i % 16) == 0))
+		    printk("\n" KERN_ERR);
+		printk("%02x", raw_edid[i] & 0xff);
+	}
+	printk("\n");
+
+	printk(KERN_ERR "EDID info:\n");
+	printk(KERN_ERR "  mfg_id: 0x%04x\n", edid->mfg_id);
+	printk(KERN_ERR "  digital?  %s\n", edid->digital ? "Yes" : "No");
+	printk(KERN_ERR "  extensions: %d\n", edid->extensions);
+
+	return est_modes + std_modes + det_modes;
+
+out_err:
+	kfree(edid);
+	return 0;
+}
+EXPORT_SYMBOL(drm_add_edid_modes);
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/i915_dma.c linux-2.6.21-rc4-modesetting/drivers/char/drm/i915_dma.c
--- linux-2.6.21-rc4/drivers/char/drm/i915_dma.c	2007-03-15 17:20:01.000000000 -0700
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/i915_dma.c	2007-03-22 17:48:21.000000000 -0700
@@ -31,11 +31,6 @@
 #include "i915_drm.h"
 #include "i915_drv.h"
 
-#define IS_I965G(dev) (dev->pci_device == 0x2972 || \
-		       dev->pci_device == 0x2982 || \
-		       dev->pci_device == 0x2992 || \
-		       dev->pci_device == 0x29A2)
-
 /* Really want an OS-independent resettable timer.  Would like to have
  * this loop run for (eg) 3 sec, but have the timer reset every time
  * the head pointer changes, so that EBUSY only happens if the ring
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/i915_drm.h linux-2.6.21-rc4-modesetting/drivers/char/drm/i915_drm.h
--- linux-2.6.21-rc4/drivers/char/drm/i915_drm.h	2007-03-15 17:20:01.000000000 -0700
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/i915_drm.h	2007-03-21 08:41:51.000000000 -0700
@@ -142,6 +142,7 @@ typedef struct _drm_i915_sarea {
 #define DRM_I915_SET_VBLANK_PIPE	0x0d
 #define DRM_I915_GET_VBLANK_PIPE	0x0e
 #define DRM_I915_VBLANK_SWAP	0x0f
+#define DRM_I915_BACKLIGHT	0x40
 
 #define DRM_IOCTL_I915_INIT		DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
 #define DRM_IOCTL_I915_FLUSH		DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -159,6 +160,7 @@ typedef struct _drm_i915_sarea {
 #define DRM_IOCTL_I915_SET_VBLANK_PIPE	DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
 #define DRM_IOCTL_I915_GET_VBLANK_PIPE	DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
 #define DRM_IOCTL_I915_VBLANK_SWAP	DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
+#define DRM_IOCTL_I915_BACKLIGHT	DRM_IO(DRM_COMMAND_BASE + DRM_I915_BACKLIGHT)
 
 /* Allow drivers to submit batchbuffers directly to hardware, relying
  * on the security mechanisms provided by hardware.
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/i915_drv.h linux-2.6.21-rc4-modesetting/drivers/char/drm/i915_drv.h
--- linux-2.6.21-rc4/drivers/char/drm/i915_drv.h	2007-03-15 17:20:01.000000000 -0700
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/i915_drv.h	2007-03-21 14:13:01.000000000 -0700
@@ -30,6 +30,9 @@
 #ifndef _I915_DRV_H_
 #define _I915_DRV_H_
 
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+
 /* General customization:
  */
 
@@ -208,6 +211,29 @@ extern int i915_wait_ring(drm_device_t *
 #define I915REG_INT_MASK_R 	0x020a8
 #define I915REG_INT_ENABLE_R	0x020a0
 
+#define GPIOA			0x5010
+#define GPIOB			0x5014
+#define GPIOC			0x5018
+#define GPIOD			0x501c
+#define GPIOE			0x5020
+#define GPIOF			0x5024
+#define GPIOG			0x5028
+#define GPIOH			0x502c
+# define GPIO_CLOCK_DIR_MASK		(1 << 0)
+# define GPIO_CLOCK_DIR_IN		(0 << 1)
+# define GPIO_CLOCK_DIR_OUT		(1 << 1)
+# define GPIO_CLOCK_VAL_MASK		(1 << 2)
+# define GPIO_CLOCK_VAL_OUT		(1 << 3)
+# define GPIO_CLOCK_VAL_IN		(1 << 4)
+# define GPIO_CLOCK_PULLUP_DISABLE	(1 << 5)
+# define GPIO_DATA_DIR_MASK		(1 << 8)
+# define GPIO_DATA_DIR_IN		(0 << 9)
+# define GPIO_DATA_DIR_OUT		(1 << 9)
+# define GPIO_DATA_VAL_MASK		(1 << 10)
+# define GPIO_DATA_VAL_OUT		(1 << 11)
+# define GPIO_DATA_VAL_IN		(1 << 12)
+# define GPIO_DATA_PULLUP_DISABLE	(1 << 13)
+
 #define SRX_INDEX		0x3c4
 #define SRX_DATA		0x3c5
 #define SR01			1
@@ -216,6 +242,8 @@ extern int i915_wait_ring(drm_device_t *
 #define PPCR			0x61204
 #define PPCR_ON			(1<<0)
 
+#define DVOA			0x61120
+#define DVOA_ON			(1<<31)
 #define DVOB			0x61140
 #define DVOB_ON			(1<<31)
 #define DVOC			0x61160
@@ -294,4 +322,31 @@ extern int i915_wait_ring(drm_device_t *
 
 #define READ_BREADCRUMB(dev_priv) (((u32 *)(dev_priv->hw_status_page))[5])
 
+#define BLC_PWM_CTL		0x61254
+#define BACKLIGHT_MODULATION_FREQ_SHIFT		(17)
+/**
+ * This is the most significant 15 bits of the number of backlight cycles in a
+ * complete cycle of the modulated backlight control.
+ *
+ * The actual value is this field multiplied by two.
+ */
+#define BACKLIGHT_MODULATION_FREQ_MASK		(0x7fff << 17)
+#define BLM_LEGACY_MODE				(1 << 16)
+/**
+ * This is the number of cycles out of the backlight modulation cycle for which
+ * the backlight is on.
+ *
+ * This field must be no greater than the number of cycles in the complete
+ * backlight modulation cycle.
+ */
+#define BACKLIGHT_DUTY_CYCLE_SHIFT		(0)
+#define BACKLIGHT_DUTY_CYCLE_MASK		(0xffff)
+
+#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
+		       (dev)->pci_device == 0x2982 || \
+		       (dev)->pci_device == 0x2992 || \
+		       (dev)->pci_device == 0x29A2)
+#define IS_I830(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82830_CGC)
+#define IS_845G(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82845G_IG)
+
 #endif
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/i915_irq.c linux-2.6.21-rc4-modesetting/drivers/char/drm/i915_irq.c
--- linux-2.6.21-rc4/drivers/char/drm/i915_irq.c	2007-03-15 17:20:01.000000000 -0700
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/i915_irq.c	2007-03-22 17:46:02.000000000 -0700
@@ -576,6 +576,10 @@ void i915_driver_irq_preinstall(drm_devi
 	I915_WRITE16(I915REG_HWSTAM, 0xfffe);
 	I915_WRITE16(I915REG_INT_MASK_R, 0x0);
 	I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
+	extern void intel_lvds_init(drm_device_t *dev);
+	extern void intel_crt_init(drm_device_t *dev);
+	intel_lvds_init(dev);
+	intel_crt_init(dev);
 }
 
 void i915_driver_irq_postinstall(drm_device_t * dev)
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/intel_crt.c linux-2.6.21-rc4-modesetting/drivers/char/drm/intel_crt.c
--- linux-2.6.21-rc4/drivers/char/drm/intel_crt.c	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/intel_crt.c	2007-03-29 17:22:05.000000000 -0700
@@ -0,0 +1,45 @@
+#include <linux/i2c.h>
+#include "drmP.h"
+#include "drm.h"
+#include "drm_crtc.h"
+#include "intel_drv.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+
+/*
+ * Routines for controlling stuff on the analog port
+ */
+static const struct drm_output_funcs intel_crt_output_funcs;
+
+void intel_crt_init(drm_device_t *dev)
+{
+	struct drm_output *output;
+	struct intel_output *intel_output;
+	int modes;
+
+	output = drm_output_create (dev, &intel_crt_output_funcs, "VGA");
+
+	intel_output = kmalloc(sizeof(struct intel_output), GFP_KERNEL);
+	if (!intel_output) {
+		drm_output_destroy(output);
+		return;
+	}
+
+	intel_output->type = INTEL_OUTPUT_ANALOG;
+	output->driver_private = intel_output;
+	output->interlace_allowed = 0;
+	output->doublescan_allowed = 0;
+
+	/* Set up the DDC bus. */
+	intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
+	if (!intel_output->ddc_bus) {
+		dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
+			   "failed.\n");
+		return;
+	}
+
+	modes = intel_ddc_get_modes(output);
+	printk(KERN_ERR "CRT: added %d modes from EDID.\n", modes);
+	intel_i2c_destroy(intel_output->ddc_bus);
+	drm_output_destroy(output);
+}
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/intel_drv.h linux-2.6.21-rc4-modesetting/drivers/char/drm/intel_drv.h
--- linux-2.6.21-rc4/drivers/char/drm/intel_drv.h	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/intel_drv.h	2007-03-29 16:28:02.000000000 -0700
@@ -0,0 +1,55 @@
+#ifndef __INTEL_DRV_H__
+#define __INTEL_DRV_H__
+
+#include <linux/i2c.h>
+#include <linux/i2c-id.h>
+#include <linux/i2c-algo-bit.h>
+#include "drm_crtc.h"
+
+/*
+ * Display related stuff
+ */
+
+/* store information about an Ixxx DVO */
+/* The i830->i865 use multiple DVOs with multiple i2cs */
+/* the i915, i945 have a single sDVO i2c bus - which is different */
+#define MAX_OUTPUTS 6
+
+#define INTEL_I2C_BUS_DVO 1
+#define INTEL_I2C_BUS_SDVO 2
+
+/* these are outputs from the chip - integrated only 
+   external chips are via DVO or SDVO output */
+#define INTEL_OUTPUT_UNUSED 0
+#define INTEL_OUTPUT_ANALOG 1
+#define INTEL_OUTPUT_DVO 2
+#define INTEL_OUTPUT_SDVO 3
+#define INTEL_OUTPUT_LVDS 4
+#define INTEL_OUTPUT_TVOUT 5
+
+#define INTEL_DVO_CHIP_NONE 0
+#define INTEL_DVO_CHIP_LVDS 1
+#define INTEL_DVO_CHIP_TMDS 2
+#define INTEL_DVO_CHIP_TVOUT 4
+
+struct intel_i2c_chan {
+	drm_device_t *drm_dev; /* for getting at dev. private (mmio etc.) */
+	u32 reg; /* GPIO reg */
+	struct i2c_adapter adapter;
+	struct i2c_algo_bit_data algo;
+};
+
+struct intel_output {
+	int type;
+	struct intel_i2c_chan *i2c_bus; /* for control functions */
+	struct intel_i2c_chan *ddc_bus; /* for DDC only stuff */
+	bool load_detect_tmp;
+	void *dev_priv;
+};
+
+struct intel_i2c_chan *intel_i2c_create(drm_device_t *dev, const u32 reg,
+					const char *name);
+void intel_i2c_destroy(struct intel_i2c_chan *chan);
+int intel_ddc_get_modes(struct drm_output *output);
+
+#endif /* __INTEL_DRV_H__ */
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/intel_i2c.c linux-2.6.21-rc4-modesetting/drivers/char/drm/intel_i2c.c
--- linux-2.6.21-rc4/drivers/char/drm/intel_i2c.c	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/intel_i2c.c	2007-03-29 14:20:37.000000000 -0700
@@ -0,0 +1,164 @@
+/*
+ * Copyright 2006 Dave Airlie <airlied@linux.ie>
+ * Copyright © 2006 Intel Corporation
+ *   Eric Anholt <eric@anholt.net>
+ *   Jesse Barnes <jesse.barnes@intel.com>
+ */
+
+#include <linux/i2c.h>
+#include <linux/i2c-id.h>
+#include <linux/i2c-algo-bit.h>
+#include "drmP.h"
+#include "drm.h"
+#include "intel_drv.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+
+/*
+ * Intel GPIO access functions
+ */
+
+#define I2C_RISEFALL_TIME 20
+
+static int get_clock(void *data)
+{
+	struct intel_i2c_chan *chan = data;
+	drm_i915_private_t *dev_priv = chan->drm_dev->dev_private;
+	u32 val;
+
+	val = I915_READ(chan->reg);
+	return ((val & GPIO_CLOCK_VAL_IN) != 0);
+}
+
+static int get_data(void *data)
+{
+	struct intel_i2c_chan *chan = data;
+	drm_i915_private_t *dev_priv = chan->drm_dev->dev_private;
+	u32 val;
+
+	val = I915_READ(chan->reg);
+	return ((val & GPIO_DATA_VAL_IN) != 0);
+}
+
+static void set_clock(void *data, int state_high)
+{
+	struct intel_i2c_chan *chan = data;
+	drm_device_t *dev = chan->drm_dev;
+	drm_i915_private_t *dev_priv = chan->drm_dev->dev_private;
+	u32 reserved = 0, clock_bits;
+
+	/* On most chips, these bits must be preserved in software. */
+	if (!IS_I830(dev) && !IS_845G(dev))
+		reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE |
+						   GPIO_CLOCK_PULLUP_DISABLE);
+
+	if (state_high)
+		clock_bits = GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK;
+	else
+		clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
+			GPIO_CLOCK_VAL_MASK;
+	I915_WRITE(chan->reg, reserved | clock_bits);
+	udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */
+}
+
+static void set_data(void *data, int state_high)
+{
+	struct intel_i2c_chan *chan = data;
+	drm_device_t *dev = chan->drm_dev;
+	drm_i915_private_t *dev_priv = chan->drm_dev->dev_private;
+	u32 reserved = 0, data_bits;
+
+	/* On most chips, these bits must be preserved in software. */
+	if (!IS_I830(dev) && !IS_845G(dev))
+		reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE |
+						   GPIO_CLOCK_PULLUP_DISABLE);
+
+	if (state_high)
+		data_bits = GPIO_DATA_DIR_IN | GPIO_DATA_DIR_MASK;
+	else
+		data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
+			GPIO_DATA_VAL_MASK;
+
+	I915_WRITE(chan->reg, reserved | data_bits);
+	udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */
+}
+
+/**
+ * intel_i2c_create - instantiate an Intel i2c bus using the specified GPIO reg
+ * @dev: DRM device
+ * @output: driver specific output device
+ * @reg: GPIO reg to use
+ * @name: name for this bus
+ *
+ * Creates and registers a new i2c bus with the Linux i2c layer, for use
+ * in output probing and control (e.g. DDC or SDVO control functions).
+ *
+ * Possible values for @reg include:
+ *   %GPIOA
+ *   %GPIOB
+ *   %GPIOC
+ *   %GPIOD
+ *   %GPIOE
+ *   %GPIOF
+ *   %GPIOG
+ *   %GPIOH
+ * see PRM for details on how these different busses are used.
+ */
+struct intel_i2c_chan *intel_i2c_create(drm_device_t *dev, const u32 reg,
+					const char *name)
+{
+	struct intel_i2c_chan *chan;
+
+	chan = kzalloc(sizeof(struct intel_i2c_chan), GFP_KERNEL);
+	if (!chan)
+		goto out_free;
+
+	chan->drm_dev = dev;
+	chan->reg = reg;
+	snprintf(chan->adapter.name, I2C_NAME_SIZE, "intel drm %s", name);
+	chan->adapter.owner = THIS_MODULE;
+	chan->adapter.id = I2C_HW_B_INTELFB;
+	chan->adapter.algo_data	= &chan->algo;
+	chan->adapter.dev.parent = &dev->pdev->dev;
+	chan->algo.setsda = set_data;
+	chan->algo.setscl = set_clock;
+	chan->algo.getsda = get_data;
+	chan->algo.getscl = get_clock;
+	chan->algo.udelay = 20;
+	chan->algo.timeout = usecs_to_jiffies(2200);
+	chan->algo.data = chan;
+
+	i2c_set_adapdata(&chan->adapter, chan);
+
+	if(i2c_bit_add_bus(&chan->adapter))
+		goto out_free;
+
+	/* JJJ:  raise SCL and SDA? */
+	set_data(chan, 1);
+	set_clock(chan, 1);
+	udelay(20);
+
+	return chan;
+
+out_free:
+	kfree(chan);
+	return NULL;
+}
+
+/**
+ * intel_i2c_destroy - unregister and free i2c bus resources
+ * @output: channel to free
+ *
+ * Unregister the adapter from the i2c layer, then free the structure.
+ */
+void intel_i2c_destroy(struct intel_i2c_chan *chan)
+{
+	if (!chan)
+		return;
+
+	i2c_del_adapter(&chan->adapter);
+	kfree(chan);
+}
+
+	
+	
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/intel_lvds.c linux-2.6.21-rc4-modesetting/drivers/char/drm/intel_lvds.c
--- linux-2.6.21-rc4/drivers/char/drm/intel_lvds.c	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/intel_lvds.c	2007-03-29 17:21:57.000000000 -0700
@@ -0,0 +1,108 @@
+/*
+ * Copyright 2006 Dave Airlie <airlied@linux.ie>
+ * Copyright © 2006 Intel Corporation
+ *   Eric Anholt <eric@anholt.net>
+ *   Jesse Barnes <jesse.barnes@intel.com>
+ */
+
+#include <linux/i2c.h>
+#include "drmP.h"
+#include "drm.h"
+#include "drm_crtc.h"
+#include "intel_drv.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+
+/**
+ * Sets the backlight level.
+ *
+ * \param level backlight level, from 0 to i830_lvds_get_max_backlight().
+ */
+static void lvds_set_backlight(drm_device_t *dev, u32 level)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	unsigned long blc_pwm_ctl;
+
+	level &= BACKLIGHT_DUTY_CYCLE_MASK;
+	blc_pwm_ctl = I915_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
+	I915_WRITE(BLC_PWM_CTL, blc_pwm_ctl |
+		   (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
+}
+
+/**
+ * Returns the maximum level of the backlight duty cycle field.
+ */
+static u32 lvds_get_max_backlight(drm_device_t *dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+    
+	return ((I915_READ(BLC_PWM_CTL) & BACKLIGHT_MODULATION_FREQ_MASK) >>
+		BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
+}
+
+int lvds_backlight(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	unsigned long dvoa_enabled, dvob_enabled, dvoc_enabled, lvds_enabled;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+
+	printk(KERN_ERR "max backlight value: %d\n",
+	       lvds_get_max_backlight(dev));
+	dvoa_enabled = I915_READ(DVOA);
+	dvob_enabled = I915_READ(DVOB);
+	dvoc_enabled = I915_READ(DVOC);
+	lvds_enabled = I915_READ(LVDS);
+
+	printk(KERN_ERR "dvoa_enabled: 0x%08lx\n", dvoa_enabled);
+	printk(KERN_ERR "dvob_enabled: 0x%08lx\n", dvob_enabled);
+	printk(KERN_ERR "dvoc_enabled: 0x%08lx\n", dvoc_enabled);
+	printk(KERN_ERR "lvds_enabled: 0x%08lx\n", lvds_enabled);
+	printk(KERN_ERR "BLC_PWM_CTL: 0x%08x\n", I915_READ(BLC_PWM_CTL));
+	
+	return 0;
+}
+
+static const struct drm_output_funcs intel_lvds_output_funcs;
+
+/**
+ * intel_lvds_init - setup LVDS outputs on this device
+ * @dev: drm device
+ *
+ * Create the output, register the LVDS DDC bus, and try to figure out what
+ * modes we can display on the LVDS panel (if present).
+ */
+void intel_lvds_init(drm_device_t *dev)
+{
+	struct drm_output *output;
+	struct intel_output *intel_output;
+	int modes;
+
+	output = drm_output_create(dev, &intel_lvds_output_funcs, "LVDS");
+	if (!output)
+		return;
+
+	intel_output = kmalloc(sizeof(struct intel_output), GFP_KERNEL);
+	if (!intel_output) {
+		drm_output_destroy(output);
+		return;
+	}
+
+	intel_output->type = INTEL_OUTPUT_LVDS;
+	output->driver_private = intel_output;
+	output->subpixel_order = SubPixelHorizontalRGB;
+	output->interlace_allowed = 0;
+	output->doublescan_allowed = 0;
+
+	intel_output->ddc_bus = intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
+	if (!intel_output->ddc_bus) {
+		dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
+			   "failed.\n");
+		return;
+	}
+
+	modes = intel_ddc_get_modes(output);
+	printk(KERN_ERR "LVDS: added %d modes from EDID.\n", modes);
+	intel_i2c_destroy(intel_output->ddc_bus);
+	drm_output_destroy(output);
+}
+
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/intel_modes.c linux-2.6.21-rc4-modesetting/drivers/char/drm/intel_modes.c
--- linux-2.6.21-rc4/drivers/char/drm/intel_modes.c	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/intel_modes.c	2007-03-29 16:27:57.000000000 -0700
@@ -0,0 +1,16 @@
+#include <linux/i2c.h>
+#include <linux/fb.h>
+#include "intel_drv.h"
+
+/**
+ * intel_ddc_get_modes - get modelist from monitor
+ * @output: DRM output device to use
+ *
+ * Fetch the EDID information from @output using the DDC bus.
+ */
+int intel_ddc_get_modes(struct drm_output *output)
+{
+	struct intel_output *intel_output = output->driver_private;
+
+	return drm_add_edid_modes(output, &intel_output->ddc_bus->adapter);
+}
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/char/drm/Makefile linux-2.6.21-rc4-modesetting/drivers/char/drm/Makefile
--- linux-2.6.21-rc4/drivers/char/drm/Makefile	2007-03-15 17:20:01.000000000 -0700
+++ linux-2.6.21-rc4-modesetting/drivers/char/drm/Makefile	2007-03-29 16:06:17.000000000 -0700
@@ -6,14 +6,16 @@ drm-objs    :=	drm_auth.o drm_bufs.o drm
 		drm_drv.o drm_fops.o drm_ioctl.o drm_irq.o \
 		drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \
 		drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \
-		drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o
+		drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o drm_crtc.o \
+		drm_edid.o
 
 tdfx-objs   := tdfx_drv.o
 r128-objs   := r128_drv.o r128_cce.o r128_state.o r128_irq.o
 mga-objs    := mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o
 i810-objs   := i810_drv.o i810_dma.o
 i830-objs   := i830_drv.o i830_dma.o i830_irq.o
-i915-objs   := i915_drv.o i915_dma.o i915_irq.o i915_mem.o
+i915-objs   := i915_drv.o i915_dma.o i915_irq.o i915_mem.o intel_lvds.o \
+	       intel_i2c.o intel_crt.o intel_modes.o
 radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o
 ffb-objs    := ffb_drv.o ffb_context.o
 sis-objs    := sis_drv.o sis_mm.o
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/pci/pci-sysfs.c linux-2.6.21-rc4-modesetting/drivers/pci/pci-sysfs.c
--- linux-2.6.21-rc4/drivers/pci/pci-sysfs.c	2007-03-15 17:20:01.000000000 -0700
+++ linux-2.6.21-rc4-modesetting/drivers/pci/pci-sysfs.c	2007-03-24 10:46:42.000000000 -0700
@@ -620,7 +620,8 @@ int __must_check pci_create_sysfs_dev_fi
 		goto err_bin_file;
 
 	/* If the device has a ROM, try to expose it in sysfs. */
-	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
+	if (pci_resource_len(pdev, PCI_ROM_RESOURCE) ||
+	    (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)) {
 		rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
 		if (rom_attr) {
 			pdev->rom_attr = rom_attr;
@@ -695,4 +696,4 @@ static int __init pci_sysfs_init(void)
 	return 0;
 }
 
-__initcall(pci_sysfs_init);
+late_initcall(pci_sysfs_init);
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/drivers/video/fb_ddc.c linux-2.6.21-rc4-modesetting/drivers/video/fb_ddc.c
--- linux-2.6.21-rc4/drivers/video/fb_ddc.c	2007-03-15 17:20:01.000000000 -0700
+++ linux-2.6.21-rc4-modesetting/drivers/video/fb_ddc.c	2007-03-29 13:03:08.000000000 -0700
@@ -44,7 +44,7 @@ static unsigned char *fb_do_probe_ddc_ed
 	if (i2c_transfer(adapter, msgs, 2) == 2)
 		return buf;
 
-	dev_warn(&adapter->dev, "unable to read EDID block.\n");
+	dev_info(&adapter->dev, "unable to read EDID block.\n");
 	kfree(buf);
 	return NULL;
 }
diff -Napur -X /home/jbarnes/dontdiff linux-2.6.21-rc4/Makefile linux-2.6.21-rc4-modesetting/Makefile
--- linux-2.6.21-rc4/Makefile	2007-03-15 17:20:01.000000000 -0700
+++ linux-2.6.21-rc4-modesetting/Makefile	2007-03-21 11:01:38.000000000 -0700
@@ -1337,7 +1337,7 @@ quiet_cmd_cscope-file = FILELST cscope.f
       cmd_cscope-file = (echo \-k; echo \-q; $(all-sources)) > cscope.files
 
 quiet_cmd_cscope = MAKE    cscope.out
-      cmd_cscope = cscope -b
+      cmd_cscope = cscope -bq
 
 cscope: FORCE
 	$(call cmd,cscope-file)