diff --git a/src/i830_driver.c b/src/i830_driver.c
index 091b5ca..8f77fb5 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1937,19 +1937,21 @@ i830_set_dsparb(ScrnInfoPtr pScrn)
    i830WaitForVblank(pScrn);
 
    /* Fixup FIFO defaults:
-    * we don't use plane C at all so we can allocate all but one of the 96
-    * FIFO RAM entries equally between planes A and B.
+    * we don't use plane C at all so we can allocate all but one of the
+    * FIFO RAM entries equally between planes A and B (or just A for old
+    * chipsets).
     */
-   if (IS_I9XX(pI830)) {
-       if (IS_I965GM(pI830) || IS_IGD_GM(pI830))
-	   OUTREG(DSPARB, (127 << DSPARB_CSTART_SHIFT) |
-		  (64 << DSPARB_BSTART_SHIFT));
-       else
+
+   /* Recent chips have 128x64B entries */
+   if (IS_I965GM(pI830) || IS_IGD_GM(pI830))
+           OUTREG(DSPARB, (127 << DSPARB_CSTART_SHIFT) |
+                  (64 << DSPARB_BSTART_SHIFT));
+   else if (IS_I9XX(pI830)) /* older 9xx chips have 96x64B entries */
 	   OUTREG(DSPARB, (95 << DSPARB_CSTART_SHIFT) |
 		  (48 << DSPARB_BSTART_SHIFT));
-   } else {
+   else if (IS_MOBILE(pI830)) /* previous mobile chips have 256x16B entries */
        OUTREG(DSPARB, 254 << DSPARB_BEND_SHIFT | 128 << DSPARB_AEND_SHIFT);
-   }
+   /* leave even older chips alone */
 }
 
 enum pipe {