diff --git a/src/i830_display.c b/src/i830_display.c
index d5c2dea..0801b97 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -557,10 +557,14 @@ i830_enable_fb_compression_8xx(xf86CrtcPtr crtc)
     unsigned long interval = 1000;
 
     if (INREG(FBC_CONTROL) & FBC_CTL_EN) {
-	char cur_plane = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "fbc already enabled on "
-		   "plane %c, not enabling on plane %c\n", cur_plane,
-		   plane ? 'b' : 'a');
+	if (IS_I965GM(pI830)) {
+	    char cur_plane = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "fbc already enabled on "
+		       "plane %c, not enabling on plane %c\n", cur_plane,
+		       plane ? 'b' : 'a');
+	} else {
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "fbc already enabled.");
+	}	    
 	return;
     }
 
@@ -580,9 +584,11 @@ i830_enable_fb_compression_8xx(xf86CrtcPtr crtc)
     i830WaitForVblank(pScrn);
     OUTREG(FBC_CFB_BASE, pI830->compressed_front_buffer->bus_addr);
     OUTREG(FBC_LL_BASE, pI830->compressed_ll_buffer->bus_addr + 6);
-    OUTREG(FBC_CONTROL2, FBC_CTL_FENCE_DBL | FBC_CTL_IDLE_FULL |
-	   FBC_CTL_CPU_FENCE | plane);
-    OUTREG(FBC_FENCE_OFF, crtc->y);
+    if (IS_I965GM(pI830)) {
+	OUTREG(FBC_CONTROL2, FBC_CTL_FENCE_DBL | FBC_CTL_IDLE_IMM |
+	       FBC_CTL_CPU_FENCE | plane);
+	OUTREG(FBC_FENCE_OFF, crtc->y);
+    }
 
     /* Zero buffers */
     memset(pI830->FbBase + pI830->compressed_front_buffer->offset, 0,