diff --git a/src/i830_driver.c b/src/i830_driver.c index 7818ee4..0df49e7 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -2040,6 +2040,12 @@ RestoreHWState(ScrnInfoPtr pScrn) OUTREG(DPLL_A, pI830->saveDPLL_A); usleep(150); + OUTREG(VGACNTRL, pI830->saveVGACNTRL); + + OUTREG(VCLK_DIVISOR_VGA0, pI830->saveVCLK_DIVISOR_VGA0); + OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1); + OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV); + OUTREG(HTOTAL_A, pI830->saveHTOTAL_A); OUTREG(HBLANK_A, pI830->saveHBLANK_A); OUTREG(HSYNC_A, pI830->saveHSYNC_A); @@ -2059,12 +2065,11 @@ RestoreHWState(ScrnInfoPtr pScrn) OUTREG(DSPATILEOFF, pI830->saveDSPATILEOFF); } /* - * Make sure the DPLL is active and not in VGA mode or the + * Make sure the DPLL is active or the * write of PIPEnCONF may cause a crash */ - if ((pI830->saveDPLL_A & DPLL_VCO_ENABLE) && - (pI830->saveDPLL_A & DPLL_VGA_MODE_DIS)) - OUTREG(PIPEACONF, pI830->savePIPEACONF); + if (pI830->saveDPLL_A & DPLL_VCO_ENABLE) + OUTREG(PIPEACONF, pI830->savePIPEACONF); i830WaitForVblank(pScrn); OUTREG(DSPACNTR, pI830->saveDSPACNTR); OUTREG(DSPABASE, INREG(DSPABASE)); @@ -2108,9 +2113,8 @@ RestoreHWState(ScrnInfoPtr pScrn) /* * See PIPEnCONF note above */ - if ((pI830->saveDPLL_B & DPLL_VCO_ENABLE) && - (pI830->saveDPLL_B & DPLL_VGA_MODE_DIS)) - OUTREG(PIPEBCONF, pI830->savePIPEBCONF); + if (pI830->saveDPLL_B & DPLL_VCO_ENABLE) + OUTREG(PIPEBCONF, pI830->savePIPEBCONF); i830WaitForVblank(pScrn); OUTREG(DSPBCNTR, pI830->saveDSPBCNTR); OUTREG(DSPBBASE, INREG(DSPBBASE)); @@ -2124,11 +2128,6 @@ RestoreHWState(ScrnInfoPtr pScrn) output->funcs->restore(output); } - OUTREG(VGACNTRL, pI830->saveVGACNTRL); - - OUTREG(VCLK_DIVISOR_VGA0, pI830->saveVCLK_DIVISOR_VGA0); - OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1); - OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV); i830_restore_palette(pI830, PIPE_A); i830_restore_palette(pI830, PIPE_B);