diff --git a/shared-core/i915_suspend.c b/shared-core/i915_suspend.c
index 5e759b1..40ade6e 100644
--- a/shared-core/i915_suspend.c
+++ b/shared-core/i915_suspend.c
@@ -368,6 +368,7 @@ int i915_save_state(struct drm_device *dev)
 int i915_restore_state(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
+	u32 pp_status;
 	int i;
 
 #if defined(__FreeBSD__)
@@ -378,6 +379,21 @@ int i915_restore_state(struct drm_device *dev)
 
 	I915_WRITE(DSPARB, dev_priv->saveDSPARB);
 
+	/* Make sure panel is off before we bang on regs */
+	I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & ~POWER_TARGET_ON);
+	do {
+	    pp_status = I915_READ(PP_STATUS);
+	} while (pp_status & PP_ON);
+
+	/* LVDS state */
+	if (IS_MOBILE(dev) && !IS_I830(dev))
+		I915_WRITE(LVDS, dev_priv->saveLVDS);
+	if (!IS_I830(dev) && !IS_845G(dev))
+		I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
+
+	if (IS_I965G(dev))
+		I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
+
 	/* Pipe & plane A info */
 	/* Prime the clock */
 	if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
@@ -466,23 +482,17 @@ int i915_restore_state(struct drm_device *dev)
 	/* CRT state */
 	I915_WRITE(ADPA, dev_priv->saveADPA);
 
-	/* LVDS state */
-	if (IS_I965G(dev))
-		I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
-	if (IS_MOBILE(dev) && !IS_I830(dev))
-		I915_WRITE(LVDS, dev_priv->saveLVDS);
-	if (!IS_I830(dev) && !IS_845G(dev))
-		I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
-
 	I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
 	I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
+
+	/* FIXME: restore TV & SDVO state */
+
+	/* Panel state */
 	I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
 	I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
 	I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
 	I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
 
-	/* FIXME: restore TV & SDVO state */
-
 	/* FBC info */
 	I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
 	I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);