diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index df03611..93e80d3 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -420,10 +420,16 @@ static void i915_enable_interrupt (struct drm_device *dev) u16 flag; flag = 0; - if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A) + DRM_ERROR("enabling vblank on pipes: "); + if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A) { + DRM_ERROR("a "); flag |= VSYNC_PIPEA_FLAG; - if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B) + } + if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B) { + DRM_ERROR("b "); flag |= VSYNC_PIPEB_FLAG; + } + DRM_ERROR("\n"); I915_WRITE16(I915REG_INT_ENABLE_R, USER_INT_FLAG | flag); } diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index cce2f4c..4db67c5 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -203,13 +203,6 @@ static u64 pci_size(u64 base, u64 maxbase, u64 mask) return size; } -enum pci_bar_type { - pci_bar_unknown, /* Standard PCI BAR probe */ - pci_bar_io, /* An io port BAR */ - pci_bar_mem32, /* A 32-bit memory BAR */ - pci_bar_mem64, /* A 64-bit memory BAR */ -}; - static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar) { if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) { @@ -322,6 +315,46 @@ static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, goto out; } +/** + * pci_read_base - Read a BAR from a specified location + * @dev: The PCI device to read + * @type: The type of BAR to read + * @res: A struct resource to be filled in + * @reg: The address in PCI config space to read the BAR from. + * + * Some devices have BARs in unusual places. This function lets a driver ask + * the PCI subsystem to read it and place it in the resource tree. If it is + * like a ROM BAR with an enable in bit 0, the caller should specify a @type + * of io, mem32 or mem64. If it's like a normal BAR with memory type in the + * low bits, specify unknown, even if the caller knows what kind of BAR it is. + * + * Returns -ENXIO if the BAR was not successfully read. If the BAR is read, + * but no suitable parent resource can be found for the BAR, this function + * returns -ENODEV. If the resource cannot be inserted into the resource tree, + * it will return -EBUSY. Note that the resource is still 'live' for these + * last two cases; the caller should set res->flags to 0 if this is not wanted. + */ +int pci_read_base(struct pci_dev *dev, enum pci_bar_type type, + struct resource *res, unsigned int reg) +{ + struct pci_bus_region region; + struct resource *parent; + + __pci_read_base(dev, type, res, reg); + if (!res->flags) + return -ENXIO; + + region.start = res->start; + region.end = res->end; + pcibios_bus_to_resource(dev, res, ®ion); + + parent = pci_find_parent_resource(dev, res); + if (!parent) + return -ENODEV; + return request_resource(parent, res); +} +EXPORT_SYMBOL_GPL(pci_read_base); + static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom) { unsigned int pos, reg; diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c index 0bdf9b8..57a4b0d 100644 --- a/drivers/pnp/quirks.c +++ b/drivers/pnp/quirks.c @@ -270,15 +270,15 @@ static void quirk_system_pci_resources(struct pnp_dev *dev) continue; /* - * If the PNP region completely encloses (or is - * at least as large as) the PCI region, that's - * also OK. For example, this happens when the - * PNP device describes a bridge with PCI - * behind it. + * If the resources overlap, make sure the PCI core + * assigns a new range for the conflicting BARs. */ if (pnp_start <= pci_start && - pnp_end >= pci_end) + pnp_end >= pci_end) { + pdev->resource[i].start = 0; + pdev->resource[i].end = pci_resource_len(pdev, i); continue; + } /* * Otherwise, the PNP region overlaps *part* of diff --git a/include/linux/pci.h b/include/linux/pci.h index c0e1400..5094fb3 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -312,6 +312,16 @@ struct pci_bus { #define pci_bus_b(n) list_entry(n, struct pci_bus, node) #define to_pci_bus(n) container_of(n, struct pci_bus, dev) +enum pci_bar_type { + pci_bar_unknown, /* Standard PCI BAR probe */ + pci_bar_io, /* An io port BAR */ + pci_bar_mem32, /* A 32-bit memory BAR */ + pci_bar_mem64, /* A 64-bit memory BAR */ +}; + +int pci_read_base(struct pci_dev *dev, enum pci_bar_type type, + struct resource *res, unsigned int reg); + /* * Error values that may be returned by PCI functions. */ diff --git a/mm/shmem.c b/mm/shmem.c index 04fb4f1..515909d 100644 --- a/mm/shmem.c +++ b/mm/shmem.c @@ -2582,6 +2582,7 @@ put_memory: shmem_unacct_size(flags, size); return ERR_PTR(error); } +EXPORT_SYMBOL(shmem_file_setup); /** * shmem_zero_setup - setup a shared anonymous mapping