Index: programs/Xserver/hw/xfree86/common/compiler.h =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/common/compiler.h,v retrieving revision 1.5 diff -u -r1.5 compiler.h --- programs/Xserver/hw/xfree86/common/compiler.h 4 Apr 2005 09:47:07 -0000 1.5 +++ programs/Xserver/hw/xfree86/common/compiler.h 19 Apr 2005 01:45:01 -0000 @@ -124,7 +124,8 @@ # if !defined(__arm__) # if !defined(__sparc__) && !defined(__arm32__) \ - && !(defined(__alpha__) && defined(linux)) + && !(defined(__alpha__) && defined(linux)) \ + && !(defined(__ia64__) && defined(linux)) \ extern void outb(unsigned short, unsigned char); extern void outw(unsigned short, unsigned short); @@ -162,7 +163,7 @@ # ifndef NO_INLINE # ifdef __GNUC__ -# if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)) && defined(__alpha__) +# if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)) && (defined(__alpha__)) # ifdef linux /* for Linux on Alpha, we use the LIBC _inx/_outx routines */ @@ -464,10 +465,12 @@ # ifndef __INTEL_COMPILER # define mem_barrier() __asm__ __volatile__ ("mf" ::: "memory") # define write_mem_barrier() __asm__ __volatile__ ("mf" ::: "memory") +# define io_mem_barrier() __asm__ __volatile__ ("mf.a" ::: "memory") # else # include "ia64intrin.h" # define mem_barrier() __mf() # define write_mem_barrier() __mf() +# define io_mem_barrier() __mfa # endif /* @@ -494,11 +497,16 @@ # undef outb # undef outw # undef outl +# undef inb +# undef inw +# undef inl +extern void outb(unsigned long port, unsigned char val); +extern void outw(unsigned long port, unsigned short val); +extern void outl(unsigned long port, unsigned int val); +extern unsigned int inb(unsigned long port); +extern unsigned int inw(unsigned long port); +extern unsigned int inl(unsigned long port); -# define outb(a,b) _outb(b,a) -# define outw(a,b) _outw(b,a) -# define outl(a,b) _outl(b,a) - # elif defined(linux) && defined(__amd64__) # include Index: programs/Xserver/hw/xfree86/common/xf86Bus.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/common/xf86Bus.c,v retrieving revision 1.5 diff -u -r1.5 xf86Bus.c --- programs/Xserver/hw/xfree86/common/xf86Bus.c 28 Jan 2005 16:12:58 -0000 1.5 +++ programs/Xserver/hw/xfree86/common/xf86Bus.c 19 Apr 2005 01:45:01 -0000 @@ -1857,7 +1857,7 @@ range.type = (range.type & ~ResAccMask) | (access & ResAccMask); } range.type &= ~ResEstimated; /* Not allowed for drivers */ -#if !(defined(__alpha__) && defined(linux)) +#if !((defined(__alpha__) || (defined(__ia64__))) && defined(linux)) /* On Alpha Linux, do not check for conflicts, trust the kernel. */ if (checkConflict(&range, Acc, entityIndex, SETUP,TRUE)) res = xf86AddResToList(res,&range,entityIndex); @@ -2477,8 +2477,9 @@ #endif } xf86FreeResList(acc); - +/* XXX shm@engr */ #if !(defined(__alpha__) && defined(linux)) && \ + !(defined(__ia64__) && defined(linux)) && \ !(defined(__sparc64__) && defined(__OpenBSD__)) /* * No need to validate on Alpha Linux or OpenBSD/sparc64, Index: programs/Xserver/hw/xfree86/common/xf86pciBus.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/common/xf86pciBus.c,v retrieving revision 1.9 diff -u -r1.9 xf86pciBus.c --- programs/Xserver/hw/xfree86/common/xf86pciBus.c 9 Feb 2005 11:12:54 -0000 1.9 +++ programs/Xserver/hw/xfree86/common/xf86pciBus.c 19 Apr 2005 01:45:01 -0000 @@ -1621,10 +1621,12 @@ m = m->next; } } else { +#if !defined(__ia64__) if (!xf86IsSubsetOf(range, m) || ChkConflict(&range, avoid, SETUP) || (mem && ChkConflict(&range, mem, SETUP))) ret = 0; +#endif } xf86FreeResList(avoid); Index: programs/Xserver/hw/xfree86/loader/xf86sym.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v retrieving revision 1.9 diff -u -r1.9 xf86sym.c --- programs/Xserver/hw/xfree86/loader/xf86sym.c 1 Apr 2005 21:28:50 -0000 1.9 +++ programs/Xserver/hw/xfree86/loader/xf86sym.c 19 Apr 2005 01:45:02 -0000 @@ -1093,12 +1093,12 @@ #endif #endif #if defined(__ia64__) - SYMFUNC(_outw) - SYMFUNC(_outb) - SYMFUNC(_outl) - SYMFUNC(_inb) - SYMFUNC(_inw) - SYMFUNC(_inl) + SYMFUNC(outw) + SYMFUNC(outb) + SYMFUNC(outl) + SYMFUNC(inb) + SYMFUNC(inw) + SYMFUNC(inl) #endif #if defined(__arm__) SYMFUNC(outw) Index: programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h,v retrieving revision 1.3 diff -u -r1.3 xf86_OSproc.h --- programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h 28 Jan 2005 16:12:59 -0000 1.3 +++ programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h 19 Apr 2005 01:45:02 -0000 @@ -256,6 +256,8 @@ #endif /* NEED_OS_RAC_PROTOS */ extern Bool xf86GetPciSizeFromOS(PCITAG tag, int indx, int* bits); +extern Bool xf86GetPciOffsetFromOS(PCITAG tag, int indx, unsigned long* bases); +extern unsigned long xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base); extern void xf86MakeNewMapping(int, int, unsigned long, unsigned long, pointer); extern void xf86InitVidMem(void); Index: programs/Xserver/hw/xfree86/os-support/bus/Imakefile =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile,v retrieving revision 1.5 diff -u -r1.5 Imakefile --- programs/Xserver/hw/xfree86/os-support/bus/Imakefile 15 Sep 2004 09:23:58 -0000 1.5 +++ programs/Xserver/hw/xfree86/os-support/bus/Imakefile 19 Apr 2005 01:45:02 -0000 @@ -126,8 +126,8 @@ PCIARCHOBJ = sparcPci.o # endif #elif defined(ia64Architecture) -PCIARCHSRC = 460gxPCI.c e8870PCI.c zx1PCI.c -PCIARCHOBJ = 460gxPCI.o e8870PCI.o zx1PCI.o +PCIARCHSRC = 460gxPCI.c e8870PCI.c zx1PCI.c altixPCI.c +PCIARCHOBJ = 460gxPCI.o e8870PCI.o zx1PCI.o altixPCI.o #endif SRCS = Pci.c $(PCIDRVRSRC) $(SBUSDRVSRC) $(PCIARCHSRC) Index: programs/Xserver/hw/xfree86/os-support/bus/Pci.h =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h,v retrieving revision 1.4 diff -u -r1.4 Pci.h --- programs/Xserver/hw/xfree86/os-support/bus/Pci.h 11 Aug 2004 21:14:17 -0000 1.4 +++ programs/Xserver/hw/xfree86/os-support/bus/Pci.h 19 Apr 2005 01:45:02 -0000 @@ -254,7 +254,6 @@ # if defined(linux) # define ARCH_PCI_INIT linuxPciInit # define INCLUDE_XF86_MAP_PCI_MEM -# define INCLUDE_XF86_NO_DOMAIN # elif defined(FreeBSD) # define ARCH_PCI_INIT freebsdPciInit # define INCLUDE_XF86_MAP_PCI_MEM Index: programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c,v retrieving revision 1.6 diff -u -r1.6 linuxPci.c --- programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c 9 Feb 2005 11:12:54 -0000 1.6 +++ programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c 19 Apr 2005 01:45:02 -0000 @@ -59,6 +59,7 @@ static CARD32 linuxPciCfgRead(PCITAG tag, int off); static void linuxPciCfgWrite(PCITAG, int off, CARD32 val); static void linuxPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits); +static ADDRESS linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr); #if defined(__powerpc__) static ADDRESS linuxPpcBusAddrToHostAddr(PCITAG, PciAddrType, ADDRESS); static ADDRESS linuxPpcHostAddrToBusAddr(PCITAG, PciAddrType, ADDRESS); @@ -73,7 +74,7 @@ /* pciAddrBusToHost */ linuxPpcBusAddrToHostAddr #else /* pciAddrHostToBus */ pciAddrNOOP, -/* pciAddrBusToHost */ pciAddrNOOP +/* pciAddrBusToHost */ linuxTransAddrBusToHost #endif }; @@ -123,7 +124,7 @@ if (fd != -1) close(fd); if (bus < 256) { - sprintf(file,"/proc/bus/pci/%02x",bus); + sprintf(file,"/proc/bus/pci/%02x",bus); if (stat(file, &ignored) < 0) sprintf(file, "/proc/bus/pci/0000:%02x/%02x.%1x", bus, dev, func); @@ -201,6 +202,26 @@ } } +/* + * This function will convert a BAR address into a host address + * suitable for passing into the mmap function of a /proc/bus + * device. + */ +ADDRESS +linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr) +{ + ADDRESS ret = xf86GetOSOffsetFromPCI(tag, PCI_MEM|PCI_IO, addr); + if (ret) + return ret; + else + /* + * if it is not a BAR address, it must be legacy, (or wrong) + * return it as is .. + */ + return addr; +} + + #if defined(__powerpc__) #ifndef __NR_pciconfig_iobase @@ -442,7 +463,7 @@ if (Flags & VIDMEM_FRAMEBUFFER) mmapflags = MAP_SHARED | MAP_WRITECOMBINED; else - mmapflags = MAP_SHARED | MAP_NONCACHED + mmapflags = MAP_SHARED | MAP_NONCACHED; #else /* !__ia64__ */ @@ -467,7 +488,7 @@ result = mmap(NULL, Size + Offset, prot, mmapflags, fd, realBase); if (!result || ((pointer)result == MAP_FAILED)) - FatalError("linuxMapPci() mmap failure: %s\n", strerror(errno)); + return NULL; xf86MakeNewMapping(ScreenNum, Flags, realBase, Size + Offset, result); @@ -480,15 +501,80 @@ return NULL; } +#define MAX_DOMAINS 257 +static pointer DomainMmappedIO[MAX_DOMAINS]; +static pointer DomainMmappedMem[MAX_DOMAINS]; + +static int +linuxOpenLegacy(PCITAG Tag, char *name) +{ +#define PREFIX "/sys/class/pci_bus/%04x:%02x/%s" + char *path; + int domain, bus; + pciBusInfo_t *pBusInfo; + pciConfigPtr bridge = NULL; + int fd; + + path = xalloc(strlen(PREFIX) + strlen(name)); + if (!path) + return -1; + + for (;;) { + domain = xf86GetPciDomain(Tag); + bus = PCI_BUS_NO_DOMAIN(PCI_BUS_FROM_TAG(Tag)); + + /* Domain 0 is reserved -- see xf86GetPciDomain() */ + if ((domain <= 0) || (domain >= MAX_DOMAINS)) + FatalError("linuxOpenLegacy(): domain out of range\n"); + + sprintf(path, PREFIX, domain - 1, bus, name); + fd = open(path, O_RDWR); + if (fd >= 0) { + xfree(path); + return fd; + } + + pBusInfo = pciBusInfo[bus]; + if (!pBusInfo || (bridge == pBusInfo->bridge) || + !(bridge = pBusInfo->bridge)) { + xfree(path); + return -1; + } + + Tag = bridge->tag; + } + + xfree(path); + return fd; +} + pointer xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag, ADDRESS Base, unsigned long Size) { - return linuxMapPci(ScreenNum, Flags, Tag, Base, Size, PCIIOC_MMAP_IS_MEM); -} + int domain = xf86GetPciDomain(Tag); + int fd; -#define MAX_DOMAINS 257 -static pointer DomainMmappedIO[MAX_DOMAINS]; + /* + * if the /sys/...../legacy_mem structure is not supported in the + * running linux kernel, switch to the previous method + */ + if ((Base > 1024*1024 /* 1MB since that is legacy space*/) || + (fd = linuxOpenLegacy(Tag, "legacy_mem")) < 0) + return linuxMapPci(ScreenNum, Flags, Tag, Base, Size, PCIIOC_MMAP_IS_MEM); + + /* Permanently map all of memory space */ + if (!DomainMmappedMem[domain]) { + DomainMmappedMem[domain] = mmap(0, 1024*1024 /* 1MB, all of legacy space */, + PROT_READ|PROT_WRITE, + MAP_SHARED, fd, 0); + if (!DomainMmappedMem[domain]) + FatalError("xf86MapDomainMem(): mmap() failure\n"); + } + + close(fd); + return (pointer)((char *)DomainMmappedMem[domain] + Base); +} /* This has no means of returning failure, so all errors are fatal */ IOADDRESS @@ -496,17 +582,24 @@ IOADDRESS Base, unsigned long Size) { int domain = xf86GetPciDomain(Tag); + int fd; if ((domain <= 0) || (domain >= MAX_DOMAINS)) FatalError("xf86MapDomainIO(): domain out of range\n"); /* Permanently map all of I/O space */ if (!DomainMmappedIO[domain]) { - DomainMmappedIO[domain] = linuxMapPci(ScreenNum, Flags, Tag, - 0, linuxGetIOSize(Tag), - PCIIOC_MMAP_IS_IO); - if (!DomainMmappedIO[domain]) - FatalError("xf86MapDomainIO(): mmap() failure\n"); + if ((fd = linuxOpenLegacy(Tag, "legacy_io")) >= 0) { + /* encode fd in address */ + DomainMmappedIO[domain] = (pointer)(fd << 24); + } else { + DomainMmappedIO[domain] = linuxMapPci(ScreenNum, Flags, Tag, + 0, linuxGetIOSize(Tag), + PCIIOC_MMAP_IS_IO); + /* ia64 can't mmap legacy IO port space */ + if (!DomainMmappedIO[domain]) + return Base; + } } return (IOADDRESS)DomainMmappedIO[domain] + Base; @@ -520,6 +613,52 @@ unsigned long size; int len, pagemask = getpagesize() - 1; + unsigned int i, dom, bus, dev, func; + unsigned int fd; + char file[256]; + unsigned char *head = Buf; + char *enable = "1"; + char *disable = "0"; + struct stat st; + + /* + * Need to handle PCI bridges, which will have an additional path + * element at the end, e.g. + * /sys/devices/pci:///rom instead of + * /sys/devices/pci://rom + */ + dom = PCI_DOM_FROM_TAG(Tag); + bus = PCI_BUS_FROM_TAG(Tag); + dev = PCI_DEV_FROM_TAG(Tag); + func = PCI_FUNC_FROM_TAG(Tag); + sprintf(file, "/sys/devices/pci%04x:%02x/%04x:%02x:%02x.%1x/rom", + dom, bus, dom, bus, dev, func); + + /* + * we need to check that the current linux implementation supports + * the /sys/...../rom interface, if it does not, then we revert + * to the previous behaviour + */ + if (((Base & 0xfffff) == 0xC0000) && (stat(file, &st) == 0)) { + + if ((fd = open(file, O_RDWR))) { + Base = 0x0; + } + + /* enable the ROM first */ + write(fd, enable, 2); + + /* copy the ROM */ + for (i = 0; (i #include +#include #include #include "ia64Pci.h" @@ -35,11 +36,24 @@ IA64Chipset OS_PROBE_PCI_CHIPSET(scanpciWrapperOpt flags) { struct stat unused; + struct utsname utsName; if (!stat("/proc/bus/mckinley/zx1",&unused) || !stat("/proc/bus/mckinley/zx2",&unused)) return ZX1_CHIPSET; + if (!stat("/proc/sgi_sn/licenseID", &unused)) { + + /* get the UTS information */ + uname(&utsName); + if ((strstr(utsName.release, "2.6.11") == NULL) && + (strcmp(utsName.sysname, "Linux") == 0)) + /* warn if the system has potential for instability */ + ErrorF("Altix support is not present in the linux kernel before 2.6.11\n"); + + return ALTIX_CHIPSET; + } + return NONE_CHIPSET; } #endif Index: programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c,v retrieving revision 1.2 diff -u -r1.2 lnx_pci.c --- programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c 23 Apr 2004 19:54:08 -0000 1.2 +++ programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c 19 Apr 2005 01:45:02 -0000 @@ -83,3 +83,141 @@ fclose(file); return FALSE; } + + + +/* Query the kvirt address (64bit) of a BAR range from TAG */ +Bool +xf86GetPciOffsetFromOS(PCITAG tag, int index, unsigned long* bases) +{ + FILE *file; + char c[0x200]; + char *res; + unsigned int bus, devfn, dev, fn; + unsigned PCIADDR_TYPE offset[7]; + unsigned int num; + + if (index > 7) + return FALSE; + + if (!(file = fopen("/proc/bus/pci/devices","r"))) + return FALSE; + do { + res = fgets(c,0x1ff,file); + if (res) { + num = sscanf(res, + /*bus+dev vendorid deviceid irq */ + "%02x%02x\t%*04x%*04x\t%*x" + /* 7 PCI resource base addresses */ + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + /* 7 PCI resource sizes, and then optionally a driver name */ + "\t" PCIADDR_IGNORE_FMT + "\t" PCIADDR_IGNORE_FMT + "\t" PCIADDR_IGNORE_FMT + "\t" PCIADDR_IGNORE_FMT + "\t" PCIADDR_IGNORE_FMT + "\t" PCIADDR_IGNORE_FMT + "\t" PCIADDR_IGNORE_FMT, + &bus,&devfn,&offset[0],&offset[1],&offset[2],&offset[3], + &offset[4],&offset[5],&offset[6]); + if (num != 9) { /* apparantly not 2.3 style */ + fclose(file); + return FALSE; + } + + dev = devfn >> 3; + fn = devfn & 0x7; + if (tag == pciTag(bus,dev,fn)) { + /* return the offset for the index requested */ + *bases = offset[index]; + fclose(file); + return TRUE; + } + } + } while (res); + + fclose(file); + return FALSE; +} + +/* Query the kvirt address (64bit) of a BAR range from size for a given TAG */ +unsigned long +xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base) +{ + FILE *file; + char c[0x200]; + char *res; + unsigned int bus, devfn, dev, fn; + unsigned PCIADDR_TYPE offset[7]; + unsigned PCIADDR_TYPE size[7]; + unsigned int num; + unsigned int ndx; + + if (!(file = fopen("/proc/bus/pci/devices","r"))) + return NULL; + do { + res = fgets(c,0x1ff,file); + if (res) { + num = sscanf(res, + /*bus+dev vendorid deviceid irq */ + "%02x%02x\t%*04x%*04x\t%*x" + /* 7 PCI resource base addresses */ + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + /* 7 PCI resource sizes, and then optionally a driver name */ + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT + "\t" PCIADDR_FMT, + &bus,&devfn,&offset[0],&offset[1],&offset[2],&offset[3], + &offset[4],&offset[5],&offset[6], &size[0], &size[1], &size[2], + &size[3], &size[4], &size[5], &size[6]); + if (num != 16) { /* apparantly not 2.3 style */ + fclose(file); + return NULL; + } + + dev = devfn >> 3; + fn = devfn & 0x7; + if (tag == pciTag(bus,dev,fn)) { + /* ok now look through all the BAR values of this device */ + for (ndx=0; ndx<7; ndx++) { + unsigned long savePtr; + /* + * remember to lop of the last 4bits of the BAR values as they are + * memory attributes + */ + if (ndx == 6) + savePtr = (0xFFFFFFF0) & + pciReadLong(tag, PCI_CMD_BIOS_REG); + else /* this the ROM bar */ + savePtr = (0xFFFFFFF0) & + pciReadLong(tag, PCI_CMD_BASE_REG + (0x4 * ndx)); + /* find the index of the incoming base */ + if (base >= savePtr && base <= (savePtr + size[ndx])) { + fclose(file); + return ( ~(0xFUL) & (offset[ndx] + (base - savePtr))); + } + } + } + } + } while (res); + + fclose(file); + return NULL; + +} Index: programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.c,v retrieving revision 1.1 diff -u -r1.1 ia64Pci.c --- programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.c 15 Sep 2004 09:23:59 -0000 1.1 +++ programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.c 19 Apr 2005 01:45:02 -0000 @@ -29,19 +29,167 @@ * This file contains the glue needed to support various IA-64 chipsets. */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include "compiler.h" #include "460gxPCI.h" #include "e8870PCI.h" #include "zx1PCI.h" +#include "altixPCI.h" #include "Pci.h" #include "ia64Pci.h" +static int ia64_port_to_fd(unsigned long port) +{ + return (port >> 24) & 0xffffffff; +} + +void outb(unsigned long port, unsigned char val) +{ + int fd = ia64_port_to_fd(port); + + if (!fd) { + ErrorF("bad I/O context\n"); + goto out; + } + if (lseek(fd, port & 0xffff, SEEK_SET) == -1) { + ErrorF("I/O lseek failed\n"); + goto out; + } + if (write(fd, &val, 1) != 1) { + ErrorF("I/O write failed\n"); + goto out; + } + out: + return; +} + +void outw(unsigned long port, unsigned short val) +{ + int fd = ia64_port_to_fd(port); + + if (!fd) { + ErrorF("bad I/O context\n"); + goto out; + } + if (lseek(fd, port & 0xffff, SEEK_SET) == -1) { + ErrorF("I/O lseek failed\n"); + goto out; + } + if (write(fd, &val, 2) != 2) { + ErrorF("I/O write failed\n"); + goto out; + } + out: + return; +} + +void outl(unsigned long port, unsigned int val) +{ + int fd = ia64_port_to_fd(port); + + if (!fd) { + ErrorF("bad I/O context\n"); + goto out; + } + if (lseek(fd, port & 0xffff, SEEK_SET) == -1) { + ErrorF("I/O lseek failed\n"); + goto out; + } + if (write(fd, &val, 4) != 4) { + ErrorF("I/O write failed\n"); + goto out; + } + out: + return; +} + +unsigned int inb(unsigned long port) +{ + int fd = ia64_port_to_fd(port); + unsigned char val; + + if (!fd) { + ErrorF("bad I/O context\n"); + val = -1; + goto out; + } + if (lseek(fd, port & 0xffff, SEEK_SET) == -1) { + ErrorF("I/O lseek failed\n"); + val = -1; + goto out; + } + if (read(fd, &val, 1) != 1) { + ErrorF("I/O read failed\n"); + val = -1; + goto out; + } + out: + return val; +} + +unsigned int inw(unsigned long port) +{ + int fd = ia64_port_to_fd(port); + unsigned short val; + + if (!fd) { + ErrorF("bad I/O context\n"); + val = -1; + goto out; + } + if (lseek(fd, port & 0xffff, SEEK_SET) == -1) { + ErrorF("I/O lseek failed\n"); + val = -1; + goto out; + } + if (read(fd, &val, 2) != 2) { + ErrorF("I/O read failed\n"); + val = -1; + goto out; + } + out: + return val; +} + +unsigned int inl(unsigned long port) +{ + int fd = ia64_port_to_fd(port); + unsigned int val; + + if (!fd) { + ErrorF("bad I/O context\n"); + val = -1; + goto out; + } + if (lseek(fd, port & 0xffff, SEEK_SET) == -1) { + ErrorF("I/O lseek failed\n"); + val = -1; + goto out; + } + if (read(fd, &val, 4) != 4) { + ErrorF("I/O read failed\n"); + val = -1; + goto out; + } + out: + return val; +} + void ia64ScanPCIWrapper(scanpciWrapperOpt flags) { static IA64Chipset chipset = NONE_CHIPSET; if (flags == SCANPCI_INIT) { - + /* PCI configuration space probes should be done first */ if (xorgProbe460GX(flags)) { chipset = I460GX_CHIPSET; @@ -55,27 +203,35 @@ #ifdef OS_PROBE_PCI_CHIPSET chipset = OS_PROBE_PCI_CHIPSET(flags); switch (chipset) { - case ZX1_CHIPSET: - xf86PreScanZX1(); - return; - default: - return; + case ZX1_CHIPSET: + xf86PreScanZX1(); + return; + case ALTIX_CHIPSET: + xf86PreScanAltix(); + return; + default: + return; } #endif } else /* if (flags == SCANPCI_TERM) */ { switch (chipset) { - case I460GX_CHIPSET: - xf86PostScan460GX(); - return; - case E8870_CHIPSET: - xf86PostScanE8870(); - return; - case ZX1_CHIPSET: - xf86PostScanZX1(); - return; - default: - return; + case I460GX_CHIPSET: + xf86PostScan460GX(); + return; + case E8870_CHIPSET: + xf86PostScanE8870(); + return; + case ZX1_CHIPSET: + xf86PostScanZX1(); + return; + case ALTIX_CHIPSET: + xf86PostScanAltix(); + return; + default: + return; } } } + + Index: programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.h =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.h,v retrieving revision 1.1 diff -u -r1.1 ia64Pci.h --- programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.h 15 Sep 2004 09:23:59 -0000 1.1 +++ programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.h 19 Apr 2005 01:45:02 -0000 @@ -32,7 +32,8 @@ NONE_CHIPSET, I460GX_CHIPSET, E8870_CHIPSET, - ZX1_CHIPSET + ZX1_CHIPSET, + ALTIX_CHIPSET } IA64Chipset; # ifdef OS_PROBE_PCI_CHIPSET --- /dev/null 1998-04-18 18:39:26.406250410 -0700 +++ programs/Xserver/hw/xfree86/os-support/bus/altixPCI.c 2005-04-18 11:50:09.000000000 -0700 @@ -0,0 +1,116 @@ +/* + * This file contains the glue necessary for support of SGI's Altix chipset. + */ +#include +#include +#include "altixPCI.h" +#include "xf86.h" +#include "Pci.h" + +/* + * get_dev_on_bus - Return the first device we find on segnum, busnum + * + * Walk all the PCI devices and return the first one found on segnum, busnum. + * There may be a better way to do this in some xf86* function I don't know + * about. + */ +static pciDevice *get_dev_on_bus(unsigned int segnum, unsigned int busnum) +{ + pciDevice **pdev = xf86scanpci(0); + int i; + + for (i = 0; pdev[i] != NULL; i++) + if (PCI_DOM_FROM_TAG(pdev[i]->tag) == segnum && + pdev[i]->busnum == busnum) + return pdev[i]; + /* Should never get here... */ + ErrorF("No PCI device found on %04x:%02x??", segnum, busnum); + return NULL; +} + +/* + * get_bridge_info - fill in the bridge info for bus_info based on pdev + * + * Find the parent bus for pdev if it exists, otherwise assume pdev *is* + * the parent bus. We need this on Altix because our bridges are transparent. + */ +static void get_bridge_info(pciBusInfo_t *bus_info, pciDevice *pdev) +{ + unsigned int parent_segnum, segnum = PCI_DOM_FROM_TAG(pdev->tag); + unsigned int parent_busnum, busnum = pdev->busnum; + char bridge_path[] = "/sys/class/pci_bus/0000:00/bridge"; + char bridge_target[] = "../../../devices/pci0000:00"; + + /* Path to this device's bridge */ + sprintf(bridge_path, "/sys/class/pci_bus/%04x:%02x/bridge", segnum, + busnum); + + if (readlink(bridge_path, bridge_target, strlen(bridge_target)) < 0) { + perror("failed to dereference bridge link"); + ErrorF("failed to dereference bridge link, aborting\n"); + exit(-1); + } + + sscanf(bridge_target, "../../../devices/pci%04x:%02x", &parent_segnum, + &parent_busnum); + + /* + * If there's no bridge or the bridge points to the device, use + * pdev as the bridge + */ + if (segnum == parent_segnum && busnum == parent_busnum) { + bus_info->bridge = pdev; + bus_info->secondary = FALSE; + bus_info->primary_bus = busnum; + } else { + bus_info->bridge = get_dev_on_bus(parent_segnum, + parent_busnum); + bus_info->secondary = TRUE; + bus_info->primary_bus = parent_busnum; + } + pdev->businfo = bus_info; + pdev->pci_base_class = PCI_CLASS_DISPLAY; + pdev->pci_sub_class = PCI_SUBCLASS_PREHISTORIC_VGA; +} + +void xf86PreScanAltix(void) +{ + /* Nothing to see here... */ +} + +void xf86PostScanAltix(void) +{ + pciConfigPtr *pdev; + pciBusInfo_t *bus_info; + int prevBusNum, curBusNum, idx; + + /* + * Altix PCI bridges are invisible to userspace, so we make each device + * look like it's its own bridge unless it actually has a parent (as in + * the case of PCI to PCI bridges). + */ + bus_info = pciBusInfo[0]; + pdev = xf86scanpci(0); + prevBusNum = curBusNum = pdev[0]->busnum; + bus_info = pciBusInfo[curBusNum]; + bus_info->bridge = pdev[0]; + bus_info->secondary = FALSE; + bus_info->primary_bus = curBusNum; + + /* Walk all the PCI devices, assigning their bridge info */ + for (idx = 0; pdev[idx] != NULL; idx++) { + if (pdev[idx]->busnum == prevBusNum) + continue; /* Already fixed up this bus */ + + curBusNum = pdev[idx]->busnum; + bus_info = pciBusInfo[curBusNum]; + + /* + * Fill in bus_info for pdev. The bridge field will either + * be pdev[idx] or a device on the parent bus. + */ + get_bridge_info(bus_info, pdev[idx]); + prevBusNum = curBusNum; + } + return; +} --- /dev/null 1998-04-18 18:39:26.406250410 -0700 +++ programs/Xserver/hw/xfree86/os-support/bus/altixPCI.h 2005-04-18 12:03:09.000000000 -0700 @@ -0,0 +1,16 @@ +#ifndef PCI_ALTIX_H +#define PCI_ALTIX_H 1 + +#include +#include + +Bool xorgProbeAltix(scanpciWrapperOpt flags); +void xf86PreScanAltix(void); +void xf86PostScanAltix(void); + +/* Some defines for PCI */ +#define VENDOR_SGI 0x10A9 +#define CHIP_TIO_CA 0x1010 +#define CHIP_PIC_PCI 0x1011 + +#endif