Igor Stoppa, Nokia

n770 - OMAP-1, n800 - OMAP-2
TBD - OMAP-3: leakage will mandate use of (35!) power gates

have cpufreq running on top of clock framework
spread to deadline vs race to idle
DVFS uses pause/resume (20-50ms)
0.1ms for PLL
5ms for voltage
driver & screen sync is big delay
axiom: best to always run at highest MHz for given voltage
cpufreq_set_policy() -- notification needs a way to fail
ondemand sampling issues