commit 3f73797a653e5ae300443a809d9de4a5f4f19c21 Author: Jiri Slaby Date: Tue Jul 17 08:06:18 2007 +0200 isr optimisation (likely/unlikely) diff --git a/ath.c b/ath.c index 4be0b04..9b19bb7 100644 --- a/ath.c +++ b/ath.c @@ -43,9 +43,9 @@ #define AR_DEBUG 1 #if AR_DEBUG -#define DPRINTF(sc, _m, _fmt...) do { \ - if (((sc)->debug & (_m)) && net_ratelimit()) \ - printk(KERN_DEBUG _fmt); \ +#define DPRINTF(sc, _m, _fmt...) do { \ + if (unlikely(((sc)->debug & (_m)) && net_ratelimit())) \ + printk(KERN_DEBUG _fmt); \ } while (0) #else static inline int __attribute__ ((format (printf, 3, 4))) @@ -164,9 +164,9 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) ds = bf->desc; ret = sc->ah->ah_proc_tx_desc(sc->ah, ds); - if (ret == -EINPROGRESS) + if (unlikely(ret == -EINPROGRESS)) break; - else if (ret) { + else if (unlikely(ret)) { printk(KERN_ERR "ath: error %d while processing " "queue %u\n", ret, txq->qnum); break; @@ -180,7 +180,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) txs.control = bf->ctl; txs.retry_count = ds->ds_txstat.ts_shortretry + ds->ds_txstat.ts_longretry / 6; - if (ds->ds_txstat.ts_status) { + if (unlikely(ds->ds_txstat.ts_status)) { sc->ll_stats.dot11ACKFailureCount++; if (ds->ds_txstat.ts_status & AR5K_TXERR_XRETRY) { txs.excessive_retries = 1; @@ -202,7 +202,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) list_move_tail(&bf->list, &sc->txbuf); spin_unlock(&sc->txbuflock); } - if (list_empty(&txq->q)) + if (likely(list_empty(&txq->q))) txq->link = NULL; spin_unlock(&txq->lock); } @@ -224,7 +224,7 @@ static int ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) struct sk_buff *skb = bf->skb; struct ath_desc *ds; - if (skb == NULL) { + if (likely(skb == NULL)) { unsigned int off; /* @@ -232,7 +232,7 @@ static int ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) * fake physical layer header at the start. */ skb = dev_alloc_skb(sc->rxbufsize + sc->cachelsz - 1); - if (skb == NULL) { + if (unlikely(skb == NULL)) { DPRINTF(sc, ATH_DEBUG_ANY, "%s: skbuff alloc of " "size %u failed\n", __func__, sc->rxbufsize + sc->cachelsz - 1); @@ -251,7 +251,7 @@ static int ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) bf->skb = skb; bf->skbaddr = pci_map_single(sc->pdev, skb->data, sc->rxbufsize, PCI_DMA_FROMDEVICE); - if (pci_dma_mapping_error(bf->skbaddr)) { + if (unlikely(pci_dma_mapping_error(bf->skbaddr))) { printk(KERN_ERR "%s: DMA mapping failed\n", __func__); dev_kfree_skb(skb); bf->skb = NULL; @@ -326,7 +326,7 @@ static void ath_tasklet_rx(unsigned long data) spin_lock(&sc->rxbuflock); do { - if (list_empty(&sc->rxbuf)) { + if (unlikely(list_empty(&sc->rxbuf))) { if (net_ratelimit()) printk(KERN_WARNING "ath: empty rx buf pool\n"); break; @@ -335,27 +335,27 @@ static void ath_tasklet_rx(unsigned long data) BUG_ON(bf->skb == NULL); skb = bf->skb; ds = bf->desc; - if (ds->ds_link == bf->daddr) /* this is the end */ + if (unlikely(ds->ds_link == bf->daddr)) /* this is the end */ break; ret = sc->ah->ah_proc_rx_desc(sc->ah, ds); - if (ret == -EINPROGRESS) + if (unlikely(ret == -EINPROGRESS)) break; - else if (ret) { + else if (unlikely(ret)) { if (net_ratelimit()) printk(KERN_ERR "ath: error in processing rx " "descriptor\n"); return; } - if (ds->ds_rxstat.rs_more) { + if (unlikely(ds->ds_rxstat.rs_more)) { if (net_ratelimit()) printk(KERN_INFO "ath: unsupported jumbo\n"); goto next; } stat = ds->ds_rxstat.rs_status; - if (stat) { + if (unlikely(stat)) { if (stat & AR5K_RXERR_CRC) sc->stats.ast_rx_crcerr++; if (stat & AR5K_RXERR_FIFO) @@ -398,7 +398,7 @@ accept: PCI_DMA_FROMDEVICE); bf->skb = NULL; - if ((ieee80211_get_hdrlen_from_skb(skb) & 3) && net_ratelimit()) + if (unlikely((ieee80211_get_hdrlen_from_skb(skb) & 3) && net_ratelimit())) printk(KERN_DEBUG "rx len is not %%4: %u\n", ieee80211_get_hdrlen_from_skb(skb)); skb_put(skb, len); @@ -604,7 +604,7 @@ static void ath_stoprecv(struct ath_softc *sc) ath5k_hw_stop_rx_dma(ah); /* disable DMA engine */ mdelay(3); /* 3ms is long enough for 1 frame */ #if AR_DEBUG - if (sc->debug & (ATH_DEBUG_RESET | ATH_DEBUG_FATAL)) { + if (unlikely(sc->debug & (ATH_DEBUG_RESET | ATH_DEBUG_FATAL))) { struct ath_desc *ds; struct ath_buf *bf; int status; @@ -663,7 +663,7 @@ static void ath_draintxq(struct ath_softc *sc) int i; /* XXX return value */ - if (!sc->invalid) { + if (likely(!sc->invalid)) { #ifdef BLE /* don't touch the hardware if marked invalid */ (void)ath5k_hw_stop_tx_dma(ah, sc->bhalq); @@ -1018,14 +1018,14 @@ static int ath_reset(struct ieee80211_hw *hw) ath_stoprecv(sc); ret = ath5k_hw_reset(ah, IEEE80211_IF_TYPE_STA, sc->curchan, true); - if (ret) { + if (unlikely(ret)) { printk(KERN_ERR "ath: can't reset hardware (%d)\n", ret); goto err; } ath_update_txpow(sc); ret = ath_startrecv(sc); - if (ret) { + if (unlikely(ret)) { printk(KERN_ERR "ath: can't start recv logic\n"); goto err; } @@ -1248,7 +1248,7 @@ static irqreturn_t ath_intr(int irq, void *dev_id) enum ath5k_int status; unsigned int counter = 1000; - if (sc->invalid || !ath5k_hw_is_intr_pending(ah)) + if (unlikely(sc->invalid || !ath5k_hw_is_intr_pending(ah))) return IRQ_NONE; do { @@ -1262,7 +1262,7 @@ static irqreturn_t ath_intr(int irq, void *dev_id) DPRINTF(sc, ATH_DEBUG_INTR, "%s: status 0x%x/0x%x\n", __func__, status, sc->imask); status &= sc->imask; /* discard unasked for bits */ - if (status & AR5K_INT_FATAL) { + if (unlikely(status & AR5K_INT_FATAL)) { /* * Fatal errors are unrecoverable. Typically * these are caused by DMA errors. Unfortunately @@ -1271,7 +1271,7 @@ static irqreturn_t ath_intr(int irq, void *dev_id) */ sc->stats.ast_hardware++; ath_reset(sc->hw); - } else if (status & AR5K_INT_RXORN) { + } else if (unlikely(status & AR5K_INT_RXORN)) { sc->stats.ast_rxorn++; ath_reset(sc->hw); } else { @@ -1313,7 +1313,7 @@ static irqreturn_t ath_intr(int irq, void *dev_id) } } while (ath5k_hw_is_intr_pending(ah) && counter-- > 0); - if (!counter && net_ratelimit()) + if (unlikely(!counter && net_ratelimit())) printk(KERN_WARNING "ath: too many interrupts, giving up for " "now\n"); diff --git a/ath5k_hw.c b/ath5k_hw.c index 963b695..6f17542 100644 --- a/ath5k_hw.c +++ b/ath5k_hw.c @@ -1737,7 +1737,7 @@ int ath5k_hw_get_isr(struct ath_hw *hal, enum ath5k_int *interrupt_mask) */ if (hal->ah_version == AR5K_AR5210) { data = ath5k_hw_reg_read(hal, AR5K_ISR); - if (data == AR5K_INT_NOCARD) { + if (unlikely(data == AR5K_INT_NOCARD)) { *interrupt_mask = data; return -ENODEV; } @@ -1753,7 +1753,7 @@ int ath5k_hw_get_isr(struct ath_hw *hal, enum ath5k_int *interrupt_mask) */ *interrupt_mask = (data & AR5K_INT_COMMON) & hal->ah_imr; - if (data == AR5K_INT_NOCARD) + if (unlikely(data == AR5K_INT_NOCARD)) return -ENODEV; if (data & (AR5K_ISR_RXOK | AR5K_ISR_RXERR)) @@ -1764,11 +1764,11 @@ int ath5k_hw_get_isr(struct ath_hw *hal, enum ath5k_int *interrupt_mask) if (hal->ah_version != AR5K_AR5210) { /*HIU = Host Interface Unit (PCI etc)*/ - if (data & (AR5K_ISR_HIUERR)) + if (unlikely(data & (AR5K_ISR_HIUERR))) *interrupt_mask |= AR5K_INT_FATAL; /*Beacon Not Ready*/ - if (data & (AR5K_ISR_BNR)) + if (unlikely(data & (AR5K_ISR_BNR))) *interrupt_mask |= AR5K_INT_BNR; } @@ -1784,7 +1784,7 @@ int ath5k_hw_get_isr(struct ath_hw *hal, enum ath5k_int *interrupt_mask) * In case we didn't handle anything, * print the register value. */ - if (*interrupt_mask == 0 && printk_ratelimit()) + if (unlikely(*interrupt_mask == 0 && net_ratelimit())) AR5K_PRINTF("0x%08x\n", data); return 0; @@ -3976,7 +3976,7 @@ static int ath5k_hw_proc_2word_tx_status(struct ath_hw *hal, tx_status = (struct ath5k_hw_tx_status*)&desc->ds_hw[0]; /* No frame has been send or error */ - if ((tx_status->tx_status_1 & AR5K_DESC_TX_STATUS1_DONE) == 0) + if (unlikely((tx_status->tx_status_1 & AR5K_DESC_TX_STATUS1_DONE) == 0)) return -EINPROGRESS; /* @@ -4027,7 +4027,7 @@ static int ath5k_hw_proc_4word_tx_status(struct ath_hw *hal, tx_status = (struct ath5k_hw_tx_status*)&desc->ds_hw[2]; /* No frame has been send or error */ - if ((tx_status->tx_status_1 & AR5K_DESC_TX_STATUS1_DONE) == 0) + if (unlikely((tx_status->tx_status_1 & AR5K_DESC_TX_STATUS1_DONE) == 0)) return -EINPROGRESS; /* @@ -4118,7 +4118,7 @@ int ath5k_hw_setup_rx_desc(struct ath_hw *hal, struct ath_desc *desc, /* Setup descriptor */ rx_desc->rx_control_1 = size & AR5K_DESC_RX_CTL1_BUF_LEN; - if (rx_desc->rx_control_1 != size) + if (unlikely(rx_desc->rx_control_1 != size)) return -EINVAL; if (flags & AR5K_RXDESC_INTREQ) @@ -4138,7 +4138,8 @@ static int ath5k_hw_proc_old_rx_status(struct ath_hw *hal, rx_status = (struct ath5k_hw_old_rx_status*)&desc->ds_hw[0]; /* No frame received / not ready */ - if ((rx_status->rx_status_1 & AR5K_OLD_RX_DESC_STATUS1_DONE) == 0) + if (unlikely((rx_status->rx_status_1 & AR5K_OLD_RX_DESC_STATUS1_DONE) + == 0)) return -EINPROGRESS; /* @@ -4217,7 +4218,8 @@ static int ath5k_hw_proc_new_rx_status(struct ath_hw *hal, rx_err = (struct ath5k_hw_rx_error*)&desc->ds_hw[0]; /* No frame received / not ready */ - if ((rx_status->rx_status_1 & AR5K_NEW_RX_DESC_STATUS1_DONE) == 0) + if (unlikely((rx_status->rx_status_1 & AR5K_NEW_RX_DESC_STATUS1_DONE) + == 0)) return -EINPROGRESS; /*