commit db5ff9a0d954d3507a2307dac1406218e2dde2ce
Author: Jiri Slaby <ku@bellona.localdomain>
Date:   Tue Jun 19 14:46:11 2007 +0200

    remove translation.h and functions in ath_hal struct

diff --git a/ath/if_ath.c b/ath/if_ath.c
index 53bfe5b..6841f55 100644
--- a/ath/if_ath.c
+++ b/ath/if_ath.c
@@ -376,7 +376,7 @@ ath_attach(u_int16_t devid, struct net_device *dev)
 	 * return false w/o doing anything.  MAC's that do
 	 * support it will return true w/o doing anything.
 	 */
-	sc->sc_mrretry = ath_hal_setupxtxdesc(ah, NULL, 0,0, 0,0, 0,0);
+	sc->sc_mrretry = ah->ah_setup_xtx_desc(ah, NULL, 0, 0, 0, 0, 0, 0);
 
 	/*
 	 * Check if the device has hardware counters for PHY
@@ -389,7 +389,7 @@ ath_attach(u_int16_t devid, struct net_device *dev)
 	/*
 	 * Get the hardware key cache size.
 	 */
-	sc->sc_keymax = ath_hal_keycachesize(ah);
+	sc->sc_keymax = ath5k_hw_get_keycache_size(ah);
 	if (sc->sc_keymax > ATH_KEYMAX) {
 		printk(KERN_WARNING "Warning, using only %u of %u key cache "
 				"slots\n", ATH_KEYMAX, sc->sc_keymax);
@@ -401,7 +401,7 @@ ath_attach(u_int16_t devid, struct net_device *dev)
 	 * reset the contents on initial power up.
 	 */
 	for (i = 0; i < sc->sc_keymax; i++)
-		ath_hal_keyreset(ah, i);
+		ath5k_hw_reset_key(ah, i);
 	/*
 	 * Mark key cache slots associated with global keys
 	 * as in use.  If we knew TKIP was not to be used we
@@ -556,8 +556,8 @@ ath_attach(u_int16_t devid, struct net_device *dev)
 	sc->sc_softled = (devid == PCI_DEVICE_ID_ATHEROS_AR5212_IBM ||
 			devid == PCI_DEVICE_ID_ATHEROS_AR5211);
 	if (sc->sc_softled) {
-		ath_hal_gpioCfgOutput(ah, sc->sc_ledpin);
-		ath_hal_gpioset(ah, sc->sc_ledpin, !sc->sc_ledon);
+		ath5k_hw_set_gpio_output(ah, sc->sc_ledpin);
+		ath5k_hw_set_gpio(ah, sc->sc_ledpin, !sc->sc_ledon);
 	}
 
 #ifdef BLE
@@ -664,7 +664,7 @@ ath_attach(u_int16_t devid, struct net_device *dev)
 	/*
 	 * Query the hal about antenna support.
 	 */
-	sc->sc_defant = ath_hal_getdefantenna(ah);
+	sc->sc_defant = ath5k_hw_get_def_antenna(ah);
 
 	/*
 	 * Not all chips have the VEOL support we want to
@@ -740,7 +740,7 @@ bad2:
 	ath_desc_free(sc);
 bad:
 	if (ah) {
-		ah->ah_detach(ah);
+		ath5k_hw_detach(ah);
 	}
 	sc->sc_invalid = 1;
 	return error;
@@ -771,7 +771,7 @@ ath_detach(struct net_device *dev)
 //	ath_rate_detach(sc->sc_rc);
 	ath_desc_free(sc);
 	ath_tx_cleanup(sc);
-	sc->sc_ah->ah_detach(sc->sc_ah);
+	ath5k_hw_detach(sc->sc_ah);
 
 	/*
 	 * NB: can't reclaim these until after ieee80211_ifdetach
@@ -793,7 +793,7 @@ ath_suspend(struct net_device *dev)
 
 	DPRINTF(sc, ATH_DEBUG_ANY, "%s: flags %x\n", __func__, dev->flags);
 	if (sc->sc_softled) 
-	    	ath_hal_gpioset(ah, sc->sc_ledpin, 1);
+	    	ath5k_hw_set_gpio(ah, sc->sc_ledpin, 1);
 
 	ath_stop(dev);
 }
@@ -807,8 +807,8 @@ ath_resume(struct net_device *dev)
 	DPRINTF(sc, ATH_DEBUG_ANY, "%s: flags %x\n", __func__, dev->flags);
 	ath_init(dev);
 	if (sc->sc_softled) {
-	    	ath_hal_gpioCfgOutput(ah, sc->sc_ledpin);
-	    	ath_hal_gpioset(ah, sc->sc_ledpin, 0);
+	    	ath5k_hw_set_gpio_output(ah, sc->sc_ledpin);
+	    	ath5k_hw_set_gpio(ah, sc->sc_ledpin, 0);
 	}
 }
 
@@ -841,8 +841,8 @@ irqreturn_t ath_intr(int irq, void *dev_id)
 	if ((dev->flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
 		DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags 0x%x\n",
 			__func__, dev->flags);
-		ath_hal_getisr(ah, &status);	/* clear ISR */
-		ath_hal_intrset(ah, 0);		/* disable further intr's */
+		ath5k_hw_get_isr(ah, &status);	/* clear ISR */
+		ath5k_hw_set_intr(ah, 0);		/* disable further intr's */
 		return IRQ_HANDLED;
 	}
 	needmark = 0;
@@ -854,7 +854,7 @@ irqreturn_t ath_intr(int irq, void *dev_id)
 		* bits we haven't explicitly enabled so we mask the
 		* value to insure we only process bits we requested.
 		*/
-		ath_hal_getisr(ah, &status);		/* NB: clears ISR too */
+		ath5k_hw_get_isr(ah, &status);		/* NB: clears ISR too */
 		DPRINTF(sc, ATH_DEBUG_INTR, "%s: status 0x%x\n", __func__, status);
 		status &= sc->sc_imask;			/* discard unasked for bits */
 		if (status & AR5K_INT_FATAL) {
@@ -865,11 +865,11 @@ irqreturn_t ath_intr(int irq, void *dev_id)
 			* by the hal.
 			*/
 			sc->sc_stats.ast_hardware++;
-			ath_hal_intrset(ah, 0);		/* disable intr's until reset */
+			ath5k_hw_set_intr(ah, 0);		/* disable intr's until reset */
 			tasklet_schedule(&sc->sc_fataltq);
 		} else if (status & AR5K_INT_RXORN) {
 			sc->sc_stats.ast_rxorn++;
-			ath_hal_intrset(ah, 0);		/* disable intr's until reset */
+			ath5k_hw_set_intr(ah, 0);		/* disable intr's until reset */
 			tasklet_schedule(&sc->sc_rxorntq);
 		} else {
 			if (status & AR5K_INT_SWBA) {
@@ -893,7 +893,7 @@ irqreturn_t ath_intr(int irq, void *dev_id)
 			if (status & AR5K_INT_TXURN) {
 				sc->sc_stats.ast_txurn++;
 				/* bump tx trigger level */
-				ath_hal_updatetxtriglevel(ah, true);
+				ath5k_hw_update_tx_triglevel(ah, true);
 			}
 			if (status & AR5K_INT_RX)
 				tasklet_schedule(&sc->sc_rxtq);
@@ -909,19 +909,19 @@ irqreturn_t ath_intr(int irq, void *dev_id)
 				* Disable interrupts until we service the MIB
 				* interrupt; otherwise it will continue to fire.
 				*/
-				ath_hal_intrset(ah, 0);
+				ath5k_hw_set_intr(ah, 0);
 				/*
 				* Let the hal handle the event.  We assume it will
 				* clear whatever condition caused the interrupt.
 				*/
 #ifdef BLE
-				ath_hal_mibevent(ah,
+				ath5k_hw_proc_mib_event(ah,
 					&ATH_NODE(sc->sc_ic.ic_bss)->an_halstats);
 #endif
-				ath_hal_intrset(ah, sc->sc_imask);
+				ath5k_hw_set_intr(ah, sc->sc_imask);
 			}
 		}
-	} while (ath_hal_intrpend(ah));
+	} while (ath5k_hw_is_intr_pending(ah));
 	
 	return IRQ_HANDLED;
 }
@@ -1064,7 +1064,8 @@ ath_init(struct net_device *dev)
 	sc->sc_curchan.freq = ic->ic_ibss_chan->ic_freq;
 	sc->sc_curchan.channel_flags = ath_chan2flags(ic, ic->ic_ibss_chan);
 #endif
-	if (!ath_hal_reset(ah, sc->sc_opmode, &sc->sc_curchan, false, &status)) {
+	if (!ath5k_hw_reset(ah, sc->sc_opmode, &sc->sc_curchan, false,
+			&status)) {
 		printk(KERN_ERR "unable to reset hardware; hal status %u\n",
 			status);
 		error = -EIO;
@@ -1108,7 +1109,7 @@ ath_init(struct net_device *dev)
 	 */
 	if (sc->sc_needmib && ic->ic_opmode == IEEE80211_M_STA)
 		sc->sc_imask |= AR5K_INT_MIB;
-	ath_hal_intrset(ah, sc->sc_imask);
+	ath5k_hw_set_intr(ah, sc->sc_imask);
 
 	dev->flags |= IFF_RUNNING;
 	ic->ic_state = IEEE80211_S_INIT;
@@ -1169,16 +1170,16 @@ ath_stop_locked(struct net_device *dev)
 		if (!sc->sc_invalid) {
 			if (sc->sc_softled) {
 				del_timer(&sc->sc_ledtimer);
-				ath_hal_gpioset(ah, sc->sc_ledpin,
+				ath5k_hw_set_gpio(ah, sc->sc_ledpin,
 					!sc->sc_ledon);
 				sc->sc_blinking = 0;
 			}
-			ath_hal_intrset(ah, 0);
+			ath5k_hw_set_intr(ah, 0);
 		}
 		ath_draintxq(sc);
 		if (!sc->sc_invalid) {
 			ath_stoprecv(sc);
-			ath_hal_phydisable(ah);
+			ath5k_hw_phy_disable(ah);
 		} else
 			sc->sc_rxlink = NULL;
 		ath_beacon_free(sc);
@@ -1223,7 +1224,8 @@ ath_stop(struct net_device *dev)
 		else {
 			DPRINTF(sc, ATH_DEBUG_RESET,
 				"%s: putting device to full sleep\n", __func__);
-			ath_hal_setpower(sc->sc_ah, AR5K_PM_FULL_SLEEP, 0);
+			ath5k_hw_set_power(sc->sc_ah, AR5K_PM_FULL_SLEEP,
+					true, 0);
 		}
 	}
 	ATH_UNLOCK(sc);
@@ -1256,13 +1258,13 @@ ath_reset(struct net_device *dev)
 	sc->sc_curchan.freq = c->ic_freq;
 	sc->sc_curchan.channel_flags = ath_chan2flags(ic, c);
 
-	ath_hal_intrset(ah, 0);		/* disable interrupts */
+	ath5k_hw_set_intr(ah, 0);		/* disable interrupts */
 	ath_draintxq(sc);		/* stop xmit side */
 	ath_stoprecv(sc);		/* stop recv side */
 	
 	opmode = (ic->ic_opmode == IEEE80211_M_AHDEMO) ? 0 : ic->ic_opmode;
 	/* NB: indicate channel change so we do a full reset */
-	if (!ath_hal_reset(ah, opmode, &sc->sc_curchan, true, &status))
+	if (!ath5k_hw_reset(ah, opmode, &sc->sc_curchan, true, &status))
 		if_printf(dev, "%s: unable to reset hardware: '%s' (%u)\n",
 			__func__, hal_status_desc[status], status);
 	ath_update_txpow(sc);		/* update tx power state */
@@ -1277,7 +1279,7 @@ ath_reset(struct net_device *dev)
 	ath_chan_change(sc, c);
 	if (ic->ic_state == IEEE80211_S_RUN)
 		ath_beacon_config(sc);	/* restart beacons */
-	ath_hal_intrset(ah, sc->sc_imask);
+	ath5k_hw_set_intr(ah, sc->sc_imask);
 
 	if (ic->ic_state == IEEE80211_S_RUN)
 		netif_wake_queue(dev);	/* restart xmit */
@@ -1548,7 +1550,7 @@ ath_start_raw(struct sk_buff *skb, struct net_device *dev)
 	 * Formulate first tx descriptor with tx controls.
 	 */
 	/* XXX check return value? */
-	ath_hal_setuptxdesc(ah, ds
+	ah->ah_setup_tx_desc(ah, ds
 		, pktlen		/* packet length */
 		, hdrlen		/* header length */
 		, atype			/* Atheros packet type */
@@ -1566,7 +1568,7 @@ ath_start_raw(struct sk_buff *skb, struct net_device *dev)
 	 */
 	ds->ds_link = 0;
 	ds->ds_data = bf->bf_skbaddr;
-	ath_hal_filltxdesc(ah, ds
+	ah->ah_fill_tx_desc(ah, ds
 		, skb->len		/* segment length */
 		, true		/* first segment */
 		, true		/* last segment */
@@ -1618,7 +1620,7 @@ ath_start_raw(struct sk_buff *skb, struct net_device *dev)
 	DPRINTF(sc, ATH_DEBUG_TX_PROC, "%s: txq depth = %d\n",
 		__func__, txq->axq_depth);
 	if (txq->axq_link == NULL) {
-		ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
+		ath5k_hw_put_tx_buf(ah, txq->axq_qnum, bf->bf_daddr);
 		DPRINTF(sc, ATH_DEBUG_XMIT,
 			"%s: TXDP[%u] = %llx (%p) depth %d\n", __func__,
 			txq->axq_qnum, (unsigned long long)bf->bf_daddr,
@@ -1637,7 +1639,7 @@ ath_start_raw(struct sk_buff *skb, struct net_device *dev)
 	 * frames only go out on DTIM and to avoid possible races.
 	 */
 	if (txq != sc->sc_cabq)
-		ath_hal_txstart(ah, txq->axq_qnum);
+		ath5k_hw_tx_start(ah, txq->axq_qnum);
 	ATH_TXQ_UNLOCK_BH(txq);
 
 	sc->sc_devstats.tx_packets++;
@@ -1826,7 +1828,7 @@ ath_start(struct sk_buff *skb, struct net_device *dev)
 				u_int64_t tsf;
 				__le32 *tstamp;
 
-				tsf = ath_hal_gettsf64(ah);
+				tsf = ath5k_hw_get_tsf64(ah);
 				/* XXX: adjust 100us delay to xmit */
 				tsf += 100;
 				tstamp = (__le32 *)&wh[1];
@@ -1927,13 +1929,13 @@ ath_keyset_tkip(struct ath_softc *sc, const struct ieee80211_key *k,
 		 */
 		memcpy(hk->wk_mic, k->wk_txmic, sizeof(hk->wk_mic));
 		KEYPRINTF(sc, k->wk_keyix, hk, zerobssid);
-		if (!ath_hal_keyset(ah, k->wk_keyix, hk, zerobssid))
+		if (!ath5k_hw_set_key(ah, k->wk_keyix, hk, zerobssid))
 			return 0;
 
 		memcpy(hk->wk_mic, k->wk_rxmic, sizeof(hk->wk_mic));
 		KEYPRINTF(sc, k->wk_keyix+32, hk, mac);
 		/* XXX delete tx key on failure? */
-		return ath_hal_keyset(ah, k->wk_keyix+32, hk, mac);
+		return ath5k_hw_set_key(ah, k->wk_keyix+32, hk, mac, false);
 	} else if (k->wk_flags & IEEE80211_KEY_XR) {
 		/*
 		 * TX/RX key goes at first index.
@@ -1942,7 +1944,7 @@ ath_keyset_tkip(struct ath_softc *sc, const struct ieee80211_key *k,
 		memcpy(hk->wk_mic, k->wk_flags & IEEE80211_KEY_XMIT ?
 			k->wk_txmic : k->wk_rxmic, sizeof(hk->wk_mic));
 		KEYPRINTF(sc, k->wk_keyix, hk, mac);
-		return ath_hal_keyset(ah, k->wk_keyix, hk, mac);
+		return ath5k_hw_set_key(ah, k->wk_keyix, hk, mac, false);
 	}
 	return 0;
 #undef IEEE80211_KEY_XR
@@ -2007,7 +2009,7 @@ ath_keyset(struct ath_softc *sc, const struct ieee80211_key *k,
 		return ath_keyset_tkip(sc, k, &hk, mac);
 	} else {
 		KEYPRINTF(sc, k->wk_keyix, &hk, mac);
-		return ath_hal_keyset(ah, k->wk_keyix, &hk, mac);
+		return ath5k_hw_set_key(ah, k->wk_keyix, &hk, mac, false);
 	}
 #undef N
 }
@@ -2171,7 +2173,7 @@ ath_key_delete(struct ieee80211com *ic, const struct ieee80211_key *k)
 
 	DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: delete key %u\n", __func__, keyix);
 
-	ath_hal_keyreset(ah, keyix);
+	ath5k_hw_reset_key(ah, keyix);
         /*
          * Check the key->node map and flush any ref.
          */
@@ -2185,7 +2187,7 @@ ath_key_delete(struct ieee80211com *ic, const struct ieee80211_key *k)
 	 */
 	if (cip->ic_cipher == IEEE80211_CIPHER_TKIP &&
             (k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && sc->sc_splitmic) {
-		ath_hal_keyreset(ah, keyix+32);		/* RX key */
+		ath5k_hw_reset_key(ah, keyix+32);		/* RX key */
                 ni = sc->sc_keyixmap[keyix+32];
                 if (ni != NULL) {                       /* as above... */
                         ieee80211_free_node(ni);
@@ -2299,7 +2301,7 @@ ath_calcrxfilter(struct ath_softc *sc, enum ieee80211_state state)
 	struct net_device *dev = ic->ic_dev;
 	u_int32_t rfilt;
 
-	rfilt = (ath_hal_getrxfilter(ah) & AR5K_RX_FILTER_PHYERROR)
+	rfilt = (ath5k_hw_get_rx_filter(ah) & AR5K_RX_FILTER_PHYERROR)
 	      | AR5K_RX_FILTER_UCAST | AR5K_RX_FILTER_BCAST | AR5K_RX_FILTER_MCAST | AR5K_RX_FILTER_PHYRADAR;
 	if (ic->ic_opmode != IEEE80211_M_STA && 
 	    ic->ic_opmode != IEEE80211_M_AHDEMO)
@@ -2335,10 +2337,10 @@ ath_mode_init(struct net_device *dev)
 
 	/* configure rx filter */
 //	rfilt = ath_calcrxfilter(sc, ic->ic_state);
-//	ath_hal_setrxfilter(ah, rfilt);
+//	ath5k_hw_set_rx_filter(ah, rfilt);
 
 	/* configure operational mode */
-	ath_hal_setopmode(ah);
+	ath5k_hw_set_pcu_config(ah);
 
 	/*
 	 * Handle any link-level address change.  Note that we only
@@ -2349,7 +2351,7 @@ ath_mode_init(struct net_device *dev)
 	 * XXX should get from lladdr instead of arpcom but that's more work
 	 */
 //	IEEE80211_ADDR_COPY(ic->ic_myaddr, dev->dev_addr);
-	ath_hal_setmac(ah, dev->dev_addr);
+	ath5k_hw_set_lladdr(ah, dev->dev_addr);
 
 	/* calculate and install multicast filter */
 	if ((dev->flags & IFF_ALLMULTI) == 0) {
@@ -2366,7 +2368,7 @@ ath_mode_init(struct net_device *dev)
 	} else {
 		mfilt[0] = mfilt[1] = ~0;
 	}
-	ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
+	ath5k_hw_set_mcast_filter(ah, mfilt[0], mfilt[1]);
 	DPRINTF(sc, ATH_DEBUG_MODE, "%s: RX filter 0x%x, MC filter %08x:%08x\n",
 		__func__, rfilt, mfilt[0], mfilt[1]);
 }
@@ -2388,9 +2390,9 @@ ath_setslottime(struct ath_softc *sc)
 	 */
 	if (!sc->sc_lockslottime) {
 //		if (ic->ic_flags & IEEE80211_F_SHSLOT)
-//			ath_hal_setslottime(ah, AR5K_SLOT_TIME_9);
+//			ath5k_hw_set_slot_time(ah, AR5K_SLOT_TIME_9);
 //		else
-			ath_hal_setslottime(ah, AR5K_SLOT_TIME_20);
+			ath5k_hw_set_slot_time(ah, AR5K_SLOT_TIME_20);
 	}
 	sc->sc_updateslot = OK;
 }
@@ -2430,7 +2432,7 @@ ath_beaconq_setup(struct ath_hal *ah)
 	qi.tqi_cw_max = AR5K_TXQ_USEDEFAULT;
 	/* NB: for dynamic turbo, don't enable any other interrupts */
 	qi.tqi_flags = AR5K_TXQ_FLAG_TXDESCINT_ENABLE;
-	return ath_hal_setuptxqueue(ah, AR5K_TX_QUEUE_BEACON, &qi);
+	return ath5k_hw_setup_tx_queue(ah, AR5K_TX_QUEUE_BEACON, &qi);
 }
 #ifdef BLE
 /*
@@ -2444,7 +2446,7 @@ ath_beaconq_config(struct ath_softc *sc)
 	struct ath_hal *ah = sc->sc_ah;
 	struct ath5k_txq_info qi;
 
-	ath_hal_gettxqueueprops(ah, sc->sc_bhalq, &qi);
+	ath5k_hw_get_tx_queueprops(ah, sc->sc_bhalq, &qi);
 	if (sc->sc_opmode == IEEE80211_IF_TYPE_AP) {
 		/*
 		 * Always burst out beacon and CAB traffic.
@@ -2465,12 +2467,12 @@ ath_beaconq_config(struct ath_softc *sc)
 #endif
 	}
 
-	if (!ath_hal_settxqueueprops(ah, sc->sc_bhalq, &qi)) {
+	if (!ath5k_hw_setup_tx_queueprops(ah, sc->sc_bhalq, &qi)) {
 		printk("%s: unable to update parameters for "
 			"beacon hardware queue! (%s)\n", __func__, sc->sc_dev.name);
 		return 0;
 	} else {
-		ath_hal_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
+		ath5k_hw_reset_tx_queue(ah, sc->sc_bhalq); /* push to h/w */
 		return 1;
 	}
 #undef ATH_EXPONENT_TO_VALUE
@@ -2579,7 +2581,7 @@ ath_beacon_setup(struct ath_softc *sc, struct ath_buf *bf,
 		rate = an->an_tx_mgtrate;
 #endif
 	rate = 0;
-	ath_hal_setuptxdesc(ah, ds
+	ah->ah_setup_tx_desc(ah, ds
 		, skb->len + FCS_LEN		/* frame length */
 		, ieee80211_get_hdrlen_from_skb(skb)	/* header length */
 		, AR5K_PKT_TYPE_BEACON		/* Atheros packet type */
@@ -2592,7 +2594,7 @@ ath_beacon_setup(struct ath_softc *sc, struct ath_buf *bf,
 		, 0				/* rts/cts duration */
 	);
 	/* NB: beacon's BufLen must be a multiple of 4 bytes */
-	ath_hal_filltxdesc(ah, ds
+	ah->ah_fill_tx_desc(ah, ds
 		, roundup(skb->len, 4)		/* buffer length */
 		, true			/* first segment */
 		, true			/* last segment */
@@ -2636,7 +2638,7 @@ ath_beacon_send(struct net_device *dev)
 	 * indicate a problem and should not occur.  If we
 	 * miss too many consecutive beacons reset the device.
 	 */
-	if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
+	if (ath5k_hw_num_tx_pending(ah, sc->sc_bhalq) != 0) {
 		sc->sc_bmisscount++;
 		DPRINTF(sc, ATH_DEBUG_BEACON_PROC,
 			"%s: missed %u consecutive beacons\n",
@@ -2717,7 +2719,7 @@ ath_beacon_send(struct net_device *dev)
 	 * This should never fail since we check above that no frames
 	 * are still pending on the queue.
 	 */
-	if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
+	if (!ath5k_hw_stop_tx_dma(ah, sc->sc_bhalq)) {
 		DPRINTF(sc, ATH_DEBUG_ANY,
 			"%s: beacon queue %u did not stop?\n",
 			__func__, sc->sc_bhalq);
@@ -2737,10 +2739,10 @@ ath_beacon_send(struct net_device *dev)
 #ifdef BLE
 	if (sc->sc_opmode == IEEE80211_IF_TYPE_AP &&
 	    ncabq > 0 && sc->sc_boff.bo_tim[4] & 1)
-		ath_hal_txstart(ah, sc->sc_cabq->axq_qnum);
+		ath5k_hw_tx_start(ah, sc->sc_cabq->axq_qnum);
 #endif
-	ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
-	ath_hal_txstart(ah, sc->sc_bhalq);
+	ath5k_hw_put_tx_buf(ah, sc->sc_bhalq, bf->bf_daddr);
+	ath5k_hw_tx_start(ah, sc->sc_bhalq);
 	DPRINTF(sc, ATH_DEBUG_BEACON_PROC,
 		"%s: TXDP[%u] = %llx (%p)\n", __func__,
 		sc->sc_bhalq, (unsigned long long)bf->bf_daddr, bf->bf_desc);
@@ -2818,7 +2820,7 @@ ath_beacon_config(struct ath_softc *sc)
 	/* NB: the beacon interval is kept internally in TU's */
 	intval = ni->ni_intval & AR5K_BEACON_PERIOD;
 	/* current TSF converted to TU */
-	tsf = ath_hal_gettsf64(ah);
+	tsf = ath5k_hw_get_tsf64(ah);
 	tsftu = TSF_TO_TU((u_int32_t)(tsf>>32), (u_int32_t)tsf);
 	
 	DPRINTF(sc, ATH_DEBUG_BEACON, "%s: last beacon %u intval %u (%u) hw tsftu %u\n",
@@ -2917,13 +2919,13 @@ ath_beacon_config(struct ath_softc *sc)
 			, bs.bs_cfp_next
 			, bs.bs_tim_offset
 		);
-		ath_hal_intrset(ah, 0);
-		ath_hal_beacontimers(ah, &bs);
+		ath5k_hw_set_intr(ah, 0);
+		ath5k_hw_set_beacon_timers(ah, &bs);
 		sc->sc_imask |= AR5K_INT_BMISS;
 		sc->sc_bmisscount = 0;
-		ath_hal_intrset(ah, sc->sc_imask);
+		ath5k_hw_set_intr(ah, sc->sc_imask);
 	} else { /* IBSS or HOSTAP */
-		ath_hal_intrset(ah, 0);
+		ath5k_hw_set_intr(ah, 0);
 		
 		if (ic->ic_opmode == IEEE80211_M_IBSS) {
 			/*
@@ -2970,10 +2972,10 @@ ath_beacon_config(struct ath_softc *sc)
 		intval |= AR5K_BEACON_ENA;
 		
 		ath_beaconq_config(sc);
-		ath_hal_beaconinit(ah, nexttbtt, intval);
+		ath5k_hw_init_beacon(ah, nexttbtt, intval);
 		
 		sc->sc_bmisscount = 0;
-		ath_hal_intrset(ah, sc->sc_imask);
+		ath5k_hw_set_intr(ah, sc->sc_imask);
 		/*
 		 * When using a self-linked beacon descriptor in
 		 * ibss mode load it once here.
@@ -3248,10 +3250,9 @@ ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
 	ds = bf->bf_desc;
 	ds->ds_link = bf->bf_daddr;	/* link to self */
 	ds->ds_data = bf->bf_skbaddr;
-	ath_hal_setuprxdesc(ah, ds
-		, skb_tailroom(skb)	/* buffer size */
-		, 0
-	);
+	ath5k_hw_setup_rx_desc(ah, ds,
+		skb_tailroom(skb),	/* buffer size */
+		0);
 
 	if (sc->sc_rxlink != NULL)
 		*sc->sc_rxlink = bf->bf_daddr;
@@ -3322,7 +3323,7 @@ ath_tx_capture(struct net_device *dev, struct ath_desc *ds, struct sk_buff *skb)
 		 * the time the frame was received.  Use the current
 		 * tsf to extend this to 32 bits.
 		 */
-		tsf = ath_hal_gettsf32(sc->sc_ah);
+		tsf = ath5k_hw_get_tsf32(sc->sc_ah);
 		if ((tsf & 0x7fff) < ds->ds_rxstat.rs_tstamp)
 			tsf -= 0x8000;
 		ph->mactime.data = ds->ds_rxstat.rs_tstamp | (tsf &~ 0x7fff);
@@ -3478,7 +3479,7 @@ ath_rx_capture(struct net_device *dev, struct ath_desc *ds, struct sk_buff *skb)
 		 * the time the frame was received.  Use the current
 		 * tsf to extend this to 32 bits.
 		 */
-		tsf = ath_hal_gettsf32(sc->sc_ah);
+		tsf = ath5k_hw_get_tsf32(sc->sc_ah);
 		if ((tsf & 0x7fff) < ds->ds_rxstat.rs_tstamp)
 			tsf -= 0x8000;
 		ph->mactime.data = ds->ds_rxstat.rs_tstamp | (tsf &~ 0x7fff);
@@ -3574,7 +3575,7 @@ ath_tsf_extend(struct ath_hal *ah, uint32_t rstamp)
 {
 	uint64_t tsf;
 
-	tsf = ath_hal_gettsf64(ah);
+	tsf = ath5k_hw_get_tsf64(ah);
 
 	/* Compensate for rollover. */
 	if ((tsf & 0x7fff) < rstamp)
@@ -3656,7 +3657,7 @@ ath_setdefantenna(struct ath_softc *sc, u_int antenna)
 	struct ath_hal *ah = sc->sc_ah;
 
 	/* XXX block beacon interrupts */
-	ath_hal_setdefantenna(ah, antenna);
+	ath5k_hw_set_def_antenna(ah, antenna);
 	if (sc->sc_defant != antenna)
 		sc->sc_stats.ast_ant_defswitch++;
 	sc->sc_defant = antenna;
@@ -3710,7 +3711,7 @@ ath_rx_tasklet(unsigned long data)
 		 * on.  All this is necessary because of our use of
 		 * a self-linked list to avoid rx overruns.
 		 */
-		status = ath_hal_rxprocdesc(ah, ds,
+		status = ah->ah_proc_rx_desc(ah, ds,
 				bf->bf_daddr, PA2DESC(sc, ds->ds_link));
 #ifdef AR_DEBUG
 		if (sc->sc_debug & ATH_DEBUG_RECV_DESC)
@@ -3986,7 +3987,7 @@ rx_next:
 	} while (ath_rxbuf_init(sc, bf) == 0);
 
 	/* rx signal state monitoring */
-//	ath_hal_rxmonitor(ah, &ATH_NODE(ic->ic_bss)->an_halstats);
+//	ath5k_hw_set_rx_signal(ah, &ATH_NODE(ic->ic_bss)->an_halstats);
 
 #undef PA2DESC
 }
@@ -4020,7 +4021,7 @@ ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
 	 * due to a lack of tx descriptors.
 	 */
 	qi.tqi_flags = AR5K_TXQ_FLAG_TXEOLINT_ENABLE | AR5K_TXQ_FLAG_TXDESCINT_ENABLE;
-	qnum = ath_hal_setuptxqueue(ah, qtype, &qi);
+	qnum = ath5k_hw_setup_tx_queue(ah, qtype, &qi);
 	if (qnum == -1) {
 		/*
 		 * NB: don't print a message, this happens
@@ -4031,7 +4032,7 @@ ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
 	if (qnum >= N(sc->sc_txq)) {
 		printk("%s: hal qnum %u out of range, max %u!\n",
 			sc->sc_dev.name, qnum, (unsigned int) N(sc->sc_txq));
-		ath_hal_releasetxqueue(ah, qnum);
+		ath5k_hw_release_tx_queue(ah, qnum);
 		return NULL;
 	}
 	if (!ATH_TXQ_SETUP(sc, qnum)) {
@@ -4091,19 +4092,19 @@ ath_txq_update(struct ath_softc *sc, int ac)
 	struct ath_hal *ah = sc->sc_ah;
 	struct ath5k_txq_info qi;
 
-	ath_hal_gettxqueueprops(ah, txq->axq_qnum, &qi);
+	ath5k_hw_get_tx_queueprops(ah, txq->axq_qnum, &qi);
 	qi.tqi_aifs = wmep->wmep_aifsn;
 	qi.tqi_cw_min = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
 	qi.tqi_cw_max = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);	
 	qi.tqi_burst_time = ATH_TXOP_TO_US(wmep->wmep_txopLimit);
 
-	if (!ath_hal_settxqueueprops(ah, txq->axq_qnum, &qi)) {
+	if (!ath5k_hw_setup_tx_queueprops(ah, txq->axq_qnum, &qi)) {
 		if_printf(&sc->sc_dev, "unable to update hardware queue "
 			"parameters for %s traffic!\n",
 			ieee80211_wme_acnames[ac]);
 		return 0;
 	} else {
-		ath_hal_resettxqueue(ah, txq->axq_qnum); /* push to h/w */
+		ath5k_hw_reset_tx_queue(ah, txq->axq_qnum); /* push to h/w */
 		return 1;
 	}
 #undef ATH_TXOP_TO_US
@@ -4130,8 +4131,7 @@ ath_wme_update(struct ieee80211com *ic)
 static void
 ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq)
 {
-
-	ath_hal_releasetxqueue(sc->sc_ah, txq->axq_qnum);
+	ath5k_hw_release_tx_queue(sc->sc_ah, txq->axq_qnum);
 	ATH_TXQ_LOCK_DESTROY(txq);
 	sc->sc_txqsetup &= ~(1<<txq->axq_qnum);
 }
@@ -4528,7 +4528,7 @@ ath_tx_start(struct net_device *dev, struct ieee80211_node *ni, struct ath_buf *
 	 * Formulate first tx descriptor with tx controls.
 	 */
 	/* XXX check return value? */
-	ath_hal_setuptxdesc(ah, ds
+	ah->ah_setup_tx_desc(ah, ds
 		, pktlen		/* packet length */
 		, hdrlen		/* header length */
 		, atype			/* Atheros packet type */
@@ -4556,7 +4556,7 @@ ath_tx_start(struct net_device *dev, struct ieee80211_node *ni, struct ath_buf *
 	 */
 	ds->ds_link = 0;
 	ds->ds_data = bf->bf_skbaddr;
-	ath_hal_filltxdesc(ah, ds
+	ah->ah_fill_tx_desc(ah, ds
 		, skb->len		/* segment length */
 		, true		/* first segment */
 		, true		/* last segment */
@@ -4607,7 +4607,7 @@ ath_tx_start(struct net_device *dev, struct ieee80211_node *ni, struct ath_buf *
 	DPRINTF(sc, ATH_DEBUG_TX_PROC, "%s: txq depth = %d\n",
 		__func__, txq->axq_depth);
 	if (txq->axq_link == NULL) {
-		ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
+		ath5k_hw_put_tx_buf(ah, txq->axq_qnum, bf->bf_daddr);
 		DPRINTF(sc, ATH_DEBUG_XMIT,
 			"%s: TXDP[%u] = %llx (%p) depth %d\n", __func__,
 			txq->axq_qnum, (unsigned long long)bf->bf_daddr,
@@ -4626,7 +4626,7 @@ ath_tx_start(struct net_device *dev, struct ieee80211_node *ni, struct ath_buf *
 	 * frames only go out on DTIM and to avoid possible races.
 	 */
 	if (txq != sc->sc_cabq)
-		ath_hal_txstart(ah, txq->axq_qnum);
+		ath5k_hw_tx_start(ah, txq->axq_qnum);
 	ATH_TXQ_UNLOCK_BH(txq);
 
 	dev->trans_start = jiffies;
@@ -4650,10 +4650,9 @@ ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
 //	int sr, lr, pri;
 	enum ath5k_status status;
 
-	DPRINTF(sc, ATH_DEBUG_TX_PROC, "%s: tx queue %u head %p link %p\n",
+	DPRINTF(sc, ATH_DEBUG_TX_PROC, "%s: tx queue %u head %x link %p\n",
 		__func__, txq->axq_qnum,
-		(caddr_t)ath_hal_gettxbuf(sc->sc_ah, txq->axq_qnum),
-		txq->axq_link);
+		ath5k_hw_get_tx_buf(sc->sc_ah, txq->axq_qnum), txq->axq_link);
 	for (;;) {
 		ATH_TXQ_LOCK(txq);
 		txq->axq_intrcnt = 0;	/* reset periodic desc intr count */
@@ -4664,7 +4663,7 @@ ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
 			break;
 		}
 		ds = bf->bf_desc;		/* NB: last decriptor */
-		status = ath_hal_txprocdesc(ah, ds);
+		status = ah->ah_proc_tx_desc(ah, ds);
 #ifdef AR_DEBUG
 		if (sc->sc_debug & ATH_DEBUG_XMIT_DESC)
 			ath_printtxbuf(bf, status == AR5K_OK);
@@ -4882,8 +4881,8 @@ ath_tx_draintxq(struct ath_softc *sc, struct ath_txq *txq)
 		ATH_TXQ_UNLOCK_BH(txq);
 #ifdef AR_DEBUG
 		if (sc->sc_debug & ATH_DEBUG_RESET)
-			ath_printtxbuf(bf,
-				ath_hal_txprocdesc(ah, bf->bf_desc) == AR5K_OK);
+			ath_printtxbuf(bf, ah->ah_proc_tx_desc(ah,
+						bf->bf_desc) == AR5K_OK);
 #endif /* AR_DEBUG */
 		bus_unmap_single(sc->sc_bdev,
 			bf->bf_skbaddr, bf->bf_skb->len, BUS_DMA_TODEVICE);
@@ -4910,10 +4909,10 @@ ath_tx_stopdma(struct ath_softc *sc, struct ath_txq *txq)
 {
 	struct ath_hal *ah = sc->sc_ah;
 
-	(void) ath_hal_stoptxdma(ah, txq->axq_qnum);
-	DPRINTF(sc, ATH_DEBUG_RESET, "%s: tx queue [%u] %p, link %p\n",
-	    __func__, txq->axq_qnum,
-	    (caddr_t)ath_hal_gettxbuf(ah, txq->axq_qnum), txq->axq_link);
+	ath5k_hw_stop_tx_dma(ah, txq->axq_qnum);
+	DPRINTF(sc, ATH_DEBUG_RESET, "%s: tx queue [%u] %x, link %p\n",
+		__func__, txq->axq_qnum,
+		ath5k_hw_get_tx_buf(ah, txq->axq_qnum), txq->axq_link);
 }
 
 /*
@@ -4928,10 +4927,9 @@ ath_draintxq(struct ath_softc *sc)
 	/* XXX return value */
 	if (!sc->sc_invalid) {
 		/* don't touch the hardware if marked invalid */
-		(void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
-		DPRINTF(sc, ATH_DEBUG_RESET,
-		    "%s: beacon queue %p\n", __func__,
-		    (caddr_t)ath_hal_gettxbuf(ah, sc->sc_bhalq));
+		(void) ath5k_hw_stop_tx_dma(ah, sc->sc_bhalq);
+		DPRINTF(sc, ATH_DEBUG_RESET, "%s: beacon queue %x\n", __func__,
+			ath5k_hw_get_tx_buf(ah, sc->sc_bhalq));
 		for (i = 0; i < AR5K_NUM_TX_QUEUES; i++) {
 			if (ATH_TXQ_SETUP(sc, i))
 				ath_tx_stopdma(sc, &sc->sc_txq[i]);
@@ -4962,20 +4960,20 @@ ath_stoprecv(struct ath_softc *sc)
 		((_pa) - (_sc)->sc_desc_daddr)))
 	struct ath_hal *ah = sc->sc_ah;
 
-	ath_hal_stoppcurecv(ah);	/* disable PCU */
-	ath_hal_setrxfilter(ah, 0);	/* clear recv filter */
-	ath_hal_stopdmarecv(ah);	/* disable DMA engine */
+	ath5k_hw_stop_pcu_recv(ah);	/* disable PCU */
+	ath5k_hw_set_rx_filter(ah, 0);	/* clear recv filter */
+	ath5k_hw_stop_rx_dma(ah);	/* disable DMA engine */
 	mdelay(3);			/* 3ms is long enough for 1 frame */
 #ifdef AR_DEBUG
 	if (sc->sc_debug & (ATH_DEBUG_RESET | ATH_DEBUG_FATAL)) {	// TODO: compiler warns integer overflow
 //		struct ath_buf *bf;
 
-		printk("%s: rx queue %p, link %p\n", __func__,
-			(caddr_t)ath_hal_getrxbuf(ah), sc->sc_rxlink);
+		printk("%s: rx queue %x, link %p\n", __func__,
+			ath5k_hw_get_rx_buf(ah), sc->sc_rxlink);
 #ifdef BLE
 		STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
 			struct ath_desc *ds = bf->bf_desc;
-			enum ath5k_status status = ath_hal_rxprocdesc(ah, ds,
+			enum ath5k_status status = ah->ah_proc_rx_desc(ah, ds,
 				bf->bf_daddr, PA2DESC(sc, ds->ds_link));
 			if (status == AR5K_OK || (sc->sc_debug & ATH_DEBUG_FATAL))
 				ath_printrxbuf(bf, status == AR5K_OK);
@@ -5035,10 +5033,10 @@ ath_startrecv(struct ath_softc *sc)
 	bf = STAILQ_FIRST(&sc->sc_rxbuf);
 #endif
 	bf = NULL;
-	ath_hal_putrxbuf(ah, bf->bf_daddr);
-	ath_hal_rxena(ah);		/* enable recv descriptors */
+	ath5k_hw_put_rx_buf(ah, bf->bf_daddr);
+	ath5k_hw_start_rx(ah);		/* enable recv descriptors */
 //	ath_mode_init(dev);		/* set filters, etc. */
-	ath_hal_startpcurecv(ah);	/* re-enable PCU/DMA engine */
+	ath5k_hw_start_rx_pcu(ah);	/* re-enable PCU/DMA engine */
 	return 0;
 }
 
@@ -5116,10 +5114,10 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
 		 * hardware at the new frequency, and then re-enable
 		 * the relevant bits of the h/w.
 		 */
-		ath_hal_intrset(ah, 0);		/* disable interrupts */
+		ath5k_hw_set_intr(ah, 0);		/* disable interrupts */
 		ath_draintxq(sc);		/* clear pending tx frames */
 		ath_stoprecv(sc);		/* turn off frame recv */
-		if (!ath_hal_reset(ah, sc->sc_opmode, &hchan, true, &status)) {
+		if (!ath5k_hw_reset(ah, sc->sc_opmode, &hchan, true, &status)) {
 			printk(KERN_ERR "ath_chan_set: unable to reset "
 				"channel %u (%u Mhz)\n", 0,
 //				ieee80211_chan2ieee(ic, chan),
@@ -5149,7 +5147,7 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
 		/*
 		 * Re-enable interrupts.
 		 */
-		ath_hal_intrset(ah, sc->sc_imask);
+		ath5k_hw_set_intr(ah, sc->sc_imask);
 	}
 	return 0;
 }
@@ -5182,17 +5180,17 @@ ath_calibrate(unsigned long arg)
 	DPRINTF(sc, ATH_DEBUG_CALIBRATE, "%s: channel %u/%x\n",
 		__func__, sc->sc_curchan.freq, sc->sc_curchan.channel_flags);
 
-	if (ath_hal_getrfgain(ah) == AR5K_RFGAIN_NEED_CHANGE) {
+	if (ath5k_hw_get_rf_gain(ah) == AR5K_RFGAIN_NEED_CHANGE) {
 		/*
 		 * Rfgain is out of bounds, reset the chip
 		 * to load new gain values.
 		 */
 		sc->sc_stats.ast_per_rfgain++;
-		DPRINTF(sc, ATH_DEBUG_RESET,
-			"%s: calibration, resetting\n", dev->name);
+		DPRINTF(sc, ATH_DEBUG_RESET, "%s: calibration, resetting\n",
+				dev->name);
 		ath_reset(dev);
 	}
-	if (!ath_hal_calibrate(ah, &sc->sc_curchan)) {
+	if (!ath5k_hw_phy_calibrate(ah, &sc->sc_curchan)) {
 		DPRINTF(sc, ATH_DEBUG_ANY,
 			"%s: calibration of channel %u failed\n",
 			__func__, sc->sc_curchan.freq);
@@ -5226,7 +5224,7 @@ ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 
 	del_timer(&sc->sc_scan_ch);		/* ap/neighbor scan timer */
 	del_timer(&sc->sc_cal_ch);		/* periodic calibration timer */
-	ath_hal_setledstate(ah, leds[nstate]);	/* set LED */
+	ath5k_hw_set_ledstate(ah, leds[nstate]);	/* set LED */
 	netif_stop_queue(dev);			/* before we do anything else */
 	if (sc->sc_rawdev_enabled)
 		netif_stop_queue(&sc->sc_rawdev);
@@ -5236,7 +5234,7 @@ ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 		/*
 		 * NB: disable interrupts so we don't rx frames.
 		 */
-    		ath_hal_intrset(ah, sc->sc_imask &~ AR5K_INT_GLOBAL);
+    		ath5k_hw_set_intr(ah, sc->sc_imask &~ AR5K_INT_GLOBAL);
 		/*
 		 * Notify the rate control algorithm.
 		 */
@@ -5252,18 +5250,18 @@ ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 		bssid = dev->broadcast;
 	else
 		bssid = ni->ni_bssid;
-	ath_hal_setrxfilter(ah, rfilt);
+	ath5k_hw_set_rx_filter(ah, rfilt);
 	DPRINTF(sc, ATH_DEBUG_STATE, "%s: RX filter 0x%x bssid %s\n",
 		 __func__, rfilt, ether_sprintf(bssid));
 
 	if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA)
-		ath_hal_setassocid(ah, bssid, ni->ni_associd);
+		ath5k_hw_set_associd(ah, bssid, ni->ni_associd);
 	else
-		ath_hal_setassocid(ah, bssid, 0);
+		ath5k_hw_set_associd(ah, bssid, 0);
 	if (ic->ic_flags & IEEE80211_F_PRIVACY) {
 		for (i = 0; i < IEEE80211_WEP_NKID; i++)
-			if (ath_hal_keyisvalid(ah, i))
-				ath_hal_keysetmac(ah, i, bssid);
+			if (ath5k_hw_is_key_valid(ah, i))
+				ath5k_hw_set_key_lladdr(ah, i, bssid);
 	}
 
 	/*
@@ -5300,7 +5298,7 @@ ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 			 * transition from RUN->RUN that means we may
 			 * be called with beacon transmission active.
 			 */
-			ath_hal_stoptxdma(ah, sc->sc_bhalq);
+			ath5k_hw_stop_tx_dma(ah, sc->sc_bhalq);
 			ath_beacon_free(sc);
 			error = ath_beacon_alloc(sc, ni);
 			if (error != 0)
@@ -5324,7 +5322,7 @@ ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 		 */
 		ath_beacon_config(sc);
 	} else {
-		ath_hal_intrset(ah,
+		ath5k_hw_set_intr(ah,
 			sc->sc_imask &~ (AR5K_INT_SWBA | AR5K_INT_BMISS));
 		sc->sc_imask &= ~(AR5K_INT_SWBA | AR5K_INT_BMISS);
 	}
@@ -5470,7 +5468,7 @@ ath_led_off(unsigned long arg)
             /* part of ath_led_done() */
             sc->sc_blinking = 0;
         } else{
-            ath_hal_gpioset(sc->sc_ah, sc->sc_ledpin, !sc->sc_ledon);
+            ath5k_hw_set_gpio(sc->sc_ah, sc->sc_ledpin, !sc->sc_ledon);
             sc->sc_endblink = 1;
             mod_timer(&sc->sc_ledtimer, jiffies + sc->sc_ledoff);
         }
@@ -5483,7 +5481,7 @@ static void
 ath_led_blink(struct ath_softc *sc, int on, int off)
 {
 	DPRINTF(sc, ATH_DEBUG_LED, "%s: on %u off %u\n", __func__, on, off);
-	ath_hal_gpioset(sc->sc_ah, sc->sc_ledpin, sc->sc_ledon);
+	ath5k_hw_set_gpio(sc->sc_ah, sc->sc_ledpin, sc->sc_ledon);
 	sc->sc_blinking = 1;
 	sc->sc_endblink = 0;
 	sc->sc_ledoff = off;
@@ -5521,7 +5519,7 @@ ath_update_txpow(struct ath_softc *sc)
 	u_int32_t txpow;
 
 	if (sc->sc_curtxpow != ic->ic_txpowlimit) {
-		ath_hal_settxpowlimit(ah, ic->ic_txpowlimit);
+		ath5k_hw_set_txpower_limit(ah, ic->ic_txpowlimit);
 		/* read back in case value is clamped */
 		(void)ath_hal_gettxpowlimit(ah, &txpow);
 		ic->ic_txpowlimit = sc->sc_curtxpow = txpow;
@@ -5545,19 +5543,19 @@ ath_rate_setup(struct net_device *dev, u_int mode)
 
 	switch (mode) {
 	case MODE_IEEE80211A:
-		sc->sc_rates[mode] = ath_hal_getratetable(ah, AR5K_MODE_11A);
+		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_11A);
 		break;
 	case MODE_IEEE80211B:
-		sc->sc_rates[mode] = ath_hal_getratetable(ah, AR5K_MODE_11B);
+		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_11B);
 		break;
 	case MODE_IEEE80211G:
-		sc->sc_rates[mode] = ath_hal_getratetable(ah, AR5K_MODE_11G);
+		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_11G);
 		break;
 	case MODE_ATHEROS_TURBO:
-		sc->sc_rates[mode] = ath_hal_getratetable(ah, AR5K_MODE_TURBO);
+		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_TURBO);
 		break;
 	case MODE_ATHEROS_TURBOG:
-		sc->sc_rates[mode] = ath_hal_getratetable(ah, AR5K_MODE_108G);
+		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_108G);
 		break;
 	default:
 		DPRINTF(sc, ATH_DEBUG_ANY, "%s: invalid mode %u\n",
@@ -6025,7 +6023,7 @@ ath_set_mac_address(struct net_device *dev, void *addr)
 	/* XXX not right for multiple vap's */
 //	IEEE80211_ADDR_COPY(ic->ic_myaddr, mac->sa_data);
 	memcpy(dev->dev_addr, mac->sa_data, ETH_ALEN);
-	ath_hal_setmac(ah, dev->dev_addr);
+	ath5k_hw_set_lladdr(ah, dev->dev_addr);
 	if ((dev->flags & IFF_RUNNING) && !sc->sc_invalid) {
 		error = -ath_reset(dev);
 	}
@@ -6105,7 +6103,7 @@ ath_ioctl_diag(struct ath_softc *sc, struct ath_diag *ad)
 			goto bad;
 		}
 	}
-	if (ath_hal_getdiagstate(ah, id, indata, insize, &outdata, &outsize)) {
+	if (ath5k_hw_get_diag_state(ah, id, indata, insize, &outdata,&outsize)){
 		if (outsize < ad->ad_out_size)
 			ad->ad_out_size = outsize;
 		if (outdata &&
@@ -6267,26 +6265,27 @@ ath_sysctl_halparam(ctl_table *ctl, int write, struct file *filp,
 		if (ret == 0) {
 			switch (ctl->ctl_name) {
 			case ATH_SLOTTIME:
-				if (!ath_hal_setslottime(ah, val))
+				if (!ath5k_hw_set_slot_time(ah, val))
 					ret = -EINVAL;
 				break;
 			case ATH_LOCKSLOTTIME:
 				sc->sc_lockslottime = val != 0;
 				break;
 			case ATH_ACKTIMEOUT:
-				if (!ath_hal_setacktimeout(ah, val))
+				if (!ath5k_hw_set_ack_timeout(ah, val))
 					ret = -EINVAL;
 				break;
 			case ATH_CTSTIMEOUT:
-				if (!ath_hal_setctstimeout(ah, val))
+				if (!ath5k_hw_set_cts_timeout(ah, val))
 					ret = -EINVAL;
 				break;
 			case ATH_SOFTLED:
 				if (val != sc->sc_softled) {
 					if (val)
-						ath_hal_gpioCfgOutput(ah,
+						ath5k_hw_set_gpio_output(ah,
 							sc->sc_ledpin);
-					ath_hal_gpioset(ah, sc->sc_ledpin,!val);
+					ath5k_hw_set_gpio(ah, sc->sc_ledpin,
+							!val);
 					sc->sc_softled = val;
 				}
 				break;
@@ -6377,16 +6376,16 @@ ath_sysctl_halparam(ctl_table *ctl, int write, struct file *filp,
 	} else {
 		switch (ctl->ctl_name) {
 		case ATH_SLOTTIME:
-			val = ath_hal_getslottime(ah);
+			val = ath5k_hw_get_slot_time(ah);
 			break;
 		case ATH_LOCKSLOTTIME:
 			val = sc->sc_lockslottime;
 			break;
 		case ATH_ACKTIMEOUT:
-			val = ath_hal_getacktimeout(ah);
+			val = ath5k_hw_get_ack_timeout(ah);
 			break;
 		case ATH_CTSTIMEOUT:
-			val = ath_hal_getctstimeout(ah);
+			val = ath5k_hw_get_cts_timeout(ah);
 			break;
 		case ATH_SOFTLED:
 			val = sc->sc_softled;
@@ -6395,7 +6394,7 @@ ath_sysctl_halparam(ctl_table *ctl, int write, struct file *filp,
 			val = sc->sc_ledpin;
 			break;
 		case ATH_COUNTRYCODE:
-			ath_hal_getcountrycode(ah, &val);
+			val = ah->ah_country_code; /* XXX */
 			break;
 		case ATH_REGDOMAIN:
 			ath_hal_getregdomain(ah, &val);
@@ -6407,7 +6406,7 @@ ath_sysctl_halparam(ctl_table *ctl, int write, struct file *filp,
 			val = sc->sc_txantenna;
 			break;
 		case ATH_RXANTENNA:
-			val = ath_hal_getdefantenna(ah);
+			val = ath5k_hw_get_def_antenna(ah);
 			break;
 		case ATH_DIVERSITY:
 			val = sc->sc_diversity;
@@ -6661,7 +6660,7 @@ ath_announce(struct ath_softc *sc)
 	 * to avoid falsely printing revs for inoperable parts.
 	 * Dual-band radio revs are returned in the 5Ghz rev number.
 	 */
-	ath_hal_getcountrycode(ah, &cc);
+	cc = ah->ah_country_code;
 	modes = ath_hal_getwirelessmodes(ah, cc);
 	if ((modes & AR5K_MODE_DUALBAND) == AR5K_MODE_DUALBAND) {
 		if (ah->ah_radio_5ghz_revision && ah->ah_radio_2ghz_revision)
diff --git a/ath/if_athvar.h b/ath/if_athvar.h
index 0df6d40..0d3f1d2 100644
--- a/ath/if_athvar.h
+++ b/ath/if_athvar.h
@@ -343,211 +343,57 @@ int ath_ioctl_ethtool(struct ath_softc *, int, void __user *);
 void	ath_sysctl_register(void);
 void	ath_sysctl_unregister(void);
 
-/*
- * HAL definitions to comply with local coding convention.
- */
-#define	ath_hal_reset(_ah, _opmode, _chan, _outdoor, _pstatus) \
-	((*(_ah)->ah_reset)((_ah), (_opmode), (_chan), (_outdoor), (_pstatus)))
-#define	ath_hal_getratetable(_ah, _mode) \
-	((*(_ah)->ah_getRateTable)((_ah), (_mode)))
-#define	ath_hal_getmac(_ah, _mac) \
-	((*(_ah)->ah_getMacAddress)((_ah), (_mac)))
-#define	ath_hal_setmac(_ah, _mac) \
-	((*(_ah)->ah_setMacAddress)((_ah), (_mac)))
-#define	ath_hal_intrset(_ah, _mask) \
-	((*(_ah)->ah_setInterrupts)((_ah), (_mask)))
-#define	ath_hal_intrget(_ah) \
-	((*(_ah)->ah_getInterrupts)((_ah)))
-#define	ath_hal_intrpend(_ah) \
-	((*(_ah)->ah_isInterruptPending)((_ah)))
-#define	ath_hal_getisr(_ah, _pmask) \
-	((*(_ah)->ah_getPendingInterrupts)((_ah), (_pmask)))
-#define	ath_hal_updatetxtriglevel(_ah, _inc) \
-	((*(_ah)->ah_updateTxTrigLevel)((_ah), (_inc)))
-#define	ath_hal_setpower(_ah, _mode, _sleepduration) \
-	((*(_ah)->ah_setPowerMode)((_ah), (_mode), true, (_sleepduration)))
-#define	ath_hal_keycachesize(_ah) \
-	((*(_ah)->ah_getKeyCacheSize)((_ah)))
-#define	ath_hal_keyreset(_ah, _ix) \
-	((*(_ah)->ah_resetKeyCacheEntry)((_ah), (_ix)))
-#define	ath_hal_keyset(_ah, _ix, _pk, _mac) \
-	((*(_ah)->ah_setKeyCacheEntry)((_ah), (_ix), (_pk), (_mac), FALSE))
-#define	ath_hal_keyisvalid(_ah, _ix) \
-	(((*(_ah)->ah_isKeyCacheEntryValid)((_ah), (_ix))))
-#define	ath_hal_keysetmac(_ah, _ix, _mac) \
-	((*(_ah)->ah_setKeyCacheEntryMac)((_ah), (_ix), (_mac)))
-#define	ath_hal_getrxfilter(_ah) \
-	((*(_ah)->ah_getRxFilter)((_ah)))
-#define	ath_hal_setrxfilter(_ah, _filter) \
-	((*(_ah)->ah_setRxFilter)((_ah), (_filter)))
-#define	ath_hal_setmcastfilter(_ah, _mfilt0, _mfilt1) \
-	((*(_ah)->ah_setMulticastFilter)((_ah), (_mfilt0), (_mfilt1)))
-#define	ath_hal_waitforbeacon(_ah, _bf) \
-	((*(_ah)->ah_waitForBeaconDone)((_ah), (_bf)->bf_daddr))
-#define	ath_hal_putrxbuf(_ah, _bufaddr) \
-	((*(_ah)->ah_setRxDP)((_ah), (_bufaddr)))
-#define	ath_hal_gettsf32(_ah) \
-	((*(_ah)->ah_getTsf32)((_ah)))
-#define	ath_hal_gettsf64(_ah) \
-	((*(_ah)->ah_getTsf64)((_ah)))
-#define	ath_hal_resettsf(_ah) \
-	((*(_ah)->ah_resetTsf)((_ah)))
-#define	ath_hal_rxena(_ah) \
-	((*(_ah)->ah_enableReceive)((_ah)))
-#define	ath_hal_puttxbuf(_ah, _q, _bufaddr) \
-	((*(_ah)->ah_setTxDP)((_ah), (_q), (_bufaddr)))
-#define	ath_hal_gettxbuf(_ah, _q) \
-	((*(_ah)->ah_getTxDP)((_ah), (_q)))
-#define	ath_hal_numtxpending(_ah, _q) \
-	((*(_ah)->ah_numTxPending)((_ah), (_q)))
-#define	ath_hal_getrxbuf(_ah) \
-	((*(_ah)->ah_getRxDP)((_ah)))
-#define	ath_hal_txstart(_ah, _q) \
-	((*(_ah)->ah_startTxDma)((_ah), (_q)))
-#define	ath_hal_setchannel(_ah, _chan) \
-	((*(_ah)->ah_setChannel)((_ah), (_chan)))
-#define	ath_hal_calibrate(_ah, _chan) \
-	((*(_ah)->ah_perCalibration)((_ah), (_chan)))
-#define	ath_hal_setledstate(_ah, _state) \
-	((*(_ah)->ah_setLedState)((_ah), (_state)))
-#define	ath_hal_beaconinit(_ah, _nextb, _bperiod) \
-	((*(_ah)->ah_beaconInit)((_ah), (_nextb), (_bperiod)))
-#define	ath_hal_beaconreset(_ah) \
-	((*(_ah)->ah_resetStationBeaconTimers)((_ah)))
-#define	ath_hal_beacontimers(_ah, _bs) \
-	((*(_ah)->ah_setStationBeaconTimers)((_ah), (_bs)))
-#define	ath_hal_setassocid(_ah, _bss, _associd) \
-	((*(_ah)->ah_writeAssocid)((_ah), (_bss), (_associd)))
-#define	ath_hal_phydisable(_ah) \
-	((*(_ah)->ah_phyDisable)((_ah)))
-#define	ath_hal_setopmode(_ah) \
-	((*(_ah)->ah_setPCUConfig)((_ah)))
-#define	ath_hal_stoptxdma(_ah, _qnum) \
-	((*(_ah)->ah_stopTxDma)((_ah), (_qnum)))
-#define	ath_hal_stoppcurecv(_ah) \
-	((*(_ah)->ah_stopPcuReceive)((_ah)))
-#define	ath_hal_startpcurecv(_ah) \
-	((*(_ah)->ah_startPcuReceive)((_ah)))
-#define	ath_hal_stopdmarecv(_ah) \
-	((*(_ah)->ah_stopDmaReceive)((_ah)))
-#define	ath_hal_getdiagstate(_ah, _id, _indata, _insize, _outdata, _outsize) \
-	((*(_ah)->ah_getDiagState)((_ah), (_id), \
-		(_indata), (_insize), (_outdata), (_outsize)))
-#define	ath_hal_setuptxqueue(_ah, _type, _irq) \
-	((*(_ah)->ah_setupTxQueue)((_ah), (_type), (_irq)))
-#define	ath_hal_resettxqueue(_ah, _q) \
-	((*(_ah)->ah_resetTxQueue)((_ah), (_q)))
-#define	ath_hal_releasetxqueue(_ah, _q) \
-	((*(_ah)->ah_releaseTxQueue)((_ah), (_q)))
-#define	ath_hal_gettxqueueprops(_ah, _q, _qi) \
-	((*(_ah)->ah_getTxQueueProps)((_ah), (_q), (_qi)))
-#define	ath_hal_settxqueueprops(_ah, _q, _qi) \
-	((*(_ah)->ah_setTxQueueProps)((_ah), (_q), (_qi)))
-#define	ath_hal_getrfgain(_ah) \
-	((*(_ah)->ah_getRfGain)((_ah)))
-#define	ath_hal_getdefantenna(_ah) \
-	((*(_ah)->ah_getDefAntenna)((_ah)))
-#define	ath_hal_setdefantenna(_ah, _ant) \
-	((*(_ah)->ah_setDefAntenna)((_ah), (_ant)))
-#define	ath_hal_rxmonitor(_ah, _arg) \
-	((*(_ah)->ah_rxMonitor)((_ah), (_arg)))
-#define	ath_hal_mibevent(_ah, _stats) \
-	((*(_ah)->ah_procMibEvent)((_ah), (_stats)))
-#define	ath_hal_setslottime(_ah, _us) \
-	((*(_ah)->ah_setSlotTime)((_ah), (_us)))
-#define	ath_hal_getslottime(_ah) \
-	((*(_ah)->ah_getSlotTime)((_ah)))
-#define	ath_hal_setacktimeout(_ah, _us) \
-	((*(_ah)->ah_setAckTimeout)((_ah), (_us)))
-#define	ath_hal_getacktimeout(_ah) \
-	((*(_ah)->ah_getAckTimeout)((_ah)))
-#define	ath_hal_setctstimeout(_ah, _us) \
-	((*(_ah)->ah_setCTSTimeout)((_ah), (_us)))
-#define	ath_hal_getctstimeout(_ah) \
-	((*(_ah)->ah_getCTSTimeout)((_ah)))
-#define	ath_hal_getcapability(_ah, _cap, _param, _result) \
-	((*(_ah)->ah_getCapability)((_ah), (_cap), (_param), (_result)))
-#define	ath_hal_setcapability(_ah, _cap, _param, _v, _status) \
-	((*(_ah)->ah_setCapability)((_ah), (_cap), (_param), (_v), (_status)))
 #define	ath_hal_ciphersupported(_ah, _cipher) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_CIPHER, _cipher, NULL) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_CIPHER, _cipher, NULL) == AR5K_OK)
 #define	ath_hal_getregdomain(_ah, _prd) \
-	ath_hal_getcapability(_ah, AR5K_CAP_REG_DMN, 0, (_prd))
+	ath5k_hw_get_capability(_ah, AR5K_CAP_REG_DMN, 0, (_prd))
 #define	ath_hal_getcountrycode(_ah, _pcc) \
 	(*(_pcc) = (_ah)->ah_country_code)
 #define	ath_hal_tkipsplit(_ah) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_TKIP_SPLIT, 0, NULL) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_TKIP_SPLIT, 0, NULL) == AR5K_OK)
 #define	ath_hal_hwphycounters(_ah) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_PHYCOUNTERS, 0, NULL) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_PHYCOUNTERS, 0, NULL) == AR5K_OK)
 #define	ath_hal_hasdiversity(_ah) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_DIVERSITY, 0, NULL) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_DIVERSITY, 0, NULL) == AR5K_OK)
 #define	ath_hal_getdiversity(_ah) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_DIVERSITY, 1, NULL) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_DIVERSITY, 1, NULL) == AR5K_OK)
 #define	ath_hal_setdiversity(_ah, _v) \
-	ath_hal_setcapability(_ah, AR5K_CAP_DIVERSITY, 1, _v, NULL)
+	ath5k_hw_set_capability(_ah, AR5K_CAP_DIVERSITY, 1, _v, NULL)
 #define	ath_hal_getdiag(_ah, _pv) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_DIAG, 0, _pv) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_DIAG, 0, _pv) == AR5K_OK)
 #define	ath_hal_setdiag(_ah, _v) \
-	ath_hal_setcapability(_ah, AR5K_CAP_DIAG, 0, _v, NULL)
+	ath5k_hw_set_capability(_ah, AR5K_CAP_DIAG, 0, _v, NULL)
 #define	ath_hal_getnumtxqueues(_ah, _pv) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_NUM_TXQUEUES, 0, _pv) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_NUM_TXQUEUES, 0, _pv) == AR5K_OK)
 #define	ath_hal_hasveol(_ah) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_VEOL, 0, NULL) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == AR5K_OK)
 #define	ath_hal_hastxpowlimit(_ah) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_TXPOW, 0, NULL) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_TXPOW, 0, NULL) == AR5K_OK)
 #define	ath_hal_settxpowlimit(_ah, _pow) \
 	((*(_ah)->ah_setTxPowerLimit)((_ah), (_pow)))
 #define	ath_hal_gettxpowlimit(_ah, _ppow) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_TXPOW, 1, _ppow) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_TXPOW, 1, _ppow) == AR5K_OK)
 #define	ath_hal_getmaxtxpow(_ah, _ppow) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_TXPOW, 2, _ppow) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_TXPOW, 2, _ppow) == AR5K_OK)
 #define	ath_hal_gettpscale(_ah, _scale) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_TXPOW, 3, _scale) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_TXPOW, 3, _scale) == AR5K_OK)
 #define	ath_hal_settpscale(_ah, _v) \
-	ath_hal_setcapability(_ah, AR5K_CAP_TXPOW, 3, _v, NULL)
+	ath5k_hw_set_capability(_ah, AR5K_CAP_TXPOW, 3, _v, NULL)
 #define	ath_hal_hastpc(_ah) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_TPC, 0, NULL) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_TPC, 0, NULL) == AR5K_OK)
 #define	ath_hal_gettpc(_ah) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_TPC, 1, NULL) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_TPC, 1, NULL) == AR5K_OK)
 #define	ath_hal_settpc(_ah, _v) \
-	ath_hal_setcapability(_ah, AR5K_CAP_TPC, 1, _v, NULL)
+	ath5k_hw_set_capability(_ah, AR5K_CAP_TPC, 1, _v, NULL)
 #define	ath_hal_hasbursting(_ah) \
-	(ath_hal_getcapability(_ah, AR5K_CAP_BURST, 0, NULL) == AR5K_OK)
+	(ath5k_hw_get_capability(_ah, AR5K_CAP_BURST, 0, NULL) == AR5K_OK)
 #ifdef notyet
 #define ath_hal_hasmcastkeysearch(_ah) \
-        (ath_hal_getcapability(_ah, AR5K_CAP_MCAST_KEYSRCH, 0, NULL) == AR5K_OK)
+        (ath5k_hw_get_capability(_ah, AR5K_CAP_MCAST_KEYSRCH, 0, NULL) == AR5K_OK)
 #define ath_hal_getmcastkeysearch(_ah) \
-        (ath_hal_getcapability(_ah, AR5K_CAP_MCAST_KEYSRCH, 1, NULL) == AR5K_OK)
+        (ath5k_hw_get_capability(_ah, AR5K_CAP_MCAST_KEYSRCH, 1, NULL) == AR5K_OK)
 #else
 #define ath_hal_getmcastkeysearch(_ah)  0
 #endif
 
-#define	ath_hal_setuprxdesc(_ah, _ds, _size, _intreq) \
-	((*(_ah)->ah_setupRxDesc)((_ah), (_ds), (_size), (_intreq)))
-#define	ath_hal_rxprocdesc(_ah, _ds, _dspa, _dsnext) \
-	((*(_ah)->ah_procRxDesc)((_ah), (_ds), (_dspa), (_dsnext)))
-#define	ath_hal_setuptxdesc(_ah, _ds, _plen, _hlen, _atype, _txpow, \
-		_txr0, _txtr0, _keyix, _ant, _flags, \
-		_rtsrate, _rtsdura) \
-	((*(_ah)->ah_setupTxDesc)((_ah), (_ds), (_plen), (_hlen), (_atype), \
-		(_txpow), (_txr0), (_txtr0), (_keyix), (_ant), \
-		(_flags), (_rtsrate), (_rtsdura)))
-#define	ath_hal_setupxtxdesc(_ah, _ds, \
-		_txr1, _txtr1, _txr2, _txtr2, _txr3, _txtr3) \
-	((*(_ah)->ah_setupXTxDesc)((_ah), (_ds), \
-		(_txr1), (_txtr1), (_txr2), (_txtr2), (_txr3), (_txtr3)))
-#define	ath_hal_filltxdesc(_ah, _ds, _l, _first, _last, _ds0) \
-	((*(_ah)->ah_fillTxDesc)((_ah), (_ds), (_l), (_first), (_last), (_ds0)))
-#define	ath_hal_txprocdesc(_ah, _ds) \
-	((*(_ah)->ah_procTxDesc)((_ah), (_ds)))
-#define	ath_hal_updateCTSForBursting(_ah, _ds, _prevds, _prevdsWithCTS, \
-		_gatingds,  _txOpLimit, _ctsDuration) \
-	((*(_ah)->ah_updateCTSForBursting)((_ah), (_ds), (_prevds), \
-		(_prevdsWithCTS), (_gatingds), (_txOpLimit), (_ctsDuration)))
-
-#define ath_hal_gpioCfgOutput(_ah, _gpio) \
-        ((*(_ah)->ah_gpioCfgOutput)((_ah), (_gpio)))
-#define ath_hal_gpioset(_ah, _gpio, _b) \
-        ((*(_ah)->ah_gpioSet)((_ah), (_gpio), (_b)))
-
 #endif /* _DEV_ATH_ATHVAR_H */
diff --git a/openhal/ath5k.h b/openhal/ath5k.h
index 4fc5efa..3bf9636 100644
--- a/openhal/ath5k.h
+++ b/openhal/ath5k.h
@@ -46,7 +46,6 @@
 
 #include "ath5k_hw.h"
 #include "ieee80211_regdomain.h"
-#include "translation.h"
 
 /* PCI IDs */
 #define PCI_DEVICE_ID_ATHEROS_AR5210 		0x0007 /* AR5210 */
@@ -242,7 +241,7 @@ struct ath_tx_status {
 	u16	ts_tstamp;
 	u8	ts_status;
 	u8	ts_rate;
-	int8_t		ts_rssi;
+	s8	ts_rssi;
 	u8	ts_shortretry;
 	u8	ts_longretry;
 	u8	ts_virtcol;
@@ -463,7 +462,7 @@ struct ath_rx_status {
 	u16	rs_tstamp;
 	u8	rs_status;
 	u8	rs_phyerr;
-	int8_t		rs_rssi;
+	s8	rs_rssi;
 	u8	rs_keyix;
 	u8	rs_rate;
 	u8	rs_antenna;
@@ -957,144 +956,6 @@ struct ath5k_capabilities {
  * Misc defines
  */
 
-struct ath_hal;
-
-typedef bool (ath5k_rfgain_t)(struct ath_hal *, struct ath5k_channel *, u_int);
-
-/*
- * HAL Functions that have different implementations for each chipset...
- */
-#define AR5K_HAL_FUNCTION(_hal, _n, _f)	(_hal)->ah_##_f = ath5k_##_n##_##_f
-#define AR5K_HAL_FUNCTIONS(_t, _n, _a) \
-	_t const struct ath5k_rate_table *(_a _n##_get_rate_table)(struct ath_hal *,		\
-			u_int mode);								\
-	_t void (_a _n##_detach)(struct ath_hal *);						\
-	/* Reset functions */									\
-	_t bool (_a _n##_reset)(struct ath_hal *, enum ieee80211_if_types,			\
-			struct ath5k_channel *,	bool change_channel, enum ath5k_status *status);\
-	_t void (_a _n##_set_opmode)(struct ath_hal *);						\
-	_t bool (_a _n##_phy_calibrate)(struct ath_hal*, struct ath5k_channel *);		\
-	/* Transmit functions */								\
-	_t bool (_a _n##_update_tx_triglevel)(struct ath_hal*, bool level);			\
-	_t int (_a _n##_setup_tx_queue)(struct ath_hal *, enum ath5k_tx_queue,			\
-			struct ath5k_txq_info *);						\
-	_t bool (_a _n##_setup_tx_queueprops)(struct ath_hal *, int queue,			\
-			const struct ath5k_txq_info *);						\
-	_t bool (_a _n##_release_tx_queue)(struct ath_hal *, u_int queue);			\
-	_t bool (_a _n##_reset_tx_queue)(struct ath_hal *, u_int queue);			\
-	_t u32 (_a _n##_get_tx_buf)(struct ath_hal *, u_int queue);				\
-	_t bool (_a _n##_put_tx_buf)(struct ath_hal *, u_int, u32 phys_addr);			\
-	_t bool (_a _n##_tx_start)(struct ath_hal *, u_int queue);				\
-	_t bool (_a _n##_stop_tx_dma)(struct ath_hal *, u_int queue);				\
-	_t bool (_a _n##_setup_tx_desc)(struct ath_hal *, struct ath_desc *,			\
-			u_int packet_length, u_int header_length, enum ath5k_pkt_type type,	\
-			u_int txPower, u_int tx_rate0, u_int tx_tries0, u_int key_index,	\
-			u_int antenna_mode, u_int flags, u_int rtscts_rate,			\
-			u_int rtscts_duration);							\
-	_t bool (_a _n##_setup_xtx_desc)(struct ath_hal *, struct ath_desc *,			\
-			u_int tx_rate1, u_int tx_tries1, u_int tx_rate2,			\
-			u_int tx_tries2,u_int tx_rate3, u_int tx_tries3);			\
-	_t bool (_a _n##_fill_tx_desc)(struct ath_hal *, struct ath_desc *, u_int segLen,	\
-			bool firstSeg, bool lastSeg, const struct ath_desc *);			\
-	_t enum ath5k_status (_a _n##_proc_tx_desc)(struct ath_hal *, struct ath_desc *);	\
-	_t bool (_a _n##_has_veol)(struct ath_hal *);						\
-	/* Receive Functions */									\
-	_t u32 (_a _n##_get_rx_buf)(struct ath_hal*);						\
-	_t void (_a _n##_put_rx_buf)(struct ath_hal*, u32 rxdp);				\
-	_t void (_a _n##_start_rx)(struct ath_hal*);						\
-	_t bool (_a _n##_stop_rx_dma)(struct ath_hal*);						\
-	_t void (_a _n##_start_rx_pcu)(struct ath_hal*);					\
-	_t void (_a _n##_stop_pcu_recv)(struct ath_hal*);					\
-	_t void (_a _n##_set_mcast_filter)(struct ath_hal*, u32 filter0,			\
-				u32 filter1);							\
-	_t bool (_a _n##_set_mcast_filterindex)(struct ath_hal*, u32 index);			\
-	_t bool (_a _n##_clear_mcast_filter_idx)(struct ath_hal*, u32 index);			\
-	_t u32 (_a _n##_get_rx_filter)(struct ath_hal*);					\
-	_t void (_a _n##_set_rx_filter)(struct ath_hal*, u32);					\
-	_t bool (_a _n##_setup_rx_desc)(struct ath_hal *, struct ath_desc *,			\
-				u32 size,	u_int flags);					\
-	_t enum ath5k_status (_a _n##_proc_rx_desc)(struct ath_hal *, struct ath_desc *,	\
-				u32 phyAddr, struct ath_desc *next);				\
-	_t void (_a _n##_set_rx_signal)(struct ath_hal *, const struct ath5k_node_stats *);	\
-	/* Misc Functions */									\
-	_t void (_a _n##_dump_state)(struct ath_hal *);						\
-	_t bool (_a _n##_get_diag_state)(struct ath_hal *, int request,const void *args,	\
-				u32 argsize, void **result, u32 *resultsize);			\
-	_t void (_a _n##_get_lladdr)(struct ath_hal *, u8 *);					\
-	_t bool (_a _n##_set_lladdr)(struct ath_hal *, const u8*);				\
-	_t bool (_a _n##_set_regdomain)(struct ath_hal*, u16, enum ath5k_status *);		\
-	_t void (_a _n##_set_ledstate)(struct ath_hal*, unsigned int);				\
-	_t void (_a _n##_set_associd)(struct ath_hal*, const u8 *bssid,				\
-				u16 assocId);							\
-	_t bool (_a _n##_set_gpio_input)(struct ath_hal *, u32 gpio);				\
-	_t bool (_a _n##_set_gpio_output)(struct ath_hal *, u32 gpio);				\
-	_t u32 (_a _n##_get_gpio)(struct ath_hal *, u32 gpio);					\
-	_t bool (_a _n##_set_gpio)(struct ath_hal *, u32 gpio, u32 val);			\
-	_t void (_a _n##_set_gpio_intr)(struct ath_hal *, u_int, u32);				\
-	_t u32 (_a _n##_get_tsf32)(struct ath_hal *);						\
-	_t u_int64_t (_a _n##_get_tsf64)(struct ath_hal *);					\
-	_t void (_a _n##_reset_tsf)(struct ath_hal *);						\
-	_t u16 (_a _n##_get_regdomain)(struct ath_hal *);					\
-	_t bool (_a _n##_detect_card_present)(struct ath_hal *);				\
-	_t void (_a _n##_update_mib_counters)(struct ath_hal *, struct ath5k_mib_stats *);	\
-	_t enum ath5k_rfgain (_a _n##_get_rf_gain)(struct ath_hal *);				\
-	_t bool (_a _n##_set_slot_time)(struct ath_hal *, u_int);				\
-	_t u_int (_a _n##_get_slot_time)(struct ath_hal *);					\
-	_t bool (_a _n##_set_ack_timeout)(struct ath_hal *, u_int);				\
-	_t u_int (_a _n##_get_ack_timeout)(struct ath_hal *);					\
-	_t bool (_a _n##_set_cts_timeout)(struct ath_hal *, u_int);				\
-	_t u_int (_a _n##_get_cts_timeout)(struct ath_hal *);					\
-	/* Key Cache Functions */								\
-	_t bool (_a _n##_is_cipher_supported)(struct ath_hal*, enum ath5k_cipher);		\
-	_t u32 (_a _n##_get_keycache_size)(struct ath_hal*);					\
-	_t bool (_a _n##_reset_key)(struct ath_hal*, u16);					\
-	_t bool (_a _n##_is_key_valid)(struct ath_hal *, u16);					\
-	_t bool (_a _n##_set_key)(struct ath_hal*, u16, const struct ath5k_keyval *,		\
-				const u8 *, int);						\
-	_t bool (_a _n##_set_key_lladdr)(struct ath_hal*, u16, const u8 *);			\
-	/* Power Management Functions */							\
-	_t bool (_a _n##_set_power)(struct ath_hal*, enum ath5k_power_mode mode,		\
-				bool set_chip, u16 sleep_duration);				\
-	_t enum ath5k_power_mode (_a _n##_get_power_mode)(struct ath_hal*);			\
-	_t bool (_a _n##_query_pspoll_support)(struct ath_hal*);				\
-	_t bool (_a _n##_init_pspoll)(struct ath_hal*);						\
-	_t bool (_a _n##_enable_pspoll)(struct ath_hal *, u8 *, u16);				\
-	_t bool (_a _n##_disable_pspoll)(struct ath_hal *);					\
-	/* Beacon Management Functions */							\
-	_t void (_a _n##_init_beacon)(struct ath_hal *, u32 nexttbtt, u32 intval);		\
-	_t void (_a _n##_set_beacon_timers)(struct ath_hal *,					\
-			const struct ath5k_beacon_state *);					\
-	_t void (_a _n##_reset_beacon)(struct ath_hal *);					\
-	_t bool (_a _n##_wait_for_beacon)(struct ath_hal *, unsigned long);			\
-	/* Interrupt functions */								\
-	_t bool (_a _n##_is_intr_pending)(struct ath_hal *);					\
-	_t bool (_a _n##_get_isr)(struct ath_hal *, u32 *);					\
-	_t u32 (_a _n##_get_intr)(struct ath_hal *);						\
-	_t enum ath5k_int (_a _n##_set_intr)(struct ath_hal *, enum ath5k_int);			\
-	/* Chipset functions (ar5k-specific, non-HAL) */					\
-	_t bool (_a _n##_get_capabilities)(struct ath_hal *);					\
-	_t void (_a _n##_radar_alert)(struct ath_hal *, bool enable);				\
-	_t bool (_a _n##_eeprom_is_busy)(struct ath_hal *);					\
-	_t int (_a _n##_eeprom_read)(struct ath_hal *, u32 offset, u16 *data);			\
-	_t int (_a _n##_eeprom_write)(struct ath_hal *, u32 offset, u16 data);			\
-	/* Functions not found in OpenBSD */							\
-	_t bool (_a _n##_get_tx_queueprops)(struct ath_hal *, int, struct ath5k_txq_info *);	\
-	_t enum ath5k_status (_a _n##_get_capability)(struct ath_hal *,				\
-			enum ath5k_capability_type, u32, u32 *);				\
-	_t u32  (_a _n##_num_tx_pending)(struct ath_hal *, u_int);				\
-	_t bool (_a _n##_phy_disable)(struct ath_hal *);					\
-	_t void (_a _n##_set_pcu_config)(struct ath_hal *);					\
-	_t bool (_a _n##_set_txpower_limit)(struct ath_hal *, u_int);				\
-	_t void (_a _n##_set_def_antenna)(struct ath_hal *, u_int);				\
-	_t u_int  (_a _n ##_get_def_antenna)(struct ath_hal *);					\
-	_t bool (_a _n ##_set_bssid_mask)(struct ath_hal *, const u8 *);			\
-	/*Totaly unimplemented*/								\
-	_t bool (_a _n##_set_capability)(struct ath_hal *, enum ath5k_capability_type, u32,	\
-				u32,enum ath5k_status *);					\
-	_t void (_a _n##_proc_mib_event)(struct ath_hal *, const struct ath5k_node_stats *);	\
-	_t void (_a _n##_get_tx_inter_queue)(struct ath_hal *, u32 *);
-
-
 #define AR5K_MAX_GPIO		10
 #define AR5K_MAX_RF_BANKS	8
 
@@ -1186,65 +1047,175 @@ struct ath_hal {
 	/*
 	 * Function pointers
 	 */
-	AR5K_HAL_FUNCTIONS(, ah, *)
+	bool (*ah_setup_tx_desc)(struct ath_hal *, struct ath_desc *,
+		unsigned int, unsigned int, enum ath5k_pkt_type, unsigned int,
+		unsigned int, unsigned int, unsigned int, unsigned int,
+		unsigned int, unsigned int, unsigned int);
+	bool (*ah_setup_xtx_desc)(struct ath_hal *, struct ath_desc *,
+		unsigned int, unsigned int, unsigned int, unsigned int,
+		unsigned int, unsigned int);
+	bool (*ah_fill_tx_desc)(struct ath_hal *, struct ath_desc *,
+		unsigned int, bool, bool, const struct ath_desc *);
+	enum ath5k_status (*ah_proc_tx_desc)(struct ath_hal *,
+		struct ath_desc *);
+	enum ath5k_status (*ah_proc_rx_desc)(struct ath_hal *,
+		struct ath_desc *, u32, struct ath_desc *);
 };
 
 /*
  * Prototypes
  */
+typedef bool (ath5k_rfgain_t)(struct ath_hal *, struct ath5k_channel *, u_int);
 
-const char	*ath_hal_probe(u16, u16);
-struct ath_hal	*ath5k_hw_init(u16, void *, void __iomem *, enum ath5k_status *);
-u16		ath_hal_computetxtime(struct ath_hal *, const struct ath5k_rate_table *,
-					u32, u16, bool);
-u_int		ath_hal_mhz2ieee(u_int, u_int);
-u_int		ath_hal_ieee2mhz(u_int, u_int);
-bool		ath_hal_init_channels(struct ath_hal *, struct ath5k_channel *,
-				u_int, u_int *, enum ieee80211_countrycode, u16, 
-				bool, bool);
-const char	*ath5k_printver(enum ath5k_srev_type, u32);
-void		ath5k_radar_alert(struct ath_hal *);
-enum ieee80211_regdomain	ath5k_regdomain_to_ieee(u16);
-u16		ath5k_regdomain_from_ieee(enum ieee80211_regdomain);
-u16		ath5k_get_regdomain(struct ath_hal *);
-u32		ath5k_bitswap(u32, u_int);
-inline u_int	ath5k_clocktoh(u_int, bool);
-inline u_int	ath5k_htoclock(u_int, bool);
-void		ath5k_rt_copy(struct ath5k_rate_table *, const struct ath5k_rate_table *);
-bool		ath5k_register_timeout(struct ath_hal *, u32, u32,
-					u32, bool);
-int		ath5k_eeprom_init(struct ath_hal *);
-int		ath5k_eeprom_read_mac(struct ath_hal *, u8 *);
-bool		ath5k_eeprom_regulation_domain(struct ath_hal *, bool,
-					enum ieee80211_regdomain *);
-int		ath5k_eeprom_read_ants(struct ath_hal *, u32 *, u_int);
-int		ath5k_eeprom_read_modes(struct ath_hal *, u32 *, u_int);
-u16		ath5k_eeprom_bin2freq(struct ath_hal *, u16, u_int);
-
-bool		ath5k_hw_channel(struct ath_hal *, struct ath5k_channel *);
-bool		ath5k_hw_rf5110_channel(struct ath_hal *, struct ath5k_channel *);
-u32		ath5k_hw_rf5110_chan2athchan(struct ath5k_channel *);
-bool		ath5k_hw_rf5111_channel(struct ath_hal *, struct ath5k_channel *);
-bool		ath5k_hw_rf5111_chan2athchan(u_int, struct ath5k_athchan_2ghz *);
-bool		ath5k_hw_rf5112_channel(struct ath_hal *, struct ath5k_channel *);
-bool		ath5k_check_channel(struct ath_hal *, u16, u_int flags);
-
-bool		ath5k_hw_phy_calibrate(struct ath_hal *hal, struct ath5k_channel *channel);
-bool		ath5k_hw_rf5110_calibrate(struct ath_hal *hal, struct ath5k_channel *channel);
-bool		ath5k_hw_rf511x_calibrate(struct ath_hal *hal, struct ath5k_channel *channel);
-
-bool		ath5k_hw_rfregs(struct ath_hal *, struct ath5k_channel *, u_int);
-bool		ath5k_hw_rf5111_rfregs(struct ath_hal *, struct ath5k_channel *, u_int);
-bool		ath5k_hw_rf5112_rfregs(struct ath_hal *, struct ath5k_channel *, u_int);
-void 		ath5k_hw_ar5211_rfregs(struct ath_hal *, struct ath5k_channel *, u_int, u_int);
-u_int		ath5k_hw_rfregs_op(u32 *, u32, u32, u32,
-					u32, u32, bool);
-u32		ath5k_hw_rfregs_gainf_corr(struct ath_hal *);
-bool		ath5k_hw_rfregs_gain_readback(struct ath_hal *);
-s32		ath5k_hw_rfregs_gain_adjust(struct ath_hal *);
-bool		ath5k_hw_rfgain(struct ath_hal *, u_int, u_int);
-void		ath5k_txpower_table(struct ath_hal *, struct ath5k_channel *, s16);
-
-/*added*/
-extern	u_int  ath_hal_getwirelessmodes(struct ath_hal *, enum ieee80211_countrycode);
+/* General Functions */
+const char *ath_hal_probe(u16 vendor, u16 device);
+u16 ath_hal_computetxtime(struct ath_hal *hal, const struct ath5k_rate_table *rates, u32 frame_length, u16 rate_index, bool short_preamble);
+unsigned int ath_hal_getwirelessmodes(struct ath_hal *hal, enum ieee80211_countrycode country) ;
+/* Attach/Detach Functions */
+struct ath_hal *ath5k_hw_init(u16 device, void *sc, void __iomem *sh, enum ath5k_status *status);
+bool ath5k_hw_nic_wakeup(struct ath_hal *hal, u16 flags, bool initial);
+u16 ath5k_hw_radio_revision(struct ath_hal *hal, enum ath5k_chip chip);
+const struct ath5k_rate_table *ath5k_hw_get_rate_table(struct ath_hal *hal, unsigned int mode);
+void ath5k_hw_detach(struct ath_hal *hal);
+/* Reset Functions */
+bool ath5k_hw_reset(struct ath_hal *hal, enum ieee80211_if_types op_mode, struct ath5k_channel *channel, bool change_channel, enum ath5k_status *status);
+bool ath5k_hw_nic_reset(struct ath_hal *hal, u32 val);
+/* Power management functions */
+bool ath5k_hw_set_power(struct ath_hal *hal, enum ath5k_power_mode mode, bool set_chip, u16 sleep_duration);
+enum ath5k_power_mode ath5k_hw_get_power_mode(struct ath_hal *hal);
+/* DMA Related Functions */
+void ath5k_hw_start_rx(struct ath_hal *hal);
+bool ath5k_hw_stop_rx_dma(struct ath_hal *hal);
+u32 ath5k_hw_get_rx_buf(struct ath_hal *hal);
+void ath5k_hw_put_rx_buf(struct ath_hal *hal, u32 phys_addr);
+bool ath5k_hw_tx_start(struct ath_hal *hal, unsigned int queue);
+bool ath5k_hw_stop_tx_dma(struct ath_hal *hal, unsigned int queue);
+u32 ath5k_hw_get_tx_buf(struct ath_hal *hal, unsigned int queue);
+bool ath5k_hw_put_tx_buf(struct ath_hal *hal, unsigned int queue, u32 phys_addr);
+bool ath5k_hw_update_tx_triglevel(struct ath_hal *hal, bool increase);
+/* Interrupt handling */
+bool ath5k_hw_is_intr_pending(struct ath_hal *hal);
+bool ath5k_hw_get_isr(struct ath_hal *hal, u32 *interrupt_mask);
+u32 ath5k_hw_get_intr(struct ath_hal *hal);
+enum ath5k_int ath5k_hw_set_intr(struct ath_hal *hal, enum ath5k_int new_mask);
+void ath5k_hw_radar_alert(struct ath_hal *hal, bool enable);
+/* EEPROM access functions */
+bool ath5k_hw_eeprom_is_busy(struct ath_hal *hal);
+int ath5k_hw_eeprom_read(struct ath_hal *hal, u32 offset, u16 *data);
+int ath5k_hw_eeprom_write(struct ath_hal *hal, u32 offset, u16 data);
+u16 ath5k_eeprom_bin2freq(struct ath_hal *hal, u16 bin, unsigned int mode);
+int ath5k_eeprom_read_ants(struct ath_hal *hal, u32 *offset, unsigned int mode);
+int ath5k_eeprom_read_modes(struct ath_hal *hal, u32 *offset, unsigned int mode);
+int ath5k_eeprom_init(struct ath_hal *hal);
+int ath5k_eeprom_read_mac(struct ath_hal *hal, u8 *mac);
+bool ath5k_eeprom_regulation_domain(struct ath_hal *hal, bool write, enum ieee80211_regdomain *regdomain);
+bool ath5k_hw_set_regdomain(struct ath_hal *hal, u16 regdomain, enum ath5k_status *status);
+bool ath5k_hw_get_capabilities(struct ath_hal *hal);
+/* Protocol Control Unit Functions */
+void ath5k_hw_set_opmode(struct ath_hal *hal);
+void ath5k_hw_set_pcu_config(struct ath_hal *hal);
+/* BSSID Functions */
+void ath5k_hw_get_lladdr(struct ath_hal *hal, u8 *mac);
+bool ath5k_hw_set_lladdr(struct ath_hal *hal, const u8 *mac);
+void ath5k_hw_set_associd(struct ath_hal *hal, const u8 *bssid, u16 assoc_id);
+bool ath5k_hw_set_bssid_mask(struct ath_hal *hal, const u8* mask);
+/* Receive start/stop functions */
+void ath5k_hw_start_rx_pcu(struct ath_hal *hal);
+void ath5k_hw_stop_pcu_recv(struct ath_hal *hal);
+/* RX Filter functions */
+void ath5k_hw_set_mcast_filter(struct ath_hal *hal, u32 filter0, u32 filter1);
+bool ath5k_hw_set_mcast_filterindex(struct ath_hal *hal, u32 index);
+bool ath5k_hw_clear_mcast_filter_idx(struct ath_hal *hal, u32 index);
+u32 ath5k_hw_get_rx_filter(struct ath_hal *hal);
+void ath5k_hw_set_rx_filter(struct ath_hal *hal, u32 filter);
+/* Beacon related functions */
+u32 ath5k_hw_get_tsf32(struct ath_hal *hal);
+u64 ath5k_hw_get_tsf64(struct ath_hal *hal);
+void ath5k_hw_reset_tsf(struct ath_hal *hal);
+void ath5k_hw_init_beacon(struct ath_hal *hal, u32 next_beacon, u32 interval);
+void ath5k_hw_set_beacon_timers(struct ath_hal *hal, const struct ath5k_beacon_state *state);
+void ath5k_hw_reset_beacon(struct ath_hal *hal);
+bool ath5k_hw_wait_for_beacon(struct ath_hal *hal, unsigned long phys_addr);
+void ath5k_hw_update_mib_counters(struct ath_hal *hal, struct ath5k_mib_stats *statistics);
+void ath5k_hw_proc_mib_event(struct ath_hal *hal, const struct ath5k_node_stats *stats) ;
+/* ACK/CTS Timeouts */
+bool ath5k_hw_set_ack_timeout(struct ath_hal *hal, unsigned int timeout);
+unsigned int ath5k_hw_get_ack_timeout(struct ath_hal *hal);
+bool ath5k_hw_set_cts_timeout(struct ath_hal *hal, unsigned int timeout);
+unsigned int ath5k_hw_get_cts_timeout(struct ath_hal *hal);
+/* Key table (WEP) functions */
+bool ath5k_hw_is_cipher_supported(struct ath_hal *hal, enum ath5k_cipher cipher);
+u32 ath5k_hw_get_keycache_size(struct ath_hal *hal);
+bool ath5k_hw_reset_key(struct ath_hal *hal, u16 entry);
+bool ath5k_hw_is_key_valid(struct ath_hal *hal, u16 entry);
+bool ath5k_hw_set_key(struct ath_hal *hal, u16 entry, const struct ath5k_keyval *keyval, const u8 *mac, int xor_notused);
+bool ath5k_hw_set_key_lladdr(struct ath_hal *hal, u16 entry, const u8 *mac);
+/* Queue Control Unit, DFS Control Unit Functions */
+int ath5k_hw_setup_tx_queue(struct ath_hal *hal, enum ath5k_tx_queue queue_type, struct ath5k_txq_info *queue_info);
+bool ath5k_hw_setup_tx_queueprops(struct ath_hal *hal, int queue, const struct ath5k_txq_info *queue_info);
+bool ath5k_hw_get_tx_queueprops(struct ath_hal *hal, int queue, struct ath5k_txq_info *queue_info);
+bool ath5k_hw_release_tx_queue(struct ath_hal *hal, unsigned int queue);
+bool ath5k_hw_reset_tx_queue(struct ath_hal *hal, unsigned int queue);
+u32 ath5k_hw_num_tx_pending(struct ath_hal *hal, unsigned int queue);
+bool ath5k_hw_set_slot_time(struct ath_hal *hal, unsigned int slot_time);
+unsigned int ath5k_hw_get_slot_time(struct ath_hal *hal);
+/* Hardware Descriptor Functions */
+/* RX Descriptor */
+bool ath5k_hw_setup_rx_desc(struct ath_hal *hal, struct ath_desc *desc, u32 size, unsigned int flags);
+/* GPIO Functions */
+void ath5k_hw_set_ledstate(struct ath_hal *hal, unsigned int state);
+bool ath5k_hw_set_gpio_output(struct ath_hal *hal, u32 gpio);
+bool ath5k_hw_set_gpio_input(struct ath_hal *hal, u32 gpio);
+u32 ath5k_hw_get_gpio(struct ath_hal *hal, u32 gpio);
+bool ath5k_hw_set_gpio(struct ath_hal *hal, u32 gpio, u32 val);
+void ath5k_hw_set_gpio_intr(struct ath_hal *hal, unsigned int gpio, u32 interrupt_level);
+/* Regulatory Domain/Channels Setup */
+unsigned int ath_hal_mhz2ieee(unsigned int freq, u_int flags);
+unsigned int ath_hal_ieee2mhz(unsigned int chan, u_int flags);
+bool ath5k_check_channel(struct ath_hal *hal, u16 freq, unsigned int flags);
+bool ath_hal_init_channels(struct ath_hal *hal, struct ath5k_channel *channels, unsigned int max_channels, u_int *channels_size, enum ieee80211_countrycode country, u16 mode, bool outdoor, bool extended);
+u16 ath5k_regdomain_from_ieee(enum ieee80211_regdomain ieee);
+enum ieee80211_regdomain ath5k_regdomain_to_ieee(u16 regdomain);
+u16 ath5k_get_regdomain(struct ath_hal *hal);
+u16 ath5k_hw_get_regdomain(struct ath_hal *hal);
+/* PHY/RF access functions */
+bool ath5k_hw_channel(struct ath_hal *hal, struct ath5k_channel *channel);
+u32 ath5k_hw_rf5110_chan2athchan(struct ath5k_channel *channel);
+bool ath5k_hw_rf5110_channel(struct ath_hal *hal, struct ath5k_channel *channel);
+bool ath5k_hw_rf5111_chan2athchan(unsigned int ieee, struct ath5k_athchan_2ghz *athchan);
+bool ath5k_hw_rf5111_channel(struct ath_hal *hal, struct ath5k_channel *channel);
+bool ath5k_hw_rf5112_channel(struct ath_hal *hal, struct ath5k_channel *channel);
+bool ath5k_hw_phy_calibrate(struct ath_hal *hal, struct ath5k_channel *channel);
+bool ath5k_hw_rf5110_calibrate(struct ath_hal *hal, struct ath5k_channel *channel);
+bool ath5k_hw_rf511x_calibrate(struct ath_hal *hal, struct ath5k_channel *channel);
+bool ath5k_hw_phy_disable(struct ath_hal *hal);
+void ath5k_hw_set_def_antenna(struct ath_hal *hal, unsigned int ant);
+unsigned int ath5k_hw_get_def_antenna(struct ath_hal *hal);
+unsigned int ath5k_hw_rfregs_op(u32 *rf, u32 offset, u32 reg, u32 bits, u32 first, u32 col, bool set);
+u32 ath5k_hw_rfregs_gainf_corr(struct ath_hal *hal);
+bool ath5k_hw_rfregs_gain_readback(struct ath_hal *hal);
+s32 ath5k_hw_rfregs_gain_adjust(struct ath_hal *hal);
+bool ath5k_hw_rfregs(struct ath_hal *hal, struct ath5k_channel *channel, unsigned int mode);
+bool ath5k_hw_rf5111_rfregs(struct ath_hal *hal, struct ath5k_channel *channel, unsigned int mode);
+bool ath5k_hw_rf5112_rfregs(struct ath_hal *hal, struct ath5k_channel *channel, unsigned int mode);
+void ath5k_hw_ar5211_rfregs(struct ath_hal *hal, struct ath5k_channel *channel, unsigned int freq, unsigned int ee_mode);
+bool ath5k_hw_rfgain(struct ath_hal *hal, unsigned int phy, u_int freq);
+enum ath5k_rfgain ath5k_hw_get_rf_gain(struct ath_hal *hal);
+/* TX power setup */
+/* Misc functions */
+void ath5k_hw_dump_state(struct ath_hal *hal);
+bool ath5k_hw_has_veol(struct ath_hal *hal);
+void ath5k_hw_get_tx_inter_queue(struct ath_hal *hal, u32 *i);
+void ath5k_hw_set_rx_signal(struct ath_hal *hal, const struct ath5k_node_stats *stats);
+bool ath5k_hw_get_diag_state(struct ath_hal *hal, int request, const void *args, u32 argsize, void **result, u32 *resultsize);
+bool ath5k_hw_detect_card_present(struct ath_hal *hal);
+enum ath5k_status ath5k_hw_get_capability(struct ath_hal *hal, enum ath5k_capability_type cap_type,u32 capability, u32 *result) ;
+bool ath5k_hw_set_capability(struct ath_hal *hal, enum ath5k_capability_type cap_type, u32 capability, u32 setting, enum ath5k_status *status) ;
+bool ath5k_hw_query_pspoll_support(struct ath_hal *hal);
+bool ath5k_hw_init_pspoll(struct ath_hal *hal);
+bool ath5k_hw_enable_pspoll(struct ath_hal *hal, u8 *bssid, u16 assoc_id);
+bool ath5k_hw_disable_pspoll(struct ath_hal *hal);
+const char *ath5k_printver(enum ath5k_srev_type type, u32 val);
+void ath5k_radar_alert(struct ath_hal *hal);
+void ath5k_hw_fill(struct ath_hal *hal);
 #endif /* _AR5K_H */
diff --git a/openhal/ath5k_hw.c b/openhal/ath5k_hw.c
index ea4d086..c384231 100644
--- a/openhal/ath5k_hw.c
+++ b/openhal/ath5k_hw.c
@@ -84,8 +84,6 @@ u16	ath5k_hw_radio_revision(struct ath_hal *, enum ath5k_chip);
 void		ath5k_hw_fill(struct ath_hal *);
 bool	ath5k_hw_txpower(struct ath_hal *, struct ath5k_channel *, unsigned int);
 
-AR5K_HAL_FUNCTIONS(extern, ath5k_hw,);
-
 /*
  * Supported channels
  */
@@ -497,7 +495,7 @@ ath5k_hw_init(u16 device, void *sc, void __iomem *sh, enum ath5k_status *status)
 	}
 
 	/* Get misc capabilities */
-	if (hal->ah_get_capabilities(hal) != true) {
+	if (ath5k_hw_get_capabilities(hal) != true) {
 		*status = AR5K_EEREAD;
 		AR5K_PRINTF("unable to get device capabilities: 0x%04x\n",
 		    device);
@@ -512,7 +510,7 @@ ath5k_hw_init(u16 device, void *sc, void __iomem *sh, enum ath5k_status *status)
 		goto failed;
 	}
 
-	hal->ah_set_lladdr(hal, mac);
+	ath5k_hw_set_lladdr(hal, mac);
 
 	/* Get rate tables */
 	if (hal->ah_capabilities.cap_mode & AR5K_MODE_11A)
@@ -2493,12 +2491,12 @@ ath5k_eeprom_read_mac(struct ath_hal *hal, u8 *mac)
 	memset(mac, 0, ETH_ALEN);
 	memset(&mac_d, 0, ETH_ALEN);
 
-	if (hal->ah_eeprom_read(hal, 0x20, &data) != 0)
+	if (ath5k_hw_eeprom_read(hal, 0x20, &data) != 0)
 		return AR5K_EIO;
 
 	for (offset = 0x1f, octet = 0, total = 0;
 	     offset >= 0x1d; offset--) {
-		if (hal->ah_eeprom_read(hal, offset, &data) != 0)
+		if (ath5k_hw_eeprom_read(hal, offset, &data) != 0)
 			return AR5K_EIO;
 
 		total += data;
@@ -2537,7 +2535,7 @@ ath5k_eeprom_regulation_domain(struct ath_hal *hal, bool write,
 	if (hal->ah_capabilities.cap_eeprom.ee_protect &
 	    AR5K_EEPROM_PROTECT_WR_128_191)
 		return false;
-	if (hal->ah_eeprom_write(hal, AR5K_EEPROM_REG_DOMAIN,
+	if (ath5k_hw_eeprom_write(hal, AR5K_EEPROM_REG_DOMAIN,
 	    ee_regdomain) != 0)
 		return false;
 
@@ -6428,31 +6426,6 @@ ath5k_hw_fill(struct ath_hal *hal)
 	else if (hal->ah_version == AR5K_AR5211)
 		hal->ah_magic = AR5K_EEPROM_MAGIC_5211;
 
-	/*
-	 * Init/Exit functions
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, get_rate_table);
-	AR5K_HAL_FUNCTION(hal, hw, detach);
-
-	/*
-	 * Reset functions
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, reset);
-	AR5K_HAL_FUNCTION(hal, hw, set_opmode);
-	AR5K_HAL_FUNCTION(hal, hw, phy_calibrate);
-
-	/*
-	 * TX functions
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, update_tx_triglevel);
-	AR5K_HAL_FUNCTION(hal, hw, setup_tx_queue);
-	AR5K_HAL_FUNCTION(hal, hw, setup_tx_queueprops);
-	AR5K_HAL_FUNCTION(hal, hw, release_tx_queue);
-	AR5K_HAL_FUNCTION(hal, hw, reset_tx_queue);
-	AR5K_HAL_FUNCTION(hal, hw, get_tx_buf);
-	AR5K_HAL_FUNCTION(hal, hw, put_tx_buf);
-	AR5K_HAL_FUNCTION(hal, hw, tx_start);
-	AR5K_HAL_FUNCTION(hal, hw, stop_tx_dma);
 	if (hal->ah_version == AR5K_AR5212) {
 		hal->ah_setup_tx_desc = ath5k_hw_setup_4word_tx_desc;
 		hal->ah_setup_xtx_desc = ath5k_hw_setup_xr_tx_desc;
@@ -6464,120 +6437,9 @@ ath5k_hw_fill(struct ath_hal *hal)
 		hal->ah_fill_tx_desc = ath5k_hw_fill_2word_tx_desc;
 		hal->ah_proc_tx_desc = ath5k_hw_proc_2word_tx_status;
 	}
-	AR5K_HAL_FUNCTION(hal, hw, has_veol);
 
-	/*
-	 * RX functions
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, get_rx_buf);
-	AR5K_HAL_FUNCTION(hal, hw, put_rx_buf);
-	AR5K_HAL_FUNCTION(hal, hw, start_rx);
-	AR5K_HAL_FUNCTION(hal, hw, stop_rx_dma);
-	AR5K_HAL_FUNCTION(hal, hw, start_rx_pcu);
-	AR5K_HAL_FUNCTION(hal, hw, stop_pcu_recv);
-	AR5K_HAL_FUNCTION(hal, hw, set_mcast_filter);
-	AR5K_HAL_FUNCTION(hal, hw, set_mcast_filterindex);
-	AR5K_HAL_FUNCTION(hal, hw, clear_mcast_filter_idx);
-	AR5K_HAL_FUNCTION(hal, hw, get_rx_filter);
-	AR5K_HAL_FUNCTION(hal, hw, set_rx_filter);
-	AR5K_HAL_FUNCTION(hal, hw, setup_rx_desc);
 	if (hal->ah_version == AR5K_AR5212)
 		hal->ah_proc_rx_desc = ath5k_hw_proc_new_rx_status;
 	else if (hal->ah_version <= AR5K_AR5211)
 		hal->ah_proc_rx_desc = ath5k_hw_proc_old_rx_status;
-	AR5K_HAL_FUNCTION(hal, hw, set_rx_signal);
-
-	/*
-	 * Misc functions
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, dump_state);
-	AR5K_HAL_FUNCTION(hal, hw, get_diag_state);
-	AR5K_HAL_FUNCTION(hal, hw, get_lladdr);
-	AR5K_HAL_FUNCTION(hal, hw, set_lladdr);
-	AR5K_HAL_FUNCTION(hal, hw, set_regdomain);
-	AR5K_HAL_FUNCTION(hal, hw, set_ledstate);
-	AR5K_HAL_FUNCTION(hal, hw, set_associd);
-	AR5K_HAL_FUNCTION(hal, hw, set_gpio_input);
-	AR5K_HAL_FUNCTION(hal, hw, set_gpio_output);
-	AR5K_HAL_FUNCTION(hal, hw, get_gpio);
-	AR5K_HAL_FUNCTION(hal, hw, set_gpio);
-	AR5K_HAL_FUNCTION(hal, hw, set_gpio_intr);
-	AR5K_HAL_FUNCTION(hal, hw, get_tsf32);
-	AR5K_HAL_FUNCTION(hal, hw, get_tsf64);
-	AR5K_HAL_FUNCTION(hal, hw, reset_tsf);
-	AR5K_HAL_FUNCTION(hal, hw, get_regdomain);
-	AR5K_HAL_FUNCTION(hal, hw, detect_card_present);
-	AR5K_HAL_FUNCTION(hal, hw, update_mib_counters);
-	AR5K_HAL_FUNCTION(hal, hw, get_rf_gain);
-	AR5K_HAL_FUNCTION(hal, hw, set_slot_time);
-	AR5K_HAL_FUNCTION(hal, hw, get_slot_time);
-	AR5K_HAL_FUNCTION(hal, hw, set_ack_timeout);
-	AR5K_HAL_FUNCTION(hal, hw, get_ack_timeout);
-	AR5K_HAL_FUNCTION(hal, hw, set_cts_timeout);
-	AR5K_HAL_FUNCTION(hal, hw, get_cts_timeout);
-
-	/*
-	 * Key table (WEP) functions
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, is_cipher_supported);
-	AR5K_HAL_FUNCTION(hal, hw, get_keycache_size);
-	AR5K_HAL_FUNCTION(hal, hw, reset_key);
-	AR5K_HAL_FUNCTION(hal, hw, is_key_valid);
-	AR5K_HAL_FUNCTION(hal, hw, set_key);
-	AR5K_HAL_FUNCTION(hal, hw, set_key_lladdr);
-
-	/*
-	 * Power management functions
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, set_power);
-	AR5K_HAL_FUNCTION(hal, hw, get_power_mode);
-	AR5K_HAL_FUNCTION(hal, hw, query_pspoll_support);
-	AR5K_HAL_FUNCTION(hal, hw, init_pspoll);
-	AR5K_HAL_FUNCTION(hal, hw, enable_pspoll);
-	AR5K_HAL_FUNCTION(hal, hw, disable_pspoll);
-
-	/*
-	 * Beacon functions
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, init_beacon);
-	AR5K_HAL_FUNCTION(hal, hw, set_beacon_timers);
-	AR5K_HAL_FUNCTION(hal, hw, reset_beacon);
-	AR5K_HAL_FUNCTION(hal, hw, wait_for_beacon);
-
-	/*
-	 * Interrupt functions
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, is_intr_pending);
-	AR5K_HAL_FUNCTION(hal, hw, get_isr);
-	AR5K_HAL_FUNCTION(hal, hw, get_intr);
-	AR5K_HAL_FUNCTION(hal, hw, set_intr);
-
-	/*
-	 * Chipset functions (ar5k-specific, non-HAL)
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, get_capabilities);
-	AR5K_HAL_FUNCTION(hal, hw, radar_alert);
-
-	/*
-	 * EEPROM access
-	 */
-	AR5K_HAL_FUNCTION(hal, hw, eeprom_is_busy);
-	AR5K_HAL_FUNCTION(hal, hw, eeprom_read);
-	AR5K_HAL_FUNCTION(hal, hw, eeprom_write);
-
-	/* Functions not found in OpenBSD */
-	AR5K_HAL_FUNCTION(hal, hw, get_tx_queueprops);
-	AR5K_HAL_FUNCTION(hal, hw, get_capability);
-	AR5K_HAL_FUNCTION(hal, hw, num_tx_pending);
-	AR5K_HAL_FUNCTION(hal, hw, phy_disable);
-	AR5K_HAL_FUNCTION(hal, hw, set_pcu_config);
-	AR5K_HAL_FUNCTION(hal, hw, set_txpower_limit);
-	AR5K_HAL_FUNCTION(hal, hw, set_def_antenna);
-	AR5K_HAL_FUNCTION(hal, hw, get_def_antenna);
-	AR5K_HAL_FUNCTION(hal, hw, set_bssid_mask);
-	/*Totaly unimplemented*/
-	AR5K_HAL_FUNCTION(hal, hw, set_capability);
-	AR5K_HAL_FUNCTION(hal, hw, proc_mib_event);
-	AR5K_HAL_FUNCTION(hal, hw, get_tx_inter_queue);
-
 }
diff --git a/openhal/ath5k_hw.h b/openhal/ath5k_hw.h
index 3b53963..417812f 100644
--- a/openhal/ath5k_hw.h
+++ b/openhal/ath5k_hw.h
@@ -245,7 +245,7 @@ struct ath5k_eeprom_info {
 		udelay(1);
 
 #define AR5K_EEPROM_READ(_o, _v)	{				\
-	if ((ret = hal->ah_eeprom_read(hal, (_o),			\
+	if ((ret = ath5k_hw_eeprom_read(hal, (_o),			\
 		 &(_v))) != 0)						\
 		return (ret);						\
 }
diff --git a/openhal/translation.h b/openhal/translation.h
deleted file mode 100644
index 219a1fc..0000000
--- a/openhal/translation.h
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * Copyright (c) 2006-2007 Nick Kossifidis <mickflemm@gmail.com>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- *
- * $Id$
- */
-
-/*
- * Init/Exit functions
- */
-#define ah_getRateTable		ah_get_rate_table
-//detach
-
-/*
- * Reset functions
- */
-//reset
-//set_opmode
-#define ah_perCalibration	ah_phy_calibrate
-#define ah_phyDisable		ah_phy_disable
-
-/*
- * TX functions
- */
-#define ah_updateTxTrigLevel	ah_update_tx_triglevel
-#define ah_setupTxQueue		ah_setup_tx_queue
-#define ah_setTxQueueProps	ah_setup_tx_queueprops
-#define ah_getTxQueueProps	ah_get_tx_queueprops
-#define ah_releaseTxQueue	ah_release_tx_queue
-#define ah_resetTxQueue		ah_reset_tx_queue
-#define ah_getTxDP		ah_get_tx_buf
-#define ah_setTxDP		ah_put_tx_buf
-#define ah_numTxPending	ah_num_tx_pending
-#define ah_startTxDma		ah_tx_start
-#define ah_stopTxDma		ah_stop_tx_dma
-#define ah_setupTxDesc		ah_setup_tx_desc
-#define ah_setupXTxDesc		ah_setup_xtx_desc
-#define ah_fillTxDesc 		ah_fill_tx_desc
-#define ah_procTxDesc		ah_proc_tx_desc
-#define ah_getTxIntrQueue	ah_get_tx_inter_queue
-//has_veol
-
-/*
- * RX functions
- */
-#define ah_getRxDP		ah_get_rx_buf
-#define ah_setRxDP		ah_put_rx_buf
-#define ah_enableReceive	ah_start_rx
-#define ah_stopDmaReceive	ah_stop_rx_dma
-#define ah_startPcuReceive	ah_start_rx_pcu
-#define ah_stopPcuReceive	ah_stop_pcu_recv
-#define ah_setMulticastFilter	ah_set_mcast_filter
-#define ah_setMulticastFilterIndex	ah_set_mcast_filterindex
-#define ah_clrMulticastFilterIndex	ah_clear_mcast_filter_idx
-#define ah_getRxFilter		ah_get_rx_filter
-#define ah_setRxFilter		ah_set_rx_filter
-#define ah_setupRxDesc		ah_setup_rx_desc
-#define ah_procRxDesc		ah_proc_rx_desc
-#define ah_rxMonitor		ah_set_rx_signal
-#define ah_procMibEvent		ah_proc_mib_event
-
-/*
- * Misc functions
- */
-#define ah_getCapability	ah_get_capability
-#define ah_setCapability	ah_set_capability
-//dump_state
-#define ah_getDiagState		ah_get_diag_state
-#define ah_getMacAddress	ah_get_lladdr
-#define ah_setMacAddress	ah_set_lladdr
-#define ah_setBssIdMask		ah_set_bssid_mask
-//#define ah_getBssIdMask	ah_get_bssid_mask
-#define ah_setRegulatoryDomain	ah_set_regdomain
-#define ah_setLedState		ah_set_ledstate
-#define ah_writeAssocid		ah_set_associd
-#define ah_gpioCfgInput		ah_set_gpio_input
-#define ah_gpioCfgOutput	ah_set_gpio_output
-#define ah_gpioGet		ah_get_gpio
-#define ah_gpioSet		ah_set_gpio
-#define ah_gpioSetIntr		ah_set_gpio_intr
-#define ah_getTsf32		ah_get_tsf32
-#define ah_getTsf64		ah_get_tsf64
-#define ah_resetTsf		ah_reset_tsf
-//get_regdomain
-#define ah_detectCardPresent 	ah_detect_card_present
-#define ah_updateMibCounters	ah_update_mib_counters
-#define ah_getRfGain		ah_get_rf_gain
-#define ah_getDefAntenna	ah_get_def_antenna
-#define ah_setDefAntenna	ah_set_def_antenna
-#define ah_setSlotTime		ah_set_slot_time
-#define ah_getSlotTime		ah_get_slot_time
-#define ah_setAckTimeout	ah_set_ack_timeout
-#define ah_getAckTimeout	ah_get_ack_timeout
-#define ah_setCTSTimeout	ah_set_cts_timeout
-#define ah_getCTSTimeout	ah_get_cts_timeout
-
-/*
- * Key table (WEP) functions
- */
-//is_cipher_supported
-#define ah_getKeyCacheSize	ah_get_keycache_size
-#define ah_resetKeyCacheEntry	ah_reset_key
-#define ah_isKeyCacheEntryValid	ah_is_key_valid
-#define ah_setKeyCacheEntry	ah_set_key
-#define ah_setKeyCacheEntryMac	ah_set_key_lladdr
-
-/*
- * Power management functions
- */
-#define ah_setPowerMode		ah_set_power
-#define ah_getPowerMode		ah_get_power_mode
-//query_pspoll_support
-#define ah_initPSPoll 		ah_init_pspoll
-#define ah_enablePSPoll		ah_enable_pspoll
-#define ah_disablePSPoll	ah_disable_pspoll
-#define ah_setTxPowerLimit	ah_set_txpower_limit
-
-/*
- * Beacon functions
- */
-#define ah_beaconInit			ah_init_beacon
-#define ah_setStationBeaconTimers	ah_set_beacon_timers
-#define ah_resetStationBeaconTimers	ah_reset_beacon
-#define ah_waitForBeaconDone		ah_wait_for_beacon
-
-/*
- * Interrupt functions
- */
-#define ah_isInterruptPending		ah_is_intr_pending
-#define ah_getPendingInterrupts		ah_get_isr
-#define ah_getInterrupts		ah_get_intr
-#define ah_setInterrupts		ah_set_intr
-
-/*
- * Chipset functions (ar5k-specific, non-HAL)
- */
-//get_capabilities
-#define ah_radarlert	ah_radar_alert
-
-/*
- * EEPROM access
- */
-//eeprom_is_busy
-//eeprom_read
-//eeprom_write
-
-#define ah_setPCUConfig		ah_set_pcu_config