commit ac1bb8018d8c92fec4915055f26a52ce4ac888f4
Author: Jiri Slaby <ku@bellona.localdomain>
Date:   Fri Jun 22 10:54:12 2007 +0200

    compute channels. this was hmm hard, very hard. also get rid of
    ath5k_channel (and use ieee80211_channel)

diff --git a/ath/if_ath.c b/ath/if_ath.c
index f342270..02518fe 100644
--- a/ath/if_ath.c
+++ b/ath/if_ath.c
@@ -69,13 +69,6 @@
 #include "ath5k.h"
 #include "ath_hw.h"
 
-#define KASSERT(exp, msg...) do {	\
-	if (unlikely(!(exp))) {		\
-		printk(msg);		\
-		BUG();			\
-	}				\
-} while (0)
-
 /* unaligned little endian access */
 #define LE_READ_2(_p) (le16_to_cpu(get_unaligned((__le16 *)(_p))))
 #define LE_READ_4(_p) (le32_to_cpu(get_unaligned((__le32 *)(_p))))
@@ -2999,84 +2992,6 @@ ath_descdma_cleanup(struct ath_softc *sc, struct list_head *head)
 #endif
 }
 
-static int
-ath_desc_alloc(struct ath_softc *sc)
-{
-#define	DS2PHYS(_sc, _ds) \
-	((_sc)->sc_desc_daddr + ((caddr_t)(_ds) - (caddr_t)(_sc)->sc_desc))
-	int bsize;
-	struct ath_desc *ds;
-	struct ath_buf *bf;
-	int i;
-
-	/* allocate descriptors */
-	sc->sc_desc_len = sizeof(struct ath_desc) *
-				(ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + ATH_BCBUF + 1);
-	barrier();	/* get_order() rounds down constants before Linux 2.6.21 */
-	sc->sc_desc = bus_alloc_consistent(sc->sc_bdev,
-				sc->sc_desc_len, &sc->sc_desc_daddr);
-	if (sc->sc_desc == NULL) {
-		printk(KERN_ERR "%s, could not allocate descriptors\n", __func__);
-		return ENOMEM;
-	}
-	ds = sc->sc_desc;
-	DPRINTF(sc, ATH_DEBUG_ANY, "%s: DMA map: %p (%u) -> %llx\n",
-		__func__, ds, (unsigned int) sc->sc_desc_len,
-		(unsigned long long)sc->sc_desc_daddr);
-
-	/* allocate buffers */
-	bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + ATH_BCBUF + 1);
-	bf = kmalloc(bsize, GFP_KERNEL);
-	if (bf == NULL)
-		goto bad;
-	memset(bf, 0, bsize);
-	sc->sc_bufptr = bf;
-
-//	STAILQ_INIT(&sc->sc_rxbuf);
-	for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
-		bf->bf_desc = ds;
-		bf->bf_daddr = DS2PHYS(sc, ds);
-//		STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
-	}
-
-//	STAILQ_INIT(&sc->sc_txbuf);
-	for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
-		bf->bf_desc = ds;
-		bf->bf_daddr = DS2PHYS(sc, ds);
-//		STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
-	}
-
-//	STAILQ_INIT(&sc->sc_bbuf);
-	for (i = 0; i < ATH_BCBUF; i++, bf++, ds++) {
-		bf->bf_desc = ds;
-		bf->bf_daddr = DS2PHYS(sc, ds);
-//		STAILQ_INSERT_TAIL(&sc->sc_bbuf, bf, bf_list);
-	}
-
-	return 0;
-bad:
-	bus_free_consistent(sc->sc_bdev, sc->sc_desc_len,
-		sc->sc_desc, sc->sc_desc_daddr);
-	sc->sc_desc = NULL;
-	return ENOMEM;
-#undef DS2PHYS
-}
-
-static void
-ath_desc_free(struct ath_softc *sc)
-{
-        ath_descdma_cleanup(sc, sc->sc_bbuf);
-        ath_descdma_cleanup(sc, sc->sc_txbuf);
-        ath_descdma_cleanup(sc, sc->sc_rxbuf);
-
-	/* Free memory associated with all descriptors */
-	bus_free_consistent(sc->sc_bdev, sc->sc_desc_len,
-		sc->sc_desc, sc->sc_desc_daddr);
-
-	kfree(sc->sc_bufptr);
-	sc->sc_bufptr = NULL;
-}
-
 #ifdef BLE
 static struct ieee80211_node *
 ath_node_alloc(struct ieee80211_node_table *nt)
@@ -5381,59 +5296,6 @@ ath_newassoc(struct ieee80211_node *ni, int isnew)
         }
 }
 #endif
-static int
-ath_getchannels(struct ieee80211_hw *hw, u_int cc,
-	bool outdoor, bool xchanmode)
-{
-	struct ath_softc *sc = hw->priv;
-	struct ath_hal *ah = sc->sc_ah;
-	struct ath5k_channel *chans;
-	int i, ix;
-	u_int nchan;
-#define IEEE80211_CHAN_MAX	255
-	chans = kmalloc(IEEE80211_CHAN_MAX * sizeof(struct ath5k_channel), GFP_KERNEL);
-	if (chans == NULL) {
-		printk(KERN_ERR "unable to allocate channel table\n");
-		return ENOMEM;
-	}
-	if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,
-	    cc, AR5K_MODE_ALL, outdoor, xchanmode)) {
-		u_int32_t rd;
-
-		ath_hal_getregdomain(ah, &rd);
-		printk(KERN_ERR "unable to collect channel list from hal; "
-			"regdomain likely %u country code %u\n", rd, cc);
-		kfree(chans);
-		return EINVAL;
-	}
-
-	/*
-	 * Convert HAL channels to ieee80211 ones and insert
-	 * them in the table according to their channel number.
-	 */
-	for (i = 0; i < nchan; i++) {
-		struct ath5k_channel *c = &chans[i];
-		ix = ath_hal_mhz2ieee(c->freq, c->channel_flags);
-		if (ix > IEEE80211_CHAN_MAX) {
-			printk(KERN_ERR "bad hal channel %u (%u/%x) ignored\n",
-				ix, c->freq, c->channel_flags);
-			continue;
-		}
-#ifdef BLE
-		/* NB: flags are known to be compatible */
-		if (ic->ic_channels[ix].ic_freq == 0) {
-			ic->ic_channels[ix].ic_freq = c->freq;
-			ic->ic_channels[ix].ic_flags = c->channel_flags;
-		} else {
-			/* channels overlap; e.g. 11g and 11b */
-			ic->ic_channels[ix].ic_flags |= c->channel_flags;
-		}
-#endif
-	}
-	kfree(chans);
-	return 0;
-#undef IEEE80211_CHAN_MAX
-}
 
 /*
  * Turn the LED off: flip the pin and then set a timer so no
@@ -5512,130 +5374,6 @@ ath_update_txpow(struct ath_softc *sc)
 #endif
 }
 
-static int
-ath_rate_setup(struct ieee80211_hw *dev, u_int mode)
-{
-	struct ath_softc *sc = dev->priv;
-	struct ath_hal *ah = sc->sc_ah;
-	const struct ath5k_rate_table *rt;
-//	struct ieee80211_rateset *rs;
-//	int i, maxrates;
-
-	switch (mode) {
-	case MODE_IEEE80211A:
-		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_11A);
-		break;
-	case MODE_IEEE80211B:
-		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_11B);
-		break;
-	case MODE_IEEE80211G:
-		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_11G);
-		break;
-	case MODE_ATHEROS_TURBO:
-		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_TURBO);
-		break;
-	case MODE_ATHEROS_TURBOG:
-		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_108G);
-		break;
-	default:
-		DPRINTF(sc, ATH_DEBUG_ANY, "%s: invalid mode %u\n",
-			__func__, mode);
-		return 0;
-	}
-	rt = sc->sc_rates[mode];
-	if (rt == NULL)
-		return 0;
-#ifdef BLE
-	if (rt->rate_count > IEEE80211_RATE_MAXSIZE) {
-		DPRINTF(sc, ATH_DEBUG_ANY,
-			"%s: rate table too small (%u > %u)\n",
-			__func__, rt->rate_count, IEEE80211_RATE_MAXSIZE);
-		maxrates = IEEE80211_RATE_MAXSIZE;
-	} else
-		maxrates = rt->rate_count;
-	rs = &ic->ic_sup_rates[mode];
-	for (i = 0; i < maxrates; i++)
-		rs->rs_rates[i] = rt->rates[i].dot11_rate;
-	rs->rs_nrates = maxrates;
-#endif
-	return 1;
-}
-
-static void
-ath_setcurmode(struct ath_softc *sc, unsigned int mode)
-{
-#define	N(a)	(sizeof(a)/sizeof(a[0]))
-	/* NB: on/off times from the Atheros NDIS driver, w/ permission */
-#ifdef BLE
-	static const struct {
-		u_int		rate;		/* tx/rx 802.11 rate */
-		u_int16_t	timeOn;		/* LED on time (ms) */
-		u_int16_t	timeOff;	/* LED off time (ms) */
-	} blinkrates[] = {
-		{ 108,  40,  10 },
-		{  96,  44,  11 },
-		{  72,  50,  13 },
-		{  48,  57,  14 },
-		{  36,  67,  16 },
-		{  24,  80,  20 },
-		{  22, 100,  25 },
-		{  18, 133,  34 },
-		{  12, 160,  40 },
-		{  10, 200,  50 },
-		{   6, 240,  58 },
-		{   4, 267,  66 },
-		{   2, 400, 100 },
-		{   0, 500, 130 },
-	};
-#endif
-	const struct ath5k_rate_table *rt;
-//	int i, j;
-
-	memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
-	rt = sc->sc_rates[mode];
-	KASSERT(rt != NULL, "no h/w rate set for phy mode %u", mode);
-#ifdef BLE
-	for (i = 0; i < rt->rate_count; i++)
-		sc->sc_rixmap[rt->rates[i].dot11_rate & IEEE80211_RATE_VAL] = i;
-	memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
-	for (i = 0; i < 32; i++) {
-		u_int8_t ix = rt->rate_code_to_index[i];
-		if (ix == 0xff) {
-			sc->sc_hwmap[i].ledon = (500 * HZ) / 1000;
-			sc->sc_hwmap[i].ledoff = (130 * HZ) / 1000;
-			continue;
-		}
-		sc->sc_hwmap[i].ieeerate =
-			rt->rates[ix].dot11_rate & IEEE80211_RATE_VAL;
-		sc->sc_hwmap[i].txflags = IEEE80211_RADIOTAP_F_DATAPAD;
-		if (SHPREAMBLE_FLAG(ix) ||
-		    rt->rates[ix].modulation == MODULATION_OFDM)
-			sc->sc_hwmap[i].txflags |= IEEE80211_RADIOTAP_F_SHORTPRE;
-		/* NB: receive frames include FCS */
-		sc->sc_hwmap[i].rxflags = sc->sc_hwmap[i].txflags |
-			IEEE80211_RADIOTAP_F_FCS;
-		/* setup blink rate table to avoid per-packet lookup */
-		for (j = 0; j < N(blinkrates)-1; j++)
-			if (blinkrates[j].rate == sc->sc_hwmap[i].ieeerate)
-				break;
-		/* NB: this uses the last entry if the rate isn't found */
-		/* XXX beware of overlow */
-		sc->sc_hwmap[i].ledon = (blinkrates[j].timeOn * HZ) / 1000;
-		sc->sc_hwmap[i].ledoff = (blinkrates[j].timeOff * HZ) / 1000;
-	}
-#endif
-	sc->sc_currates = rt;
-	sc->sc_curmode = mode;
-	/*
-	 * All protection frames are transmited at 2Mb/s for
-	 * 11g, otherwise at 1Mb/s.
-	 * XXX select protection rate index from rate table.
-	 */
-	sc->sc_protrix = ((mode == MODE_IEEE80211G || mode == MODE_ATHEROS_TURBOG) ? 1 : 0);
-	/* NB: caller is responsible for reseting rate control state */
-#undef N
-}
-
 #ifdef BLE
 static int
 ath_rawdev_attach(struct ath_softc *sc) 
diff --git a/ath/if_ath_pci.c b/ath/if_ath_pci.c
index 2ec4b0c..6a65fe7 100644
--- a/ath/if_ath_pci.c
+++ b/ath/if_ath_pci.c
@@ -37,6 +37,15 @@
 #include "if_athvar.h"
 #include "if_ath_pci.h"
 
+#define ATH_DEBUG_MODES		0 /* Show found modes in the log? */
+
+#define KASSERT(exp, msg...) do {	\
+	if (unlikely(!(exp))) {		\
+		printk(msg);		\
+		BUG();			\
+	}				\
+} while (0)
+
 #define	DPRINTF(sc, _m, _fmt...) do {	\
 	if (sc->sc_debug & (_m))	\
 		printk(_fmt);		\
@@ -136,18 +145,6 @@ static inline void ath_hw_reg_write(struct ath_hw *hw, u32 val, u16 reg)
 }
 
 #define ATH_HW_IRQ_PENDING		0x4008
-# define ATH_HW_IRQ_PENDING_FALSE	0
-# define ATH_HW_IRQ_PENDING_TRUE	1
-
-/*
- * Check if there is an interrupt waiting to be processed.
- * Return 1 if there is an interrupt for us, or 0 if there is none or if
- * the device has been removed.
- */
-static inline int ath_hw_irq_pending(struct ath_hw *hw)
-{
-	return ath_hw_reg_read(hw, ATH_HW_IRQ_PENDING) == ATH_HW_IRQ_PENDING_TRUE;
-}
 
 /*
  * Interrupt handler.  Most of the actual processing is deferred.
@@ -168,10 +165,9 @@ static irqreturn_t ath_intr(int irq, void *dev_id)
 		DPRINTF(sc, ATH_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
 		return IRQ_NONE;
 	}
-	return IRQ_HANDLED;
-
-	if (!ath_hw_irq_pending(ah))		/* shared irq, not for us */
+	if (!ath_hw_reg_read(ah, ATH_HW_IRQ_PENDING))
 		return IRQ_NONE;
+return IRQ_HANDLED;
 	if ((dev->flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
 		DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags 0x%x\n",
 			__func__, dev->flags);
@@ -260,14 +256,413 @@ static irqreturn_t ath_intr(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
+/*
+ * Convert IEEE channel number to MHz frequency.
+ */
+static inline short ath_ieee2mhz(short chan)
+{
+	if (chan <= 14 || chan >= 27)
+		return ieee80211chan2mhz(chan);
+	else
+		return 2212 + chan * 20;
+}
+
+static inline unsigned int ath_copy_rates(struct ieee80211_rate *rates,
+		const struct ath5k_rate_table *rt)
+{
+	unsigned int i;
+
+	for (i = 0; i < rt->rate_count; i++, rates++) {
+		rates->rate = rt->rates[i].rate_kbps / 100;
+		rates->val = rt->rates[i].rate_code;
+		rates->flags = rt->rates[i].modulation;
+	}
+
+	return i;
+}
+
+#if ATH_DEBUG_MODES
+static void ath_dump_modes(struct ieee80211_hw_mode *modes)
+{
+	unsigned int m, i;
+
+	for (m = 0; m < NUM_IEEE80211_MODES; m++) {
+		printk(KERN_DEBUG "Mode %u: channels %d, rates %d\n", m,
+				modes[m].num_channels, modes[m].num_rates);
+		printk(KERN_DEBUG " channels:\n");
+		for (i = 0; i < modes[m].num_channels; i++) {
+			printk(KERN_DEBUG "  %3d %d %.4x %.4x\n",
+					modes[m].channels[i].chan,
+					modes[m].channels[i].freq,
+					modes[m].channels[i].val,
+					modes[m].channels[i].flag);
+		}
+		printk(KERN_DEBUG " rates:\n");
+		for (i = 0; i < modes[m].num_rates; i++) {
+			printk(KERN_DEBUG "  %4d %.4x %.4x %.4x\n",
+					modes[m].rates[i].rate,
+					modes[m].rates[i].val,
+					modes[m].rates[i].flags,
+					modes[m].rates[i].val2);
+		}
+	}
+}
+#else
+static inline void ath_dump_modes(struct ieee80211_hw_mode *modes) {}
+#endif
+
+static int ath_getchannels(struct ieee80211_hw *hw)
+{
+	struct ath_softc *sc = hw->priv;
+	struct ath_hw *ah = sc->ah;
+	struct ieee80211_hw_mode *modes = sc->modes;
+	u32 domain_current = ah->ah_regdomain;
+	unsigned int i, c, domain_5ghz, domain_2ghz;
+	int ret;
+	enum {
+		A = 0,
+		B = 1,
+		G = 2,
+		T = 3,
+		TG = 4,
+	};
+
+	ah->ah_country_code = countrycode;
+
+	modes[A].mode = MODE_IEEE80211A;
+	modes[A].channels = sc->channels;
+	modes[B].mode = MODE_IEEE80211B;
+	modes[B].channels = sc->channels;
+	modes[G].mode = MODE_IEEE80211G;
+	modes[G].channels = sc->channels;
+
+	modes[A].rates = sc->rates;
+	modes[A].num_rates = ath_copy_rates(modes[A].rates,
+			ath5k_hw_get_rate_table(ah, AR5K_MODE_11A));
+	modes[B].rates = &modes[A].rates[modes[A].num_rates];
+	modes[B].num_rates = ath_copy_rates(modes[B].rates,
+			ath5k_hw_get_rate_table(ah, AR5K_MODE_11B));
+	modes[G].rates = &modes[B].rates[modes[B].num_rates];
+	modes[G].num_rates = ath_copy_rates(modes[G].rates,
+			ath5k_hw_get_rate_table(ah, AR5K_MODE_11G));
+
+	/*
+	 * In debugging mode, enable all channels supported by the chipset
+	 */
+	if (domain_current == DMN_DEFAULT || CHAN_DEBUG == 1) {
+		short freq;
+
+		/* channel 1 -2412MHz .. channel 26 (non-ieee) -2732MHz */
+		for (i = 1, c = 0; i <= 26 && c < ATH_CHAN_MAX; i++) {
+			freq = ath_ieee2mhz(i);
+			if (ath5k_check_channel(ah, freq,CHANNEL_2GHZ) == false)
+				continue;
+			sc->channels[c].chan = i;
+			sc->channels[c].freq = freq;
+			sc->channels[c].val = CHANNEL_B | CHANNEL_G;
+			c++;
+		}
+		modes[B].num_channels = c;
+		modes[G].num_channels = c;
+
+		for (i = 27; i <= 220 && c < ATH_CHAN_MAX; i++) {
+			freq = ath_ieee2mhz(i);
+			if (ath5k_check_channel(ah, freq,CHANNEL_5GHZ) == false)
+				continue;
+			sc->channels[c].chan = i;
+			sc->channels[c].freq = freq;
+			sc->channels[c].val = CHANNEL_A | CHANNEL_T| CHANNEL_XR;
+			c++;
+		}
+		modes[A].channels += modes[B].num_channels; /* skip B/G chans */
+		modes[A].num_channels = c - modes[B].num_channels;
+
+		goto end;
+	}
+
+	domain_5ghz = ieee80211_regdomain2flag(domain_current,
+	    IEEE80211_CHANNELS_5GHZ_MIN);
+	domain_2ghz = ieee80211_regdomain2flag(domain_current,
+	    IEEE80211_CHANNELS_2GHZ_MIN);
+#if 0
+	/*
+	 * Create channel list based on chipset capabilities, regulation domain
+	 * and mode. 5GHz...
+	 */
+	for (i = 0; hal->ah_capabilities.cap_range.range_5ghz_max > 0 &&
+			i < ARRAY_SIZE(ath5k_5ghz_channels) &&
+			c < max_channels; i++) {
+		/* Check if channel is supported by the chipset */
+		if (ath5k_check_channel(hal, ath5k_5ghz_channels[i].rc_channel,
+				CHANNEL_5GHZ) == false)
+			continue;
+
+		/* Match regulation domain */
+		if ((IEEE80211_DMN(ath5k_5ghz_channels[i].rc_domain) &
+				IEEE80211_DMN(domain_5ghz)) == 0)
+			continue;
+
+		/* Match modes */
+		if (ath5k_5ghz_channels[i].rc_mode & CHANNEL_TURBO)
+			all_channels[c].channel_flags = CHANNEL_T;
+		else if (ath5k_5ghz_channels[i].rc_mode & CHANNEL_OFDM)
+			all_channels[c].channel_flags = CHANNEL_A;
+		else
+			continue;
+
+		/* Write channel and increment counter */
+		all_channels[c++].freq = ath5k_5ghz_channels[i].rc_channel;
+	}
+
+	/*
+	 * ...and 2GHz.
+	 */
+	for (i = 0; hal->ah_capabilities.cap_range.range_2ghz_max > 0 &&
+			i < ARRAY_SIZE(ath5k_2ghz_channels) &&
+			c < max_channels; i++) {
+		/* Check if channel is supported by the chipset */
+		if (ath5k_check_channel(hal, ath5k_2ghz_channels[i].rc_channel,
+				CHANNEL_2GHZ) == false)
+			continue;
+
+		/* Match regulation domain */
+		if ((IEEE80211_DMN(ath5k_2ghz_channels[i].rc_domain) &
+				IEEE80211_DMN(domain_2ghz)) == 0)
+			continue;
+
+		/* Match modes */
+		if ((hal->ah_capabilities.cap_mode & AR5K_MODE_11B) &&
+				(ath5k_2ghz_channels[i].rc_mode & CHANNEL_CCK))
+			all_channels[c].channel_flags = CHANNEL_B;
+
+		if ((hal->ah_capabilities.cap_mode & AR5K_MODE_11G) &&
+				(ath5k_2ghz_channels[i].rc_mode &CHANNEL_OFDM)){
+			all_channels[c].channel_flags |= CHANNEL_G;
+/*			if (ath5k_2ghz_channels[i].rc_mode & CHANNEL_TURBO)
+				all_channels[c].channel_flags |= CHANNEL_TG;*/
+		}
+
+		/* Write channel and increment counter */
+		all_channels[c++].freq = ath5k_2ghz_channels[i].rc_channel;
+	}
+#endif
+end:
+	ret = ieee80211_register_hwmode(hw, modes);
+	if (ret) {
+		printk(KERN_ERR "can't register hwmodes\n");
+		goto err;
+	}
+	ath_dump_modes(modes);
+
+	return 0;
+err:
+	return ret;
+}
+#if 0
+static int ath_rate_setup(struct ieee80211_hw *dev, u_int mode)
+{
+	struct ath_softc *sc = dev->priv;
+	struct ath_hw *ah = sc->ah;
+	const struct ath5k_rate_table *rt;
+//	struct ieee80211_rateset *rs;
+//	int i, maxrates;
+
+	switch (mode) {
+	case MODE_IEEE80211A:
+		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_11A);
+		break;
+	case MODE_IEEE80211B:
+		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_11B);
+		break;
+	case MODE_IEEE80211G:
+		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_11G);
+		break;
+	case MODE_ATHEROS_TURBO:
+		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_TURBO);
+		break;
+	case MODE_ATHEROS_TURBOG:
+		sc->sc_rates[mode] = ath5k_hw_get_rate_table(ah, AR5K_MODE_108G);
+		break;
+	default:
+		DPRINTF(sc, ATH_DEBUG_ANY, "%s: invalid mode %u\n",
+			__func__, mode);
+		return 0;
+	}
+	rt = sc->sc_rates[mode];
+	if (rt == NULL)
+		return 0;
+#ifdef BLE
+	if (rt->rate_count > IEEE80211_RATE_MAXSIZE) {
+		DPRINTF(sc, ATH_DEBUG_ANY,
+			"%s: rate table too small (%u > %u)\n",
+			__func__, rt->rate_count, IEEE80211_RATE_MAXSIZE);
+		maxrates = IEEE80211_RATE_MAXSIZE;
+	} else
+		maxrates = rt->rate_count;
+	rs = &ic->ic_sup_rates[mode];
+	for (i = 0; i < maxrates; i++)
+		rs->rs_rates[i] = rt->rates[i].dot11_rate;
+	rs->rs_nrates = maxrates;
+#endif
+	return 1;
+}
+
+static void ath_setcurmode(struct ath_softc *sc, unsigned int mode)
+{
+	/* NB: on/off times from the Atheros NDIS driver, w/ permission */
+#ifdef BLE
+	static const struct {
+		u_int		rate;		/* tx/rx 802.11 rate */
+		u_int16_t	timeOn;		/* LED on time (ms) */
+		u_int16_t	timeOff;	/* LED off time (ms) */
+	} blinkrates[] = {
+		{ 108,  40,  10 },
+		{  96,  44,  11 },
+		{  72,  50,  13 },
+		{  48,  57,  14 },
+		{  36,  67,  16 },
+		{  24,  80,  20 },
+		{  22, 100,  25 },
+		{  18, 133,  34 },
+		{  12, 160,  40 },
+		{  10, 200,  50 },
+		{   6, 240,  58 },
+		{   4, 267,  66 },
+		{   2, 400, 100 },
+		{   0, 500, 130 },
+	};
+#endif
+	const struct ath5k_rate_table *rt;
+//	int i, j;
+
+	memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
+	rt = sc->sc_rates[mode];
+	KASSERT(rt != NULL, "no h/w rate set for phy mode %u", mode);
+#ifdef BLE
+	for (i = 0; i < rt->rate_count; i++)
+		sc->sc_rixmap[rt->rates[i].dot11_rate & IEEE80211_RATE_VAL] = i;
+	memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
+	for (i = 0; i < 32; i++) {
+		u_int8_t ix = rt->rate_code_to_index[i];
+		if (ix == 0xff) {
+			sc->sc_hwmap[i].ledon = (500 * HZ) / 1000;
+			sc->sc_hwmap[i].ledoff = (130 * HZ) / 1000;
+			continue;
+		}
+		sc->sc_hwmap[i].ieeerate =
+			rt->rates[ix].dot11_rate & IEEE80211_RATE_VAL;
+		sc->sc_hwmap[i].txflags = IEEE80211_RADIOTAP_F_DATAPAD;
+		if (SHPREAMBLE_FLAG(ix) ||
+		    rt->rates[ix].modulation == MODULATION_OFDM)
+			sc->sc_hwmap[i].txflags |= IEEE80211_RADIOTAP_F_SHORTPRE;
+		/* NB: receive frames include FCS */
+		sc->sc_hwmap[i].rxflags = sc->sc_hwmap[i].txflags |
+			IEEE80211_RADIOTAP_F_FCS;
+		/* setup blink rate table to avoid per-packet lookup */
+		for (j = 0; j < N(blinkrates)-1; j++)
+			if (blinkrates[j].rate == sc->sc_hwmap[i].ieeerate)
+				break;
+		/* NB: this uses the last entry if the rate isn't found */
+		/* XXX beware of overlow */
+		sc->sc_hwmap[i].ledon = (blinkrates[j].timeOn * HZ) / 1000;
+		sc->sc_hwmap[i].ledoff = (blinkrates[j].timeOff * HZ) / 1000;
+	}
+#endif
+	sc->sc_currates = rt;
+	sc->sc_curmode = mode;
+	/*
+	 * All protection frames are transmited at 2Mb/s for
+	 * 11g, otherwise at 1Mb/s.
+	 * XXX select protection rate index from rate table.
+	 */
+	sc->sc_protrix = ((mode == MODE_IEEE80211G || mode == MODE_ATHEROS_TURBOG) ? 1 : 0);
+	/* NB: caller is responsible for reseting rate control state */
+}
+
+static int ath_desc_alloc(struct ath_softc *sc)
+{
+#define	DS2PHYS(_sc, _ds) \
+	((_sc)->sc_desc_daddr + ((caddr_t)(_ds) - (caddr_t)(_sc)->sc_desc))
+	int bsize;
+	struct ath_desc *ds;
+	struct ath_buf *bf;
+	int i;
+
+	/* allocate descriptors */
+	sc->sc_desc_len = sizeof(struct ath_desc) *
+				(ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + ATH_BCBUF + 1);
+	barrier();	/* get_order() rounds down constants before Linux 2.6.21 */
+	sc->sc_desc = bus_alloc_consistent(sc->sc_bdev,
+				sc->sc_desc_len, &sc->sc_desc_daddr);
+	if (sc->sc_desc == NULL) {
+		printk(KERN_ERR "%s, could not allocate descriptors\n", __func__);
+		return ENOMEM;
+	}
+	ds = sc->sc_desc;
+	DPRINTF(sc, ATH_DEBUG_ANY, "%s: DMA map: %p (%u) -> %llx\n",
+		__func__, ds, (unsigned int) sc->sc_desc_len,
+		(unsigned long long)sc->sc_desc_daddr);
+
+	/* allocate buffers */
+	bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + ATH_BCBUF + 1);
+	bf = kmalloc(bsize, GFP_KERNEL);
+	if (bf == NULL)
+		goto bad;
+	memset(bf, 0, bsize);
+	sc->sc_bufptr = bf;
+
+//	STAILQ_INIT(&sc->sc_rxbuf);
+	for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
+		bf->bf_desc = ds;
+		bf->bf_daddr = DS2PHYS(sc, ds);
+//		STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
+	}
+
+//	STAILQ_INIT(&sc->sc_txbuf);
+	for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
+		bf->bf_desc = ds;
+		bf->bf_daddr = DS2PHYS(sc, ds);
+//		STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
+	}
+
+//	STAILQ_INIT(&sc->sc_bbuf);
+	for (i = 0; i < ATH_BCBUF; i++, bf++, ds++) {
+		bf->bf_desc = ds;
+		bf->bf_daddr = DS2PHYS(sc, ds);
+//		STAILQ_INSERT_TAIL(&sc->sc_bbuf, bf, bf_list);
+	}
+
+	return 0;
+bad:
+	bus_free_consistent(sc->sc_bdev, sc->sc_desc_len,
+		sc->sc_desc, sc->sc_desc_daddr);
+	sc->sc_desc = NULL;
+	return -ENOMEM;
+#undef DS2PHYS
+}
+
+static void ath_desc_free(struct ath_softc *sc)
+{
+        ath_descdma_cleanup(sc, sc->sc_bbuf);
+        ath_descdma_cleanup(sc, sc->sc_txbuf);
+        ath_descdma_cleanup(sc, sc->sc_rxbuf);
+
+	/* Free memory associated with all descriptors */
+	bus_free_consistent(sc->sc_bdev, sc->sc_desc_len,
+		sc->sc_desc, sc->sc_desc_daddr);
+
+	kfree(sc->sc_bufptr);
+	sc->sc_bufptr = NULL;
+}
+#endif
 static int ath_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
 {
 	struct ath_softc *sc = hw->priv;
 	struct ath_hw *ah = sc->ah;
-	int error = 0, i;
+	unsigned int i;
+	int ret;
 
 	DPRINTF(sc, ATH_DEBUG_ANY, "%s: devid 0x%x\n", __func__, pdev->device);
-	return 0;
 
 	/*
 	 * Check if the MAC has multi-rate retry support.
@@ -279,22 +674,9 @@ static int ath_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
 	sc->sc_mrretry = ah->ah_setup_xtx_desc(ah, NULL, 0, 0, 0, 0, 0, 0);
 
 	/*
-	 * Check if the device has hardware counters for PHY
-	 * errors.  If so we need to enable the MIB interrupt
-	 * so we can act on stat triggers.
-	 */
-	if (ath_hal_hwphycounters(ah))
-		sc->sc_needmib = 1;
-
-	/*
 	 * Get the hardware key cache size.
 	 */
-	sc->sc_keymax = ath5k_hw_get_keycache_size(ah);
-	if (sc->sc_keymax > ATH_KEYMAX) {
-		printk(KERN_WARNING "Warning, using only %u of %u key cache "
-				"slots\n", ATH_KEYMAX, sc->sc_keymax);
-		sc->sc_keymax = ATH_KEYMAX;
-	}
+	sc->sc_keymax = AR5K_KEYCACHE_SIZE;
 
 	/*
 	 * Reset the key cache since some parts do not
@@ -315,19 +697,19 @@ static int ath_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
 		setbit(sc->sc_keymap, i+64);
 		setbit(sc->sc_keymap, i+32+64);
 	}
-
+#endif
 	/*
 	 * Collect the channel list using the default country
 	 * code and including outdoor channels.  The 802.11 layer
 	 * is resposible for filtering this list based on settings
 	 * like the phy mode.
 	 */
-	error = ath_getchannels(hw, countrycode, outdoor, xchanmode);
-	if (error != 0) {
-		printk("error! but continuing anyways...\n");
-		//goto bad;
+	ret = ath_getchannels(hw);
+	if (ret) {
+		dev_err(&pdev->dev, "can't get channels\n");
+		goto err;
 	}
-	
+#ifdef BLE
 	/*
 	 * Setup rate tables for all potential media types.
 	 */
@@ -342,8 +724,8 @@ static int ath_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
 	/*
 	 * Allocate tx+rx descriptors and populate the lists.
 	 */
-	error = ath_desc_alloc(sc);
-	if (error != 0) {
+	ret = ath_desc_alloc(sc);
+	if (ret) {
 		printk(KERN_ERR "failed to allocate descriptors: %d\n", error);
 		goto bad;
 	}
@@ -367,8 +749,7 @@ static int ath_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
 		error = EIO;
 		goto bad2;
 	}
-#endif
-#ifdef BLE
+
 	/* NB: insure BK queue is the lowest priority h/w queue */
 	if (!ath_tx_setup(sc, WME_AC_BK, AR5K_WME_AC_BK)) {
 		printk(KERN_ERR "unable to setup xmit queue for %s traffic!\n",
@@ -551,7 +932,6 @@ static int ath_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
 	 * 32-bit boundary for 4-address and QoS frames.
 	 */
 	ic->ic_flags |= IEEE80211_F_DATAPAD;
-#endif
 
 	/*
 	 * Query the hal about antenna support.
@@ -569,7 +949,7 @@ static int ath_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
 	/* get mac address from hardware */
 //	ath_hal_getmac(ah, ic->ic_myaddr); BLEE
 //	IEEE80211_ADDR_COPY(dev->dev_addr, ic->ic_myaddr);
-#ifdef BLE
+
 	/* call MI attach routine. */
 	ieee80211_ifattach(ic);
 	/* override default methods */
@@ -588,8 +968,7 @@ static int ath_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
 	ic->ic_crypto.cs_key_update_end = ath_key_update_end;
 
 	radar_init(ic);
-#endif
-#if 0
+
 	/* complete initialization */
 	ieee80211_media_init(ic, ath_media_change, ieee80211_media_status);
 
@@ -598,14 +977,14 @@ static int ath_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
 		goto bad3;
 	}
 
-#endif
 	/*
 	 * Attach dynamic MIB vars and announce support
 	 * now that we have a device name with unit number.
 	 */
-//	ath_dynamic_sysctl_register(sc);
-//	ath_rate_dynamic_sysctl_register(sc);
-//	ath_announce(sc);
+	ath_dynamic_sysctl_register(sc);
+	ath_rate_dynamic_sysctl_register(sc);
+	ath_announce(sc);
+#endif
 
 	return 0;
 #ifdef BLE
@@ -628,7 +1007,8 @@ bad2:
 	ath_tx_cleanup(sc);
 	ath_desc_free(sc);
 #endif
-	return error;
+err:
+	return ret;
 }
 
 static void ath_detach(struct ieee80211_hw *hw)
diff --git a/ath/if_athvar.h b/ath/if_athvar.h
index decb45a..7260f79 100644
--- a/ath/if_athvar.h
+++ b/ath/if_athvar.h
@@ -50,10 +50,6 @@
 #include "if_athioctl.h"
 #include "if_athrate.h"
 
-#ifndef ARPHRD_IEEE80211_RADIOTAP
-#define ARPHRD_IEEE80211_RADIOTAP 803 /* IEEE 802.11 + radiotap header */
-#endif /* ARPHRD_IEEE80211_RADIOTAP */
-
 #define	ATH_TIMEOUT		1000
 
 /*
@@ -83,8 +79,8 @@
  * Different parts have different size key caches.  We handle
  * up to ATH_KEYMAX entries (could dynamically allocate state).
  */
-#define ATH_KEYMAX      128             /* max key cache size we handle */
-#define ATH_KEYBYTES    (ATH_KEYMAX/NBBY)       /* storage space in bytes */
+#define ATH_KEYMAX      AR5K_KEYCACHE_SIZE /* max key cache size we handle */
+#define ATH_KEYBYTES    (ATH_KEYMAX/NBBY)  /* storage space in bytes */
 
 /* driver-specific node state */
 struct ath_node {
@@ -173,18 +169,25 @@ struct ath_txq {
 	(_tq)->axq_depth--; \
 } while (0)
 
+#define ATH_CHAN_MAX	255	/* XXX what's the max? */
+
 struct ath_softc {
 	void __iomem		*iobase;	/* address of the device */
 	struct mutex		lock;		/* dev-level lock */
 //	struct net_device_stats	sc_devstats;	/* device statistics */
 	struct ath_stats	sc_stats;	/* private statistics */
 	struct ieee80211_hw	*hw;		/* IEEE 802.11 common */
+	struct ieee80211_hw_mode modes[NUM_IEEE80211_MODES];
+	struct ieee80211_channel channels[ATH_CHAN_MAX];
+	struct ieee80211_rate	rates[AR5K_MAX_RATES * NUM_IEEE80211_MODES];
 	struct ath_hw		*ah;		/* Atheros HW */
-
+#ifdef BLE
 	enum ieee80211_if_types	sc_opmode;
 	int			sc_regdomain;
 	int			sc_countrycode;
+#endif
 	int			sc_debug;
+
 #ifdef BLE
 	void			(*sc_recv_mgmt)(struct ieee80211com *,
 					struct sk_buff *,
@@ -193,16 +196,20 @@ struct ath_softc {
 	int			(*sc_newstate)(struct ieee80211com *,
 					enum ieee80211_state, int);
 	void 			(*sc_node_free)(struct ieee80211_node *);
-#endif
 	struct ath_desc		*sc_desc;	/* TX/RX descriptors */
 	size_t			sc_desc_len;	/* size of TX/RX descriptors */
+#endif
 	u16			sc_cachelsz;	/* cache line size */
+#ifdef BLE
 	dma_addr_t		sc_desc_daddr;	/* DMA (physical) address */
 	struct ath_ratectrl	*sc_rc;		/* tx rate control support */
 	void			(*sc_setdefantenna)(struct ath_softc *, u_int);
+#endif
 	unsigned int		sc_invalid : 1,	/* disable hardware accesses */
 				sc_mrretry : 1,	/* multi-rate retry support */
 				sc_softled : 1,	/* enable LED gpio status */
+				xxx:1;
+#ifdef BLE
 				sc_splitmic: 1,	/* split TKIP MIC keys */
 				sc_needmib : 1,	/* enable MIB stats intr */
 				sc_diversity : 1,/* enable rx diversity */
@@ -218,7 +225,7 @@ struct ath_softc {
 	const struct ath5k_rate_table	*sc_currates;	/* current rate table */
 	unsigned int		sc_curmode;	/* current phy mode */
 	u16			sc_curtxpow;	/* current tx power limit */
-	struct ath5k_channel	sc_curchan;	/* current h/w channel */
+	struct ieee80211_channel sc_curchan;	/* current h/w channel */
 	u8			sc_rixmap[256];	/* IEEE to h/w rate table ix */
 	struct {
 		u8	ieeerate;	/* IEEE rate */
@@ -229,14 +236,15 @@ struct ath_softc {
 	} sc_hwmap[32];				/* h/w rate ix mappings */
 	u8			sc_protrix;	/* protection rate index */
 	u_int			sc_txantenna;	/* tx antenna (fixed or auto) */
+#endif
 	enum ath5k_int		sc_imask;	/* interrupt mask copy */
 	u_int			sc_keymax;	/* size of key cache */
 #ifdef BLE
 	u8               	sc_keymap[ATH_KEYBYTES];/* key use bit map */
 	struct ieee80211_node   *sc_keyixmap[ATH_KEYMAX];/* key ix->node map */
 #endif
-
 	u_int			sc_ledpin;	/* GPIO pin for driving LED */
+#ifdef BLE
 	u_int			sc_ledon;	/* pin setting for LED on */
 	u_int			sc_ledidle;	/* idle polling interval */
 	int			sc_ledevent;	/* time of last LED event */
@@ -256,26 +264,33 @@ struct ath_softc {
 		u8		pad[64];
 	} u_rx_rt;
 	int			sc_rx_th_len;
-
+#endif
 	struct tasklet_struct	sc_fataltq;	/* fatal int tasklet */
+#ifdef BLE
 	struct tasklet_struct	sc_radartq;	/* Radar detection */
 
 	int			sc_rxbufsize;	/* rx size based on mtu */
 	struct list_head	*sc_rxbuf;	/* receive buffer */
-	u32			*sc_rxlink;	/* link ptr in last RX desc */
+#endif
 	struct tasklet_struct	sc_rxtq;	/* rx intr tasklet */
 	struct tasklet_struct	sc_rxorntq;	/* rxorn intr tasklet */
+	u32			*sc_rxlink;	/* link ptr in last RX desc */
+#ifdef BLE
 	u8			sc_defant;	/* current default antenna */
 	u8			sc_rxotherant;	/* rx's on non-default antenna*/
 
 	struct list_head	*sc_txbuf;	/* transmit buffer */
+#endif
 	spinlock_t		sc_txbuflock;	/* txbuf lock */
+#ifdef BLE
 	int			sc_tx_timer;	/* transmit timeout */
 	u_int			sc_txqsetup;	/* h/w queues setup */
 	u_int			sc_txintrperiod;/* tx interrupt batching */
 	struct ath_txq		sc_txq[AR5K_NUM_TX_QUEUES];
 	struct ath_txq		*sc_ac2q[5];	/* WME AC -> h/w q map */ 
+#endif
 	struct tasklet_struct	sc_txtq;	/* tx intr tasklet */
+#ifdef BLE
 
 	struct list_head	*sc_bbuf;	/* beacon buffers */
 	u_int			sc_bhalq;	/* HAL q for outgoing beacons */
@@ -286,7 +301,9 @@ struct ath_softc {
 #ifdef BLE
 	struct ieee80211_beacon_offsets sc_boff;/* dynamic update state */
 #endif
+#endif
 	struct tasklet_struct	sc_bmisstq;	/* bmiss intr tasklet */
+#ifdef BLE
 	struct tasklet_struct	sc_bstuckq;	/* stuck beacon processing */
 	enum {
 		OK,				/* no change needed */
@@ -299,6 +316,7 @@ struct ath_softc {
 	struct iw_statistics	sc_iwstats;	/* wireless statistics block */
 	struct ctl_table_header	*sc_sysctl_header;
 	struct ctl_table	*sc_sysctls;
+#endif
 };
 
 #define	ATH_TXQ_SETUP(sc, i)	((sc)->sc_txqsetup & (1<<i))
@@ -316,8 +334,6 @@ void	ath_sysctl_unregister(void);
 
 #define	ath_hal_ciphersupported(_ah, _cipher) \
 	(ath5k_hw_get_capability(_ah, AR5K_CAP_CIPHER, _cipher, NULL) == 0)
-#define	ath_hal_getregdomain(_ah, _prd) \
-	ath5k_hw_get_capability(_ah, AR5K_CAP_REG_DMN, 0, (_prd))
 #define	ath_hal_getcountrycode(_ah, _pcc) \
 	(*(_pcc) = (_ah)->ah_country_code)
 #define	ath_hal_tkipsplit(_ah) \
diff --git a/openhal/ath5k.h b/openhal/ath5k.h
index f40d7ec..731f5a8 100644
--- a/openhal/ath5k.h
+++ b/openhal/ath5k.h
@@ -37,7 +37,7 @@
  * WARNING: This is for debuging only and has side effects (eg. scan takes too long
  * and results timeouts). It's also illegal to tune to some of the supported frequencies
  * in some countries, so use this at your own risk, you 've been warned. */
-#define CHAN_DEBUG	0
+#define CHAN_DEBUG	1
 
 /* Uncomment this for debuging (warning that results TOO much output) */
 /*#define AR5K_DEBUG	1 */
@@ -572,15 +572,6 @@ struct ath_desc {
 			 AR5K_MODE_108G	 |	\
 			 AR5K_MODE_XR)
 
-/*
- * Channel definitions
- */
-struct ath5k_channel {
-	u16	freq;		/* setting in Mhz */
-	u16	channel_flags;
-	u8	private_flags;	/* not used in OpenHAL yet*/
-};
-
 #define AR5K_SLOT_TIME_9	396
 #define AR5K_SLOT_TIME_20	880
 #define AR5K_SLOT_TIME_MAX	0xffff
@@ -613,13 +604,13 @@ struct ath5k_channel {
 
 /*
  * Used internaly in OpenHAL (ar5211.c/ar5212.c
- * for reset_tx_queue). Also see struct struct ath5k_channel.
+ * for reset_tx_queue). Also see struct struct ieee80211_channel.
  */
 #define IS_CHAN_XR(_c) \
-        ((_c.channel_flags & CHANNEL_XR) != 0)
+        ((_c.val & CHANNEL_XR) != 0)
 
 #define IS_CHAN_B(_c) \
-        ((_c.channel_flags & CHANNEL_B) != 0)
+        ((_c.val & CHANNEL_B) != 0)
 
 enum ath5k_chip{
 	AR5K_CHIP_5GHZ = CHANNEL_5GHZ,
@@ -763,6 +754,8 @@ struct ath5k_keyval {
 	u8	wk_mic[8];	/* TKIP MIC key */
 };
 
+#define AR5K_KEYCACHE_SIZE	8
+
 /***********************\
  HW RELATED DEFINITIONS
 \***********************/
@@ -952,7 +945,7 @@ struct ath_hw {
 
 	enum ieee80211_if_types	ah_op_mode;
 	enum ath5k_power_mode	ah_power_mode;
-	struct ath5k_channel		ah_current_channel;
+	struct ieee80211_channel ah_current_channel;
 	bool			ah_turbo;
 	bool			ah_calibration;
 	bool			ah_running;
@@ -1021,7 +1014,7 @@ struct ath_hw {
 	struct {
 		bool		r_enabled;
 		int		r_last_alert;
-		struct ath5k_channel	r_last_channel;
+		struct ieee80211_channel r_last_channel;
 	} ah_radar;
 
 	/*
@@ -1044,7 +1037,8 @@ struct ath_hw {
 /*
  * Prototypes
  */
-typedef bool (ath5k_rfgain_t)(struct ath_hw *, struct ath5k_channel *, u_int);
+typedef bool (ath5k_rfgain_t)(struct ath_hw *, struct ieee80211_channel *,
+		unsigned int);
 
 /* General Functions */
 u16 ath_hal_computetxtime(struct ath_hw *hal, const struct ath5k_rate_table *rates, u32 frame_length, u16 rate_index, bool short_preamble);
@@ -1054,7 +1048,7 @@ struct ath_hw *ath5k_hw_attach(u16 device, u8 macversion, void *sc, void __iomem
 const struct ath5k_rate_table *ath5k_hw_get_rate_table(struct ath_hw *hal, unsigned int mode);
 void ath5k_hw_detach(struct ath_hw *hal);
 /* Reset Functions */
-int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode, struct ath5k_channel *channel, bool change_channel);
+int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode, struct ieee80211_channel *channel, bool change_channel);
 //bool ath5k_hw_nic_reset(struct ath_hw *hal, u32 val);
 /* Power management functions */
 int ath5k_hw_set_power(struct ath_hw *hal, enum ath5k_power_mode mode, bool set_chip, u16 sleep_duration);
@@ -1079,7 +1073,6 @@ void ath5k_hw_radar_alert(struct ath_hw *hal, bool enable);
 u16 ath5k_eeprom_bin2freq(struct ath_hw *hal, u16 bin, unsigned int mode);
 int ath5k_eeprom_read_ants(struct ath_hw *hal, u32 *offset, unsigned int mode);
 int ath5k_eeprom_read_modes(struct ath_hw *hal, u32 *offset, unsigned int mode);
-bool ath5k_eeprom_regulation_domain(struct ath_hw *hal, bool write, enum ieee80211_regdomain *regdomain);
 int ath5k_hw_set_regdomain(struct ath_hw *hal, u16 regdomain);
 /* Protocol Control Unit Functions */
 void ath5k_hw_set_opmode(struct ath_hw *hal);
@@ -1115,7 +1108,6 @@ bool ath5k_hw_set_cts_timeout(struct ath_hw *hal, unsigned int timeout);
 unsigned int ath5k_hw_get_cts_timeout(struct ath_hw *hal);
 /* Key table (WEP) functions */
 bool ath5k_hw_is_cipher_supported(struct ath_hw *hal, enum ath5k_cipher cipher);
-u32 ath5k_hw_get_keycache_size(struct ath_hw *hal);
 bool ath5k_hw_reset_key(struct ath_hw *hal, u16 entry);
 bool ath5k_hw_is_key_valid(struct ath_hw *hal, u16 entry);
 bool ath5k_hw_set_key(struct ath_hw *hal, u16 entry, const struct ath5k_keyval *keyval, const u8 *mac, int xor_notused);
@@ -1143,18 +1135,18 @@ void ath5k_hw_set_gpio_intr(struct ath_hw *hal, unsigned int gpio, u32 interrupt
 unsigned int ath_hal_mhz2ieee(unsigned int freq, u_int flags);
 unsigned int ath_hal_ieee2mhz(unsigned int chan, u_int flags);
 bool ath5k_check_channel(struct ath_hw *hal, u16 freq, unsigned int flags);
-bool ath_hal_init_channels(struct ath_hw *hal, struct ath5k_channel *channels, unsigned int max_channels, u_int *channels_size, enum ieee80211_countrycode country, u16 mode, bool outdoor, bool extended);
+bool ath_hal_init_channels(struct ath_hw *hal, struct ieee80211_channel *channels, unsigned int max_channels, u_int *channels_size, enum ieee80211_countrycode country, u16 mode, bool outdoor, bool extended);
 u16 ath5k_get_regdomain(struct ath_hw *hal);
 /* PHY/RF access functions */
-bool ath5k_hw_channel(struct ath_hw *hal, struct ath5k_channel *channel);
-u32 ath5k_hw_rf5110_chan2athchan(struct ath5k_channel *channel);
-bool ath5k_hw_rf5110_channel(struct ath_hw *hal, struct ath5k_channel *channel);
+bool ath5k_hw_channel(struct ath_hw *hal, struct ieee80211_channel *channel);
+u32 ath5k_hw_rf5110_chan2athchan(struct ieee80211_channel *channel);
+bool ath5k_hw_rf5110_channel(struct ath_hw *hal, struct ieee80211_channel *channel);
 bool ath5k_hw_rf5111_chan2athchan(unsigned int ieee, struct ath5k_athchan_2ghz *athchan);
-bool ath5k_hw_rf5111_channel(struct ath_hw *hal, struct ath5k_channel *channel);
-bool ath5k_hw_rf5112_channel(struct ath_hw *hal, struct ath5k_channel *channel);
-bool ath5k_hw_phy_calibrate(struct ath_hw *hal, struct ath5k_channel *channel);
-bool ath5k_hw_rf5110_calibrate(struct ath_hw *hal, struct ath5k_channel *channel);
-bool ath5k_hw_rf511x_calibrate(struct ath_hw *hal, struct ath5k_channel *channel);
+bool ath5k_hw_rf5111_channel(struct ath_hw *hal, struct ieee80211_channel *channel);
+bool ath5k_hw_rf5112_channel(struct ath_hw *hal, struct ieee80211_channel *channel);
+bool ath5k_hw_phy_calibrate(struct ath_hw *hal, struct ieee80211_channel *channel);
+bool ath5k_hw_rf5110_calibrate(struct ath_hw *hal, struct ieee80211_channel *channel);
+bool ath5k_hw_rf511x_calibrate(struct ath_hw *hal, struct ieee80211_channel *channel);
 bool ath5k_hw_phy_disable(struct ath_hw *hal);
 void ath5k_hw_set_def_antenna(struct ath_hw *hal, unsigned int ant);
 unsigned int ath5k_hw_get_def_antenna(struct ath_hw *hal);
@@ -1162,10 +1154,10 @@ unsigned int ath5k_hw_rfregs_op(u32 *rf, u32 offset, u32 reg, u32 bits, u32 firs
 u32 ath5k_hw_rfregs_gainf_corr(struct ath_hw *hal);
 bool ath5k_hw_rfregs_gain_readback(struct ath_hw *hal);
 s32 ath5k_hw_rfregs_gain_adjust(struct ath_hw *hal);
-bool ath5k_hw_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsigned int mode);
-bool ath5k_hw_rf5111_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsigned int mode);
-bool ath5k_hw_rf5112_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsigned int mode);
-void ath5k_hw_ar5211_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsigned int freq, unsigned int ee_mode);
+bool ath5k_hw_rfregs(struct ath_hw *hal, struct ieee80211_channel *channel, unsigned int mode);
+bool ath5k_hw_rf5111_rfregs(struct ath_hw *hal, struct ieee80211_channel *channel, unsigned int mode);
+bool ath5k_hw_rf5112_rfregs(struct ath_hw *hal, struct ieee80211_channel *channel, unsigned int mode);
+void ath5k_hw_ar5211_rfregs(struct ath_hw *hal, struct ieee80211_channel *channel, unsigned int freq, unsigned int ee_mode);
 bool ath5k_hw_rfgain(struct ath_hw *hal, unsigned int phy, u_int freq);
 enum ath5k_rfgain ath5k_hw_get_rf_gain(struct ath_hw *hal);
 /* Misc functions */
diff --git a/openhal/ath5k_hw.c b/openhal/ath5k_hw.c
index 8318143..d941be3 100644
--- a/openhal/ath5k_hw.c
+++ b/openhal/ath5k_hw.c
@@ -79,9 +79,9 @@ static const struct ath5k_rate_table ath5k_rt_xr = AR5K_RATES_XR;
 
 /*Prototypes*/
 static int ath5k_hw_nic_reset(struct ath_hw *, u32);
-static int ath5k_hw_nic_wakeup(struct ath_hw *, u16, bool);
+static int ath5k_hw_nic_wakeup(struct ath_hw *, int, bool);
 static u16 ath5k_hw_radio_revision(struct ath_hw *, enum ath5k_chip);
-static bool ath5k_hw_txpower(struct ath_hw *, struct ath5k_channel *,
+static bool ath5k_hw_txpower(struct ath_hw *, struct ieee80211_channel *,
 	unsigned int);
 static bool ath5k_hw_setup_4word_tx_desc(struct ath_hw *, struct ath_desc *,
 	unsigned int, unsigned int, enum ath5k_pkt_type, unsigned int,
@@ -544,7 +544,7 @@ err:
 /*
  * Bring up MAC + PHY Chips
  */
-static int ath5k_hw_nic_wakeup(struct ath_hw *hal, u16 flags, bool initial)
+static int ath5k_hw_nic_wakeup(struct ath_hw *hal, int flags, bool initial)
 {
 	u32 turbo, mode, clock;
 	int ret;
@@ -770,7 +770,7 @@ void ath5k_hw_detach(struct ath_hw *hal)
  * Main reset function
  */
 int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
-	struct ath5k_channel *channel, bool change_channel)
+	struct ieee80211_channel *channel, bool change_channel)
 {
 	struct ath5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
 	u8 mac[ETH_ALEN];
@@ -810,7 +810,7 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
 
 
 	/*Wakeup the device*/
-	if (ath5k_hw_nic_wakeup(hal, channel->channel_flags, false) == false)
+	if (ath5k_hw_nic_wakeup(hal, channel->val, false) == false)
 		return -EIO;
 
 	/*
@@ -832,7 +832,7 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
 			return -EINVAL;
 		}
 
-		switch (channel->channel_flags & CHANNEL_MODES) {
+		switch (channel->val & CHANNEL_MODES) {
 		case CHANNEL_A:
 			mode = AR5K_INI_VAL_11A;
 			freq = AR5K_INI_RFGAIN_5GHZ;
@@ -992,7 +992,7 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
 		if (hal->ah_version == AR5K_AR5212) {
 
 			/*For 802.11b*/
-			if (!(channel->channel_flags & CHANNEL_B)) {
+			if (!(channel->val & CHANNEL_B)) {
 
 				/*Get rate table for this operation mode*/
 				rt = ath5k_hw_get_rate_table(hal, AR5K_MODE_11B);
@@ -1016,7 +1016,7 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
 
 				/*Get rate table for this operation mode*/
 				rt = ath5k_hw_get_rate_table(hal,
-				    channel->channel_flags & CHANNEL_TURBO ?
+				    channel->val & CHANNEL_TURBO ?
 				    AR5K_MODE_TURBO : AR5K_MODE_XR);
 
 				/*Write rate duration table*/
@@ -1034,7 +1034,7 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
 			hal->ah_radio_5ghz_revision < AR5K_SREV_RAD_5112A) {
 				AR5K_REG_WRITE(AR5K_PHY_CCKTXCTL,
 				AR5K_PHY_CCKTXCTL_WORLD);
-			if (channel->channel_flags & CHANNEL_A)
+			if (channel->val & CHANNEL_A)
 				data = 0xffb81020;
 			else
 				data = 0xffb80d20;
@@ -1063,11 +1063,11 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
 
 		/* Write OFDM timings on 5212*/
 		if (hal->ah_version == AR5K_AR5212) {
-			if (channel->channel_flags & CHANNEL_OFDM) {
+			if (channel->val & CHANNEL_OFDM) {
 				u32 coef_scaled, coef_exp, coef_man, ds_coef_exp,
 				    ds_coef_man, clock;
 
-				clock = channel->channel_flags & CHANNEL_T ? 80 : 40;
+				clock = channel->val & CHANNEL_T ? 80 : 40;
 				coef_scaled = ((5 * (clock << 24)) / 2) / channel->freq;
 
 				for (coef_exp = 31; coef_exp > 0; coef_exp--)
@@ -1093,7 +1093,7 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
 		/*Enable/disable 802.11b mode on 5111
 		(enable 2111 frequency converter + CCK)*/
 		if (hal->ah_radio == AR5K_RF5111) {
-			if (channel->channel_flags & CHANNEL_B)
+			if (channel->val & CHANNEL_B)
 				AR5K_REG_ENABLE_BITS(AR5K_TXCFG,
 				    AR5K_TXCFG_B_MODE);
 			else
@@ -1219,7 +1219,7 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
 	 */
 	if (hal->ah_version != AR5K_AR5210) {
 		data = AR5K_REG_READ(AR5K_PHY_RX_DELAY) & AR5K_PHY_RX_DELAY_M;
-		data = (channel->channel_flags & CHANNEL_CCK) ?
+		data = (channel->val & CHANNEL_CCK) ?
 		    ((data << 2) / 22) : (data / 10);
 
 		udelay(100 + data);
@@ -1274,7 +1274,7 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
 	
 	hal->ah_calibration = false;
 
-	if (!(channel->channel_flags & CHANNEL_B)) {
+	if (!(channel->val & CHANNEL_B)) {
 		hal->ah_calibration = true;
 		AR5K_REG_WRITE_BITS(AR5K_PHY_IQ,
 		    AR5K_PHY_IQ_CAL_NUM_LOG_MAX, 15);
@@ -2469,10 +2469,9 @@ static int ath5k_eeprom_read_mac(struct ath_hw *hal, u8 *mac)
 }
 
 /*
- * Read/Write refulatory domain
+ * Read/Write regulatory domain
  */
-bool
-ath5k_eeprom_regulation_domain(struct ath_hw *hal, bool write,
+static bool ath5k_eeprom_regulation_domain(struct ath_hw *hal, bool write,
 	enum ieee80211_regdomain *regdomain)
 {
 	u16 ee_regdomain;
@@ -3290,16 +3289,6 @@ ath5k_hw_is_cipher_supported(struct ath_hw *hal, enum ath5k_cipher cipher)
 }
 
 /*
- * Get key cache size
- */
-u32
-ath5k_hw_get_keycache_size(struct ath_hw *hal)
-{
-	AR5K_TRACE;
-	return AR5K_KEYCACHE_SIZE;
-}
-
-/*
  * Reset encryption key
  */
 bool
@@ -4666,32 +4655,6 @@ ath_hal_mhz2ieee(unsigned int freq, u_int flags)
 }
 
 /*
- * Convert IEEE channel number to MHz frequency.
- */
-unsigned int
-ath_hal_ieee2mhz(unsigned int chan, u_int flags)
-{
-	if (flags & CHANNEL_2GHZ) {	/* 2GHz band */
-		if (chan == 14)
-			return 2484;
-		if (chan < 14)
-			return 2407 + chan * 5;
-		else
-			return 2512 + ((chan - 15) * 20);
-	} else if (flags & CHANNEL_5GHZ) /* 5Ghz band */
-		return 5000 + (chan * 5);
-	else {					/* either, guess */
-		if (chan == 14)
-			return 2484;
-		if (chan < 14)			/* 0-13 */
-			return 2407 + chan * 5;
-		if (chan < 27)			/* 15-26 */
-			return 2512 + ((chan - 15) * 20);
-		return 5000 + (chan * 5);
-	}
-}
-
-/*
  * Check if a channel is supported
  */
 bool
@@ -4710,147 +4673,6 @@ ath5k_check_channel(struct ath_hw *hal, u16 freq, unsigned int flags)
 	return false;
 }
 
-/*
- * Initialize channels array
- * TODO: Do this in the driver, only check_channel is hw related
- * also left here temporarily for combatibility.
- */
-bool
-ath_hal_init_channels(struct ath_hw *hal, struct ath5k_channel *channels,
-    unsigned int max_channels, u_int *channels_size, enum ieee80211_countrycode country, u16 mode,
-    bool outdoor, bool extended)
-{
-	unsigned int i, c;
-	u32 domain_current;
-	unsigned int domain_5ghz, domain_2ghz;
-	struct ath5k_channel *all_channels;
-	enum ieee80211_countrycode country_current;
-
-	if ((all_channels = kmalloc(sizeof(struct ath5k_channel) * max_channels,
-	    GFP_KERNEL)) == NULL)
-		return false;
-
-	i = c = 0;
-	domain_current = hal->ah_regdomain;
-	hal->ah_country_code = country;
-	country_current = hal->ah_country_code;
-
-	/*
-	 * In debugging mode, enable all channels supported by the chipset
-	 */
-	if (domain_current == DMN_DEFAULT || CHAN_DEBUG == 1) {
-		int min, max, freq;
-		unsigned int flags;
-
-		min = 1; /* 2GHz channel 1 -2412Mhz */
-		max = 26;/* 2GHz channel 26 (non-ieee) -2732Mhz */
-
-		flags = CHANNEL_B | CHANNEL_G;
-debugchan:
-		for (i = min; (i <= max) && (c < max_channels); i++) {
-			freq = ath_hal_ieee2mhz(i, flags);
-			if (ath5k_check_channel(hal, freq, flags) == false)
-				continue;
-			all_channels[c].freq = freq;
-			all_channels[c].channel_flags = flags;
-			c++;
-		}
-
-		/* If is there to protect from infinite loop */
-		if (flags & CHANNEL_2GHZ) {
-/* ath_hal_mhz2ieee returns 1 for IEEE80211_CHANNELS_5GHZ_MIN 
-for loop starts from 1 and all channels are marked as 5GHz M.F.*/
-//			min = ath_hal_mhz2ieee(IEEE80211_CHANNELS_5GHZ_MIN,
-//			    CHANNEL_5GHZ);
-/* Continue from where we stoped, skip last 2GHz channel */
-			min = max + 1;
-			max = ath_hal_mhz2ieee(IEEE80211_CHANNELS_5GHZ_MAX,
-						CHANNEL_5GHZ);
-			flags = CHANNEL_A | CHANNEL_T | CHANNEL_XR;
-			goto debugchan;
-		}
-
-		goto done;
-	}
-
-	domain_5ghz = ieee80211_regdomain2flag(domain_current,
-	    IEEE80211_CHANNELS_5GHZ_MIN);
-	domain_2ghz = ieee80211_regdomain2flag(domain_current,
-	    IEEE80211_CHANNELS_2GHZ_MIN);
-
-	/*
-	 * Create channel list based on chipset capabilities, regulation domain
-	 * and mode. 5GHz...
-	 */
-	for (i = 0; (hal->ah_capabilities.cap_range.range_5ghz_max > 0) &&
-		 (i < ARRAY_SIZE(ath5k_5ghz_channels)) &&
-		 (c < max_channels); i++) {
-		/* Check if channel is supported by the chipset */
-		if (ath5k_check_channel(hal,
-		    ath5k_5ghz_channels[i].rc_channel,
-		    CHANNEL_5GHZ) == false)
-			continue;
-
-		/* Match regulation domain */
-		if ((IEEE80211_DMN(ath5k_5ghz_channels[i].rc_domain) &
-			IEEE80211_DMN(domain_5ghz)) == 0)
-			continue;
-
-		/* Match modes */
-		if (ath5k_5ghz_channels[i].rc_mode & CHANNEL_TURBO)
-			all_channels[c].channel_flags = CHANNEL_T;
-		else if (ath5k_5ghz_channels[i].rc_mode &
-		    CHANNEL_OFDM)
-			all_channels[c].channel_flags = CHANNEL_A;
-		else
-			continue;
-
-		/* Write channel and increment counter */
-		all_channels[c++].freq = ath5k_5ghz_channels[i].rc_channel;
-	}
-
-	/*
-	 * ...and 2GHz.
-	 */
-	for (i = 0; (hal->ah_capabilities.cap_range.range_2ghz_max > 0) &&
-			(i < ARRAY_SIZE(ath5k_2ghz_channels)) &&
-			(c < max_channels); i++) {
-		
-		/* Check if channel is supported by the chipset */
-		if (ath5k_check_channel(hal,
-		    ath5k_2ghz_channels[i].rc_channel,
-		    CHANNEL_2GHZ) == false)
-			continue;
-
-		/* Match regulation domain */
-		if ((IEEE80211_DMN(ath5k_2ghz_channels[i].rc_domain) &
-			IEEE80211_DMN(domain_2ghz)) == 0)
-			continue;
-
-		/* Match modes */
-		if ((hal->ah_capabilities.cap_mode & AR5K_MODE_11B) &&
-		   (ath5k_2ghz_channels[i].rc_mode & CHANNEL_CCK))
-			all_channels[c].channel_flags = CHANNEL_B;
-
-		if ((hal->ah_capabilities.cap_mode & AR5K_MODE_11G) &&
-		   (ath5k_2ghz_channels[i].rc_mode & CHANNEL_OFDM)) {
-			all_channels[c].channel_flags |= CHANNEL_G;
-/*			if (ath5k_2ghz_channels[i].rc_mode &
-			    CHANNEL_TURBO)
-				all_channels[c].channel_flags |= CHANNEL_TG;*/
-		}
-
-		/* Write channel and increment counter */
-		all_channels[c++].freq = ath5k_2ghz_channels[i].rc_channel;
-	}
-
- done:
-	memcpy(channels, all_channels, sizeof(struct ath5k_channel) * max_channels);
-	*channels_size = c;
-	kfree(all_channels);
-	return true;
-}
-
 u16
 ath5k_get_regdomain(struct ath_hw *hal)
 {
@@ -4886,7 +4708,7 @@ ath5k_get_regdomain(struct ath_hw *hal)
  * Set a channel on the radio chip
  */
 bool
-ath5k_hw_channel(struct ath_hw *hal, struct ath5k_channel *channel)
+ath5k_hw_channel(struct ath_hw *hal, struct ieee80211_channel *channel)
 {
 	bool ret;
 
@@ -4917,9 +4739,8 @@ ath5k_hw_channel(struct ath_hw *hal, struct ath5k_channel *channel)
 		return ret;
 
 	hal->ah_current_channel.freq = channel->freq;
-	hal->ah_current_channel.channel_flags = channel->channel_flags;
-	hal->ah_turbo = channel->channel_flags == CHANNEL_T ?
-	    true : false;
+	hal->ah_current_channel.val = channel->val;
+	hal->ah_turbo = channel->val == CHANNEL_T ? true : false;
 
 	return true;
 }
@@ -4928,7 +4749,7 @@ ath5k_hw_channel(struct ath_hw *hal, struct ath5k_channel *channel)
  * Convertion needed for RF5110
  */
 u32
-ath5k_hw_rf5110_chan2athchan(struct ath5k_channel *channel)
+ath5k_hw_rf5110_chan2athchan(struct ieee80211_channel *channel)
 {
 	u32 athchan;
 
@@ -4939,7 +4760,7 @@ ath5k_hw_rf5110_chan2athchan(struct ath5k_channel *channel)
 	 * different RF/PHY part.
 	 */
 	athchan = (ath5k_hw_bitswap((ath_hal_mhz2ieee(channel->freq,
-	    channel->channel_flags) - 24) / 2, 5) << 1) |
+	    channel->val) - 24) / 2, 5) << 1) |
 	    (1 << 6) | 0x1;
 
 	return athchan;
@@ -4949,7 +4770,7 @@ ath5k_hw_rf5110_chan2athchan(struct ath5k_channel *channel)
  * Set channel on RF5110
  */
 bool
-ath5k_hw_rf5110_channel(struct ath_hw *hal, struct ath5k_channel *channel)
+ath5k_hw_rf5110_channel(struct ath_hw *hal, struct ieee80211_channel *channel)
 {
 	u32 data;
 
@@ -4997,7 +4818,7 @@ ath5k_hw_rf5111_chan2athchan(unsigned int ieee, struct ath5k_athchan_2ghz *athch
  * Set channel on 5111
  */
 bool
-ath5k_hw_rf5111_channel(struct ath_hw *hal, struct ath5k_channel *channel)
+ath5k_hw_rf5111_channel(struct ath_hw *hal, struct ieee80211_channel *channel)
 {
 	unsigned int ieee_channel, ath_channel;
 	u32 data0, data1, clock;
@@ -5008,9 +4829,9 @@ ath5k_hw_rf5111_channel(struct ath_hw *hal, struct ath5k_channel *channel)
 	 */
 	data0 = data1 = 0;
 	ath_channel = ieee_channel = ath_hal_mhz2ieee(channel->freq,
-	    channel->channel_flags);
+	    channel->val);
 
-	if (channel->channel_flags & CHANNEL_2GHZ) {
+	if (channel->val & CHANNEL_2GHZ) {
 		/* Map 2GHz channel to 5GHz Atheros channel ID */
 		if (ath5k_hw_rf5111_chan2athchan(ieee_channel,
 			&ath_channel_2ghz) == false)
@@ -5041,7 +4862,7 @@ ath5k_hw_rf5111_channel(struct ath_hw *hal, struct ath5k_channel *channel)
  * Set channel on 5112
  */
 bool
-ath5k_hw_rf5112_channel(struct ath_hw *hal, struct ath5k_channel *channel)
+ath5k_hw_rf5112_channel(struct ath_hw *hal, struct ieee80211_channel *channel)
 {
 	u32 data, data0, data1, data2;
 	u16 c;
@@ -5089,7 +4910,7 @@ ath5k_hw_rf5112_channel(struct ath_hw *hal, struct ath5k_channel *channel)
  * Perform a PHY calibration
  */
 bool
-ath5k_hw_phy_calibrate(struct ath_hw *hal, struct ath5k_channel *channel){
+ath5k_hw_phy_calibrate(struct ath_hw *hal, struct ieee80211_channel *channel){
 
 	bool ret;
 
@@ -5104,7 +4925,7 @@ ath5k_hw_phy_calibrate(struct ath_hw *hal, struct ath5k_channel *channel){
  * Perform a PHY calibration on RF5110
  */
 bool
-ath5k_hw_rf5110_calibrate(struct ath_hw *hal, struct ath5k_channel *channel)
+ath5k_hw_rf5110_calibrate(struct ath_hw *hal, struct ieee80211_channel *channel)
 {
 	bool ret = true;
 	u32 phy_sig, phy_agc, phy_sat, beacon, noise_floor;
@@ -5253,7 +5074,7 @@ ath5k_hw_rf5110_calibrate(struct ath_hw *hal, struct ath5k_channel *channel)
  * Perform a PHY calibration on RF5111/5112
  */
 bool
-ath5k_hw_rf511x_calibrate(struct ath_hw *hal, struct ath5k_channel *channel)
+ath5k_hw_rf511x_calibrate(struct ath_hw *hal, struct ieee80211_channel *channel)
 {
 	u32 i_pwr, q_pwr;
 	s32 iq_corr, i_coff, i_coffd, q_coff, q_coffd;
@@ -5289,7 +5110,7 @@ ath5k_hw_rf511x_calibrate(struct ath_hw *hal, struct ath5k_channel *channel)
 		AR5K_PHY_AGCCTL_NF);
 
 	/* Request RF gain */
-	if (channel->channel_flags & CHANNEL_5GHZ) {
+	if (channel->val & CHANNEL_5GHZ) {
 		AR5K_REG_WRITE(AR5K_PHY_PAPD_PROBE,
 			AR5K_REG_SM(hal->ah_txpower.txp_max,
 			AR5K_PHY_PAPD_PROBE_TXPOWER) |
@@ -5516,7 +5337,7 @@ ath5k_hw_rfregs_gain_adjust(struct ath_hw *hal)
  * Initialize RF
  */
 bool
-ath5k_hw_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsigned int mode)
+ath5k_hw_rfregs(struct ath_hw *hal, struct ieee80211_channel *channel, unsigned int mode)
 {
 	ath5k_rfgain_t *func = NULL;
 	bool ret;
@@ -5554,7 +5375,7 @@ ath5k_hw_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsigned int
  * Initialize RF5111
  */
 bool
-ath5k_hw_rf5111_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsigned int mode)
+ath5k_hw_rf5111_rfregs(struct ath_hw *hal, struct ieee80211_channel *channel, unsigned int mode)
 {
 	struct ath5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
 	const unsigned int rf_size = ARRAY_SIZE(rf5111_rf);
@@ -5582,8 +5403,8 @@ ath5k_hw_rf5111_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsign
 		rf[i] = rf5111_rf[i].rf_value[mode];
 	}
 
-	if (channel->channel_flags & CHANNEL_2GHZ) {
-		if (channel->channel_flags & CHANNEL_B)
+	if (channel->val & CHANNEL_2GHZ) {
+		if (channel->val & CHANNEL_B)
 			ee_mode = AR5K_EEPROM_MODE_11B;
 		else
 			ee_mode = AR5K_EEPROM_MODE_11G;
@@ -5652,7 +5473,7 @@ ath5k_hw_rf5111_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsign
  * Initialize RF5112
  */
 bool
-ath5k_hw_rf5112_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsigned int mode)
+ath5k_hw_rf5112_rfregs(struct ath_hw *hal, struct ieee80211_channel *channel, unsigned int mode)
 {
 	struct ath5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
 	unsigned int rf_size;
@@ -5688,8 +5509,8 @@ ath5k_hw_rf5112_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsign
 		rf[i] = rf_ini[i].rf_value[mode];
 	}
 
-	if (channel->channel_flags & CHANNEL_2GHZ) {
-		if (channel->channel_flags & CHANNEL_B)
+	if (channel->val & CHANNEL_2GHZ) {
+		if (channel->val & CHANNEL_B)
 			ee_mode = AR5K_EEPROM_MODE_11B;
 		else
 			ee_mode = AR5K_EEPROM_MODE_11G;
@@ -5747,7 +5568,7 @@ ath5k_hw_rf5112_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsign
  * doesn't ar5k_rfregs work ?
  */
 void
-ath5k_hw_ar5211_rfregs(struct ath_hw *hal, struct ath5k_channel *channel, unsigned int freq,
+ath5k_hw_ar5211_rfregs(struct ath_hw *hal, struct ieee80211_channel *channel, unsigned int freq,
     unsigned int ee_mode)
 {
 	struct ath5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
@@ -5884,7 +5705,7 @@ ath5k_hw_get_rf_gain(struct ath_hw *hal)
  * Initialize the tx power table (not fully implemented)
  */
 static void
-ath5k_txpower_table(struct ath_hw *hal, struct ath5k_channel *channel, s16 max_power)
+ath5k_txpower_table(struct ath_hw *hal, struct ieee80211_channel *channel, s16 max_power)
 {
 	u16 txpower, *rates;
 	int i, min, max, n;
@@ -5922,7 +5743,7 @@ ath5k_txpower_table(struct ath_hw *hal, struct ath5k_channel *channel, s16 max_p
  * Set transmition power
  */
 static bool /*O.K. - txpower_table is unimplemented so this doesn't work*/
-ath5k_hw_txpower(struct ath_hw *hal, struct ath5k_channel *channel, unsigned int txpower)
+ath5k_hw_txpower(struct ath_hw *hal, struct ieee80211_channel *channel, unsigned int txpower)
 {
 	bool tpc = hal->ah_txpower.txp_tpc;
 	int i;
@@ -5983,7 +5804,7 @@ bool
 ath5k_hw_set_txpower_limit(struct ath_hw *hal, unsigned int power)
 {
 	/*Just a try M.F.*/
-	struct ath5k_channel *channel = &hal->ah_current_channel;
+	struct ieee80211_channel *channel = &hal->ah_current_channel;
 
 	AR5K_TRACE;
 	AR5K_PRINTF("changing txpower to %d\n",power);
diff --git a/openhal/ath5kreg.h b/openhal/ath5kreg.h
index d21b057..05c0b88 100644
--- a/openhal/ath5kreg.h
+++ b/openhal/ath5kreg.h
@@ -1607,8 +1607,6 @@
 #define AR5K_KEYTABLE_SIZE_5211		128
 #define	AR5K_KEYTABLE_SIZE		(hal->ah_version == AR5K_AR5210 ? \
 					AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211)
-#define AR5K_KEYCACHE_SIZE		8
-
 
 
 /*===PHY REGISTERS===*/