diff -r 63151bbe0511 arch/x86_64/kernel/pci-calgary.c
--- a/arch/x86_64/kernel/pci-calgary.c	Thu Nov 02 23:57:26 2006 +0200
+++ b/arch/x86_64/kernel/pci-calgary.c	Fri Nov 03 15:12:45 2006 +0200
@@ -52,6 +52,10 @@ int use_calgary __read_mostly = 0;
 #define PCI_DEVICE_ID_IBM_CALGARY 0x02a1
 #define PCI_VENDOR_DEVICE_ID_CALGARY \
 	(PCI_VENDOR_ID_IBM | PCI_DEVICE_ID_IBM_CALGARY << 16)
+
+#define PCI_DEVICE_ID_IBM_CALIOC2 0x0308
+#define PCI_VENDOR_DEVICE_ID_CALIOC2 \
+	(PCI_VENDOR_ID_IBM | PCI_DEVICE_ID_IBM_CALIOC2 << 16)
 
 /* we need these for register space address calculation */
 #define START_ADDRESS           0xfe000000
@@ -817,7 +821,9 @@ static void __init calgary_enable_transl
 	val32 = be32_to_cpu(readl(target));
 	val32 |= PHB_TCE_ENABLE | PHB_DAC_DISABLE | PHB_MCSR_ENABLE;
 
-	printk(KERN_INFO "Calgary: enabling translation on PHB %#x\n", busnum);
+	printk(KERN_INFO "Calgary: enabling translation on %s PHB %#x\n",
+	       (dev->device == PCI_DEVICE_ID_IBM_CALGARY) ?
+	       "Calgary" : "CalIOC2", busnum);
 	printk(KERN_INFO "Calgary: errant DMAs will now be prevented on this "
 	       "bus.\n");
 
@@ -1103,9 +1109,12 @@ void __init detect_calgary(void)
 
 	for (bus = 0; bus < MAX_PHB_BUS_NUM; bus++) {
 		int dev;
+		u32 devid;
 		struct calgary_bus_info *info = &bus_info[bus];
 
-		if (read_pci_config(bus, 0, 0, 0) != PCI_VENDOR_DEVICE_ID_CALGARY)
+		devid = read_pci_config(bus, 0, 0, 0);
+		if ((devid != PCI_VENDOR_DEVICE_ID_CALGARY) &&
+		    (devid != PCI_VENDOR_DEVICE_ID_CALIOC2))
 			continue;
 
 		if (info->translation_disabled)