diff -urN linux-2.4.16/Documentation/Configure.help linux/Documentation/Configure.help --- linux-2.4.16/Documentation/Configure.help Sat Dec 1 21:53:18 2001 +++ linux/Documentation/Configure.help Sat Dec 1 21:53:52 2001 @@ -10121,6 +10121,12 @@ instead of an internal one. Disabling this option will save some memory by making the code size smaller. If unsure, say Y. +Support for Dreamcast Broad Band Adaptor +CONFIG_8139TOO_DREAMCAST + This enables support for the SEGA Broad Band Adaptor for Dreamcast. + It uses 16KB buffer and doesn't support mapping main memory to DMA. + If unsure, say N. + SiS 900/7016 PCI Fast Ethernet Adapter support CONFIG_SIS900 This is a driver for the Fast Ethernet PCI network cards based on diff -urN linux-2.4.16/Documentation/cachetlb.txt linux/Documentation/cachetlb.txt --- linux-2.4.16/Documentation/cachetlb.txt Sat Dec 1 21:53:22 2001 +++ linux/Documentation/cachetlb.txt Sat Dec 1 21:53:52 2001 @@ -222,7 +222,7 @@ this value. NOTE: This does not fix shared mmaps, check out the sparc64 port for -one way to solve this (in particular SPARC_FLAG_MMAPSHARED). +one way to solve this (in particular arch_get_unmapped_area). Next, you have two methods to solve the D-cache aliasing issue for all other cases. Please keep in mind that fact that, for a given page diff -urN linux-2.4.16/Documentation/sh/new-machine.txt linux/Documentation/sh/new-machine.txt --- linux-2.4.16/Documentation/sh/new-machine.txt Wed Dec 31 19:00:00 1969 +++ linux/Documentation/sh/new-machine.txt Sat Dec 1 21:53:52 2001 @@ -0,0 +1,77 @@ +The multiple machine support relies on redirecting all functions which will +need to be machine specific through a table of function pointers, the +machvec. These functions fall into a number of categories: + + - I/O functions to IO memory (inb etc) and PCI/main memory (readb etc). + - I/O remapping functions (ioremap etc) + - some initialisation functions + - a 'heartbeat' function + - some miscellaneous flags + +The tree can be built in two ways: + - as a fully generic build. All drivers are linked in, and all functions + go through the machvec + - as a machine specific build. In this case only the required drivers + will be linked in, and some macros may be redefined to not go through + the machvec where performance is important (in particular IO functions). + +There are three ways in which IO can be performed: + - none at all. This is really only useful for the 'unknown' machine type, + which us designed to run on a machine about which we know nothing, and + so all all IO instructions do nothing. + - fully custom. In this case all IO functions go to a machine specific + set of functions which can do what they like + - a generic set of functions. These will cope with most situations, + and rely on a single function, mv_port2addr, which is called through the + machine vector, and converts an IO address into a memory address, which + can be read from/written to directly. + +Thus adding a new machine involves the following steps (I will assume I am +adding a machine called fred): + + - add a new file include/asm-sh/io_fred.h which contains prototypes for + any machine specific IO functions prefixed with the machine name, for + example fred_inb. These will be needed when filling out the machine + vector. In addition, a section is required which defines what to do when + building a machine specific version. For example: + + #ifdef __WANT_IO_DEF + #define inb fred_inb + ... + #endif + + This is the minimum that is required, however there are ample + opportunities to optimise this. In particular, by making the prototypes + inline function definitions, it is possible to inline the function when + building machine specific versions. Note that the machine vector + functions will still be needed, so that a module built for a generic + setup can be loaded. + + - add a new file arch/sh/kernel/mach_fred.c. This contains the definition + of the machine vector. When building the machine specific version, this + will be the real machine vector (via an alias), while in the generic + version is used to initialise the machine vector, and then freed, by + making it initdata. This should be defined as: + + struct sh_machine_vector mv_fred __initmv = { + mv_name: "Fred" + } + ALIAS_MV(se) + + - finally add a file arch/sh/kernel/io_fred.c, which contains + definitions of the machine specific io functions. + +A note about initialisation functions. Three initialisation functions are +provided in the machine vector: + - mv_arch_init - called very early on from setup_arch + - mv_init_irq - called from init_IRQ, after the generic SH interrupt + initialisation + - mv_init_pci - currently not used + +Any other remaining functions which need to be called at start up can be +added to the list using the __initcalls macro (or module_init if the code +can be built as a module). Many generic drivers probe to see if the device +they are targeting is present, however this may not always be appropriate, +so a flag can be added to the machine vector which will be set on those +machines which have the hardware in question, reducing the probe to a +single conditional. diff -urN linux-2.4.16/Makefile linux/Makefile --- linux-2.4.16/Makefile Sat Dec 1 21:52:27 2001 +++ linux/Makefile Sat Dec 1 21:53:52 2001 @@ -184,6 +184,7 @@ DRIVERS-$(CONFIG_MD) += drivers/md/mddev.o DRIVERS-$(CONFIG_BLUEZ) += drivers/bluetooth/bluetooth.o DRIVERS-$(CONFIG_HOTPLUG_PCI) += drivers/hotplug/vmlinux-obj.o +DRIVERS-$(CONFIG_MAPLE) += drivers/maple/maplebus.o DRIVERS := $(DRIVERS-y) diff -urN linux-2.4.16/arch/sh/config.in linux/arch/sh/config.in --- linux-2.4.16/arch/sh/config.in Sat Dec 1 21:53:36 2001 +++ linux/arch/sh/config.in Sat Dec 1 21:53:52 2001 @@ -191,7 +191,7 @@ if [ "$CONFIG_PCI_GODIRECT" = "y" -o "$CONFIG_PCI_GOANY" = "y" ]; then define_bool CONFIG_PCI_DIRECT y fi - define_bool CONFIG_SH_PCIDMA_NONCOHERENT n + bool 'Cache and PCI noncoherent' CONFIG_SH_PCIDMA_NONCOHERENT n fi source drivers/pci/Config.in diff -urN linux-2.4.16/arch/sh/kernel/fpu.c linux/arch/sh/kernel/fpu.c --- linux-2.4.16/arch/sh/kernel/fpu.c Sat Dec 1 21:53:15 2001 +++ linux/arch/sh/kernel/fpu.c Sat Dec 1 21:53:52 2001 @@ -1,4 +1,4 @@ -/* $Id: fpu.c,v 1.29 2000/03/22 13:42:10 gniibe Exp $ +/* $Id: fpu.c,v 1.29 2001/07/27 11:48:12 gniibe Exp $ * * linux/arch/sh/kernel/fpu.c * diff -urN linux-2.4.16/arch/sh/kernel/head.S linux/arch/sh/kernel/head.S --- linux-2.4.16/arch/sh/kernel/head.S Sat Dec 1 21:53:15 2001 +++ linux/arch/sh/kernel/head.S Sat Dec 1 21:53:52 2001 @@ -1,4 +1,4 @@ -/* $Id: head.S,v 1.17 2000/03/06 12:44:24 gniibe Exp $ +/* $Id: head.S,v 1.17 2001/07/27 11:48:29 gniibe Exp $ * * arch/sh/kernel/head.S * diff -urN linux-2.4.16/arch/sh/kernel/io_7751se.c linux/arch/sh/kernel/io_7751se.c --- linux-2.4.16/arch/sh/kernel/io_7751se.c Sat Dec 1 21:53:16 2001 +++ linux/arch/sh/kernel/io_7751se.c Sat Dec 1 21:53:52 2001 @@ -17,7 +17,7 @@ #include #include -#include +#include #include #if 0 @@ -70,7 +70,7 @@ else return (volatile __u16 *) (PA_SUPERIO + (port << 1)); #endif - maybebadio(name,port); + maybebadio(name,(unsigned long)port); return (volatile __u16*)port; } @@ -276,6 +276,7 @@ /* ISA page descriptor. */ static __u32 sh_isa_memmap[256]; +#if 0 static int sh_isa_mmap(__u32 start, __u32 length, __u32 offset) { @@ -286,12 +287,11 @@ idx = start >> 12; sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff); -#if 0 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n", start, length, offset, idx, sh_isa_memmap[idx]); -#endif return 0; } +#endif unsigned long sh7751se_isa_port2addr(unsigned long offset) diff -urN linux-2.4.16/arch/sh/kernel/pci-7751se.c linux/arch/sh/kernel/pci-7751se.c --- linux-2.4.16/arch/sh/kernel/pci-7751se.c Sat Dec 1 21:53:16 2001 +++ linux/arch/sh/kernel/pci-7751se.c Sat Dec 1 21:53:52 2001 @@ -37,7 +37,6 @@ */ int __init pcibios_init_platform(void) { - unsigned long data; unsigned long bcr1, wcr1, wcr2, wcr3, mcr; unsigned short bcr2; diff -urN linux-2.4.16/arch/sh/kernel/pci-sh7751.c linux/arch/sh/kernel/pci-sh7751.c --- linux-2.4.16/arch/sh/kernel/pci-sh7751.c Sat Dec 1 21:53:16 2001 +++ linux/arch/sh/kernel/pci-sh7751.c Sat Dec 1 21:53:52 2001 @@ -3,7 +3,7 @@ * * Dustin McIntire (dustin@sensoria.com) * Derived from arch/i386/kernel/pci-*.c which bore the message: - * (c) 1999--2000 Martin Mares + * (c) 1999--2000 Martin Mares * * May be copied or modified under the terms of the GNU General Public * License. See linux/COPYING for more information. diff -urN linux-2.4.16/arch/sh/kernel/setup_se.c linux/arch/sh/kernel/setup_se.c --- linux-2.4.16/arch/sh/kernel/setup_se.c Sat Dec 1 21:53:15 2001 +++ linux/arch/sh/kernel/setup_se.c Sat Dec 1 21:53:52 2001 @@ -1,4 +1,4 @@ -/* $Id: setup_se.c,v 1.6 2000/05/14 08:41:25 gniibe Exp $ +/* $Id: setup_se.c,v 1.12 2001/10/16 01:04:34 gniibe Exp $ * * linux/arch/sh/kernel/setup_se.c * diff -urN linux-2.4.16/arch/sh/kernel/signal.c linux/arch/sh/kernel/signal.c --- linux-2.4.16/arch/sh/kernel/signal.c Sat Dec 1 21:53:15 2001 +++ linux/arch/sh/kernel/signal.c Sat Dec 1 21:53:52 2001 @@ -1,4 +1,4 @@ -/* $Id: signal.c,v 1.21 2000/03/11 14:06:21 gniibe Exp $ +/* $Id: signal.c,v 1.16 2001/10/01 02:21:50 gniibe Exp $ * * linux/arch/sh/kernel/signal.c * diff -urN linux-2.4.16/arch/sh/kernel/sys_sh.c-1.7 linux/arch/sh/kernel/sys_sh.c-1.7 --- linux-2.4.16/arch/sh/kernel/sys_sh.c-1.7 Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/kernel/sys_sh.c-1.7 Sat Dec 1 21:53:52 2001 @@ -0,0 +1,236 @@ +/* + * linux/arch/sh/kernel/sys_sh.c + * + * This file contains various random system calls that + * have a non-standard calling sequence on the Linux/SuperH + * platform. + * + * Taken from i386 version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +/* + * sys_pipe() is the normal C calling standard for creating + * a pipe. It's not the way Unix traditionally does this, though. + */ +asmlinkage int sys_pipe(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs regs) +{ + int fd[2]; + int error; + + error = do_pipe(fd); + if (!error) { + regs.regs[1] = fd[1]; + return fd[0]; + } + return error; +} + +#if defined(__SH4__) +/* + * To avoid cache alias, we map the shard page with same color. + */ +#define COLOUR_ALIGN(addr) (((addr)+SHMLBA-1)&~(SHMLBA-1)) + +unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, + unsigned long len, unsigned long pgoff, unsigned long flags) +{ + struct vm_area_struct *vma; + + if (flags & MAP_FIXED) { + /* We do not accept a shared mapping if it would violate + * cache aliasing constraints. + */ + if ((flags & MAP_SHARED) && (addr & (SHMLBA - 1))) + return -EINVAL; + return addr; + } + + if (len > TASK_SIZE) + return -ENOMEM; + if (!addr) + addr = TASK_UNMAPPED_BASE; + + addr = COLOUR_ALIGN(addr); + + for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) { + /* At this point: (!vma || addr < vma->vm_end). */ + if (TASK_SIZE - len < addr) + return -ENOMEM; + if (!vma || addr + len <= vma->vm_start) + return addr; + addr = vma->vm_end; + addr = COLOUR_ALIGN(addr); + } +} +#endif + +static inline long +do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, + unsigned long flags, int fd, unsigned long pgoff) +{ + int error = -EBADF; + struct file *file = NULL; + + flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); + if (!(flags & MAP_ANONYMOUS)) { + file = fget(fd); + if (!file) + goto out; + } + + down_write(¤t->mm->mmap_sem); + error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); + up_write(¤t->mm->mmap_sem); + + if (file) + fput(file); +out: + return error; +} + +asmlinkage int old_mmap(unsigned long addr, unsigned long len, + unsigned long prot, unsigned long flags, + int fd, unsigned long off) +{ + if (off & ~PAGE_MASK) + return -EINVAL; + return do_mmap2(addr, len, prot, flags, fd, off>>PAGE_SHIFT); +} + +asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, + unsigned long prot, unsigned long flags, + unsigned long fd, unsigned long pgoff) +{ + return do_mmap2(addr, len, prot, flags, fd, pgoff); +} + +/* + * sys_ipc() is the de-multiplexer for the SysV IPC calls.. + * + * This is really horribly ugly. + */ +asmlinkage int sys_ipc(uint call, int first, int second, + int third, void *ptr, long fifth) +{ + int version, ret; + + version = call >> 16; /* hack for backward compatibility */ + call &= 0xffff; + + if (call <= SEMCTL) + switch (call) { + case SEMOP: + return sys_semop (first, (struct sembuf *)ptr, second); + case SEMGET: + return sys_semget (first, second, third); + case SEMCTL: { + union semun fourth; + if (!ptr) + return -EINVAL; + if (get_user(fourth.__pad, (void **) ptr)) + return -EFAULT; + return sys_semctl (first, second, third, fourth); + } + default: + return -EINVAL; + } + + if (call <= MSGCTL) + switch (call) { + case MSGSND: + return sys_msgsnd (first, (struct msgbuf *) ptr, + second, third); + case MSGRCV: + switch (version) { + case 0: { + struct ipc_kludge tmp; + if (!ptr) + return -EINVAL; + + if (copy_from_user(&tmp, + (struct ipc_kludge *) ptr, + sizeof (tmp))) + return -EFAULT; + return sys_msgrcv (first, tmp.msgp, second, + tmp.msgtyp, third); + } + default: + return sys_msgrcv (first, + (struct msgbuf *) ptr, + second, fifth, third); + } + case MSGGET: + return sys_msgget ((key_t) first, second); + case MSGCTL: + return sys_msgctl (first, second, + (struct msqid_ds *) ptr); + default: + return -EINVAL; + } + if (call <= SHMCTL) + switch (call) { + case SHMAT: + switch (version) { + default: { + ulong raddr; + ret = sys_shmat (first, (char *) ptr, + second, &raddr); + if (ret) + return ret; + return put_user (raddr, (ulong *) third); + } + case 1: /* iBCS2 emulator entry point */ + if (!segment_eq(get_fs(), get_ds())) + return -EINVAL; + return sys_shmat (first, (char *) ptr, + second, (ulong *) third); + } + case SHMDT: + return sys_shmdt ((char *)ptr); + case SHMGET: + return sys_shmget (first, second, third); + case SHMCTL: + return sys_shmctl (first, second, + (struct shmid_ds *) ptr); + default: + return -EINVAL; + } + + return -EINVAL; +} + +asmlinkage int sys_uname(struct old_utsname * name) +{ + int err; + if (!name) + return -EFAULT; + down_read(&uts_sem); + err=copy_to_user(name, &system_utsname, sizeof (*name)); + up_read(&uts_sem); + return err?-EFAULT:0; +} + +asmlinkage int sys_pause(void) +{ + current->state = TASK_INTERRUPTIBLE; + schedule(); + return -ERESTARTNOHAND; +} diff -urN linux-2.4.16/arch/sh/kernel/traps.c linux/arch/sh/kernel/traps.c --- linux-2.4.16/arch/sh/kernel/traps.c Sat Dec 1 21:53:15 2001 +++ linux/arch/sh/kernel/traps.c Sat Dec 1 21:53:52 2001 @@ -560,3 +560,8 @@ } } } + +void show_trace_task(struct task_struct *tsk) +{ + printk("Backtrace not yet implemented for SH.\n"); +} diff -urN linux-2.4.16/arch/sh/overdrive/Makefile linux/arch/sh/overdrive/Makefile --- linux-2.4.16/arch/sh/overdrive/Makefile Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/Makefile Sat Dec 1 21:53:52 2001 @@ -0,0 +1,20 @@ +# +# Makefile for the STMicroelectronics Overdrive specific parts of the kernel +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +all: overdrive.o + +clean: + +O_TARGET := overdrive.o +obj-y := mach.o setup.o io.o led.o + +ifneq ($(CONFIG_SH_GENERIC)$(CONFIG_SH_7750_OVERDRIVE),) +obj-$(CONFIG_PCI) += irq.o fpga.o galileo.o +endif + +include $(TOPDIR)/Rules.make diff -urN linux-2.4.16/arch/sh/overdrive/fpga.c linux/arch/sh/overdrive/fpga.c --- linux-2.4.16/arch/sh/overdrive/fpga.c Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/fpga.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,134 @@ +/* + * Copyright (C) 2000 David J. Mckay (david.mckay@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * This file handles programming up the Altera Flex10K that interfaces to + * the Galileo, and does the PS/2 keyboard and mouse + * + */ + + +#include +#include +#include +#include +#include +#include +#include +#include + + +#include "gt64111.h" +#include "overdrive.h" +#include "fpga.h" + +#define FPGA_NotConfigHigh() (*FPGA_ControlReg) = (*FPGA_ControlReg) | ENABLE_FPGA_BIT +#define FPGA_NotConfigLow() (*FPGA_ControlReg) = (*FPGA_ControlReg) & RESET_FPGA_MASK + +/* I need to find out what (if any) the real delay factor here is */ +/* The delay is definately not critical */ +#define long_delay() {int i;for(i=0;i<10000;i++);} +#define short_delay() {int i;for(i=0;i<100;i++);} + +static void __init program_overdrive_fpga(const unsigned char *fpgacode, + int size) +{ + int timeout = 0; + int i, j; + unsigned char b; + static volatile unsigned char *FPGA_ControlReg = + (volatile unsigned char *) (OVERDRIVE_CTRL); + static volatile unsigned char *FPGA_ProgramReg = + (volatile unsigned char *) (FPGA_DCLK_ADDRESS); + + printk("FPGA: Commencing FPGA Programming\n"); + + /* The PCI reset but MUST be low when programming the FPGA !!! */ + b = (*FPGA_ControlReg) & RESET_PCI_MASK; + + (*FPGA_ControlReg) = b; + + /* Prepare FPGA to program */ + + FPGA_NotConfigHigh(); + long_delay(); + + FPGA_NotConfigLow(); + short_delay(); + + while ((*FPGA_ProgramReg & FPGA_NOT_STATUS) != 0) { + printk("FPGA: Waiting for NotStatus to go Low ... \n"); + } + + FPGA_NotConfigHigh(); + + /* Wait for FPGA "ready to be programmed" signal */ + printk("FPGA: Waiting for NotStatus to go high (FPGA ready)... \n"); + + for (timeout = 0; + (((*FPGA_ProgramReg & FPGA_NOT_STATUS) == 0) + && (timeout < FPGA_TIMEOUT)); timeout++); + + /* Check if timeout condition occured - i.e. an error */ + + if (timeout == FPGA_TIMEOUT) { + printk + ("FPGA: Failed to program - Timeout waiting for notSTATUS to go high\n"); + return; + } + + printk("FPGA: Copying data to FPGA ... %d bytes\n", size); + + /* Copy array to FPGA - bit at a time */ + + for (i = 0; i < size; i++) { + volatile unsigned w = 0; + + for (j = 0; j < 8; j++) { + *FPGA_ProgramReg = (fpgacode[i] >> j) & 0x01; + short_delay(); + } + if ((i & 0x3ff) == 0) { + printk("."); + } + } + + /* Waiting for CONFDONE to go high - means the program is complete */ + + for (timeout = 0; + (((*FPGA_ProgramReg & FPGA_CONFDONE) == 0) + && (timeout < FPGA_TIMEOUT)); timeout++) { + + *FPGA_ProgramReg = 0x0; + long_delay(); + } + + if (timeout == FPGA_TIMEOUT) { + printk + ("FPGA: Failed to program - Timeout waiting for CONFDONE to go high\n"); + return; + } else { /* Clock another 10 times - gets the device into a working state */ + for (i = 0; i < 10; i++) { + *FPGA_ProgramReg = 0x0; + short_delay(); + } + } + + printk("FPGA: Programming complete\n"); +} + + +static const unsigned char __init fpgacode[] = { +#include "./overdrive.ttf" /* Code from maxplus2 compiler */ + , 0, 0 +}; + + +int __init init_overdrive_fpga(void) +{ + program_overdrive_fpga(fpgacode, sizeof(fpgacode)); + + return 0; +} diff -urN linux-2.4.16/arch/sh/overdrive/fpga.h linux/arch/sh/overdrive/fpga.h --- linux-2.4.16/arch/sh/overdrive/fpga.h Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/fpga.h Sat Dec 1 21:53:52 2001 @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2000 David J. Mckay (david.mckay@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + */ + +#ifndef __FPGA_OD_H__ +#define __FPGA_OD_H__ + +/* This routine will program up the fpga which interfaces to the galileo */ +int init_overdrive_fpga(void); + +#endif diff -urN linux-2.4.16/arch/sh/overdrive/galileo.c linux/arch/sh/overdrive/galileo.c --- linux-2.4.16/arch/sh/overdrive/galileo.c Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/galileo.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,594 @@ +/* + * Copyright (C) 2000 David J. Mckay (david.mckay@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * This file contains the PCI routines required for the Galileo GT6411 + * PCI bridge as used on the Orion and Overdrive boards. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "overdrive.h" +#include "gt64111.h" + + +/* After boot, we shift the Galileo registers so that they appear + * in BANK6, along with IO space. This means we can have one contingous + * lump of PCI address space without these registers appearing in the + * middle of them + */ + +#define GT64111_BASE_ADDRESS 0xbb000000 +#define GT64111_IO_BASE_ADDRESS 0x1000 +/* The GT64111 registers appear at this address to the SH4 after reset */ +#define RESET_GT64111_BASE_ADDRESS 0xb4000000 + +/* Macros used to access the Galileo registers */ +#define RESET_GT64111_REG(x) (RESET_GT64111_BASE_ADDRESS+x) +#define GT64111_REG(x) (GT64111_BASE_ADDRESS+x) + +#define RESET_GT_WRITE(x,v) writel((v),RESET_GT64111_REG(x)) + +#define RESET_GT_READ(x) readl(RESET_GT64111_REG(x)) + +#define GT_WRITE(x,v) writel((v),GT64111_REG(x)) +#define GT_WRITE_BYTE(x,v) writeb((v),GT64111_REG(x)) +#define GT_WRITE_SHORT(x,v) writew((v),GT64111_REG(x)) + +#define GT_READ(x) readl(GT64111_REG(x)) +#define GT_READ_BYTE(x) readb(GT64111_REG(x)) +#define GT_READ_SHORT(x) readw(GT64111_REG(x)) + + +/* Where the various SH banks start at */ +#define SH_BANK4_ADR 0xb0000000 +#define SH_BANK5_ADR 0xb4000000 +#define SH_BANK6_ADR 0xb8000000 + +/* Masks out everything but lines 28,27,26 */ +#define BANK_SELECT_MASK 0x1c000000 + +#define SH4_TO_BANK(x) ( (x) & BANK_SELECT_MASK) + +/* + * Masks used for address conversaion. Bank 6 is used for IO and + * has all the address bits zeroed by the FPGA. Special case this + */ +#define MEMORY_BANK_MASK 0x1fffffff +#define IO_BANK_MASK 0x03ffffff + +/* Mark bank 6 as the bank used for IO. You can change this in the FPGA code + * if you want + */ +#define IO_BANK_ADR PCI_GTIO_BASE + +/* Will select the correct mask to apply depending on the SH$ address */ +#define SELECT_BANK_MASK(x) \ + ( (SH4_TO_BANK(x)==SH4_TO_BANK(IO_BANK_ADR)) ? IO_BANK_MASK : MEMORY_BANK_MASK) + +/* Converts between PCI space and P2 region */ +#define SH4_TO_PCI(x) ((x)&SELECT_BANK_MASK(x)) + +/* Various macros for figuring out what to stick in the Galileo registers. + * You *really* don't want to figure this stuff out by hand, you always get + * it wrong + */ +#define GT_MEM_LO_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>21)&0x7ff) +#define GT_MEM_HI_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>21)&0x7f) +#define GT_MEM_SUB_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>20)&0xff) + +#define PROGRAM_HI_LO(block,a,s) \ + GT_WRITE(block##_LO_DEC_ADR,GT_MEM_LO_ADR(a));\ + GT_WRITE(block##_HI_DEC_ADR,GT_MEM_HI_ADR(a+s-1)) + +#define PROGRAM_SUB_HI_LO(block,a,s) \ + GT_WRITE(block##_LO_DEC_ADR,GT_MEM_SUB_ADR(a));\ + GT_WRITE(block##_HI_DEC_ADR,GT_MEM_SUB_ADR(a+s-1)) + +/* We need to set the size, and the offset register */ + +#define GT_BAR_MASK(x) ((x)&~0xfff) + +/* Macro to set up the BAR in the Galileo. Essentially used for the DRAM */ +#define PROGRAM_GT_BAR(block,a,s) \ + GT_WRITE(PCI_##block##_BANK_SIZE,GT_BAR_MASK((s-1)));\ + write_config_to_galileo(PCI_CONFIG_##block##_BASE_ADR,\ + GT_BAR_MASK(a)) + +#define DISABLE_GT_BAR(block) \ + GT_WRITE(PCI_##block##_BANK_SIZE,0),\ + GT_CONFIG_WRITE(PCI_CONFIG_##block##_BASE_ADR,\ + 0x80000000) + +/* Macros to disable things we are not going to use */ +#define DISABLE_DECODE(x) GT_WRITE(x##_LO_DEC_ADR,0x7ff);\ + GT_WRITE(x##_HI_DEC_ADR,0x00) + +#define DISABLE_SUB_DECODE(x) GT_WRITE(x##_LO_DEC_ADR,0xff);\ + GT_WRITE(x##_HI_DEC_ADR,0x00) + +static void __init reset_pci(void) +{ + /* Set RESET_PCI bit high */ + writeb(readb(OVERDRIVE_CTRL) | ENABLE_PCI_BIT, OVERDRIVE_CTRL); + udelay(250); + + /* Set RESET_PCI bit low */ + writeb(readb(OVERDRIVE_CTRL) & RESET_PCI_MASK, OVERDRIVE_CTRL); + udelay(250); + + writeb(readb(OVERDRIVE_CTRL) | ENABLE_PCI_BIT, OVERDRIVE_CTRL); + udelay(250); +} + +static int write_config_to_galileo(int where, u32 val); +#define GT_CONFIG_WRITE(where,val) write_config_to_galileo(where,val) + +#define ENABLE_PCI_DRAM + + +#ifdef TEST_DRAM +/* Test function to check out if the PCI DRAM is working OK */ +static int /* __init */ test_dram(unsigned *base, unsigned size) +{ + unsigned *p = base; + unsigned *end = (unsigned *) (((unsigned) base) + size); + unsigned w; + + for (p = base; p < end; p++) { + *p = 0xffffffff; + if (*p != 0xffffffff) { + printk("AAARGH -write failed!!! at %p is %x\n", p, + *p); + return 0; + } + *p = 0x0; + if (*p != 0x0) { + printk("AAARGH -write failed!!!\n"); + return 0; + } + } + + for (p = base; p < end; p++) { + *p = (unsigned) p; + if (*p != (unsigned) p) { + printk("Failed at 0x%p, actually is 0x%x\n", p, + *p); + return 0; + } + } + + for (p = base; p < end; p++) { + w = ((unsigned) p & 0xffff0000); + *p = w | (w >> 16); + } + + for (p = base; p < end; p++) { + w = ((unsigned) p & 0xffff0000); + w |= (w >> 16); + if (*p != w) { + printk + ("Failed at 0x%p, should be 0x%x actually is 0x%x\n", + p, w, *p); + return 0; + } + } + + return 1; +} +#endif + + +/* Function to set up and initialise the galileo. This sets up the BARS, + * maps the DRAM into the address space etc,etc + */ +int __init galileo_init(void) +{ + reset_pci(); + + /* Now shift the galileo regs into this block */ + RESET_GT_WRITE(INTERNAL_SPACE_DEC, + GT_MEM_LO_ADR(GT64111_BASE_ADDRESS)); + + /* Should have a sanity check here, that you can read back at the new + * address what you just wrote + */ + + /* Disable decode for all regions */ + DISABLE_DECODE(RAS10); + DISABLE_DECODE(RAS32); + DISABLE_DECODE(CS20); + DISABLE_DECODE(CS3); + DISABLE_DECODE(PCI_IO); + DISABLE_DECODE(PCI_MEM0); + DISABLE_DECODE(PCI_MEM1); + + /* Disable all BARS */ + GT_WRITE(BAR_ENABLE_ADR, 0x1ff); + DISABLE_GT_BAR(RAS10); + DISABLE_GT_BAR(RAS32); + DISABLE_GT_BAR(CS20); + DISABLE_GT_BAR(CS3); + + /* Tell the BAR where the IO registers now are */ + GT_CONFIG_WRITE(PCI_CONFIG_INT_REG_IO_ADR,GT_BAR_MASK( + (GT64111_IO_BASE_ADDRESS & + IO_BANK_MASK))); + /* set up a 112 Mb decode */ + PROGRAM_HI_LO(PCI_MEM0, SH_BANK4_ADR, 112 * 1024 * 1024); + + /* Set up a 32 MB io space decode */ + PROGRAM_HI_LO(PCI_IO, IO_BANK_ADR, 32 * 1024 * 1024); + +#ifdef ENABLE_PCI_DRAM + /* Program up the DRAM configuration - there is DRAM only in bank 0 */ + /* Now set up the DRAM decode */ + PROGRAM_HI_LO(RAS10, PCI_DRAM_BASE, PCI_DRAM_SIZE); + /* And the sub decode */ + PROGRAM_SUB_HI_LO(RAS0, PCI_DRAM_BASE, PCI_DRAM_SIZE); + + DISABLE_SUB_DECODE(RAS1); + + /* Set refresh rate */ + GT_WRITE(DRAM_BANK0_PARMS, 0x3f); + GT_WRITE(DRAM_CFG, 0x100); + + /* we have to lob off the top bits rememeber!! */ + PROGRAM_GT_BAR(RAS10, SH4_TO_PCI(PCI_DRAM_BASE), PCI_DRAM_SIZE); + +#endif + + /* We are only interested in decoding RAS10 and the Galileo's internal + * registers (as IO) on the PCI bus + */ +#ifdef ENABLE_PCI_DRAM + GT_WRITE(BAR_ENABLE_ADR, (~((1 << 8) | (1 << 3))) & 0x1ff); +#else + GT_WRITE(BAR_ENABLE_ADR, (~(1 << 3)) & 0x1ff); +#endif + + /* Change the class code to host bridge, it actually powers up + * as a memory controller + */ + GT_CONFIG_WRITE(8, 0x06000011); + + /* Allow the galileo to master the PCI bus */ + GT_CONFIG_WRITE(PCI_COMMAND, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | + PCI_COMMAND_IO); + + +#if 0 + printk("Testing PCI DRAM - "); + if(test_dram(PCI_DRAM_BASE,PCI_DRAM_SIZE)) { + printk("Passed\n"); + }else { + printk("FAILED\n"); + } +#endif + return 0; + +} + + +#define SET_CONFIG_BITS(bus,devfn,where)\ + ((1<<31) | ((bus) << 16) | ((devfn) << 8) | ((where) & ~3)) + +#define CONFIG_CMD(dev, where) SET_CONFIG_BITS((dev)->bus->number,(dev)->devfn,where) + +/* This write to the galileo config registers, unlike the functions below, can + * be used before the PCI subsystem has started up + */ +static int __init write_config_to_galileo(int where, u32 val) +{ + GT_WRITE(PCI_CFG_ADR, SET_CONFIG_BITS(0, 0, where)); + + GT_WRITE(PCI_CFG_DATA, val); + return 0; +} + +/* We exclude the galileo and slot 31, the galileo because I don't know how to stop + * the setup code shagging up the setup I have done on it, and 31 because the whole + * thing locks up if you try to access that slot (which doesn't exist of course anyway + */ + +#define EXCLUDED_DEV(dev) ((dev->bus->number==0) && ((PCI_SLOT(dev->devfn)==0) || (PCI_SLOT(dev->devfn) == 31))) + +static int galileo_read_config_byte(struct pci_dev *dev, int where, + u8 * val) +{ + + + /* I suspect this doesn't work because this drives a special cycle ? */ + if (EXCLUDED_DEV(dev)) { + *val = 0xff; + return PCIBIOS_SUCCESSFUL; + } + /* Start the config cycle */ + GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where)); + /* Read back the result */ + *val = GT_READ_BYTE(PCI_CFG_DATA + (where & 3)); + + return PCIBIOS_SUCCESSFUL; +} + + +static int galileo_read_config_word(struct pci_dev *dev, int where, + u16 * val) +{ + + if (EXCLUDED_DEV(dev)) { + *val = 0xffff; + return PCIBIOS_SUCCESSFUL; + } + + GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where)); + *val = GT_READ_SHORT(PCI_CFG_DATA + (where & 2)); + + return PCIBIOS_SUCCESSFUL; +} + + +static int galileo_read_config_dword(struct pci_dev *dev, int where, + u32 * val) +{ + if (EXCLUDED_DEV(dev)) { + *val = 0xffffffff; + return PCIBIOS_SUCCESSFUL; + } + + GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where)); + *val = GT_READ(PCI_CFG_DATA); + + return PCIBIOS_SUCCESSFUL; +} + +static int galileo_write_config_byte(struct pci_dev *dev, int where, + u8 val) +{ + GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where)); + + GT_WRITE_BYTE(PCI_CFG_DATA + (where & 3), val); + + return PCIBIOS_SUCCESSFUL; +} + + +static int galileo_write_config_word(struct pci_dev *dev, int where, + u16 val) +{ + GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where)); + + GT_WRITE_SHORT(PCI_CFG_DATA + (where & 2), val); + + return PCIBIOS_SUCCESSFUL; +} + +static int galileo_write_config_dword(struct pci_dev *dev, int where, + u32 val) +{ + GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where)); + + GT_WRITE(PCI_CFG_DATA, val); + + return PCIBIOS_SUCCESSFUL; +} + +static struct pci_ops pci_config_ops = { + galileo_read_config_byte, + galileo_read_config_word, + galileo_read_config_dword, + galileo_write_config_byte, + galileo_write_config_word, + galileo_write_config_dword +}; + + +/* Everything hangs off this */ +static struct pci_bus *pci_root_bus; + + +static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin) +{ + return PCI_SLOT(dev->devfn); +} + +static int __init map_od_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + /* Slot 1: Galileo + * Slot 2: PCI Slot 1 + * Slot 3: PCI Slot 2 + * Slot 4: ESS + */ + switch (slot) { + case 2: + return OVERDRIVE_PCI_IRQ1; + case 3: + /* Note this assumes you have a hacked card in slot 2 */ + return OVERDRIVE_PCI_IRQ2; + case 4: + return OVERDRIVE_ESS_IRQ; + default: + /* printk("PCI: Unexpected IRQ mapping request for slot %d\n", slot); */ + return -1; + } +} + + + +void __init +pcibios_fixup_pbus_ranges(struct pci_bus *bus, struct pbus_set_ranges_data *ranges) +{ + ranges->io_start -= bus->resource[0]->start; + ranges->io_end -= bus->resource[0]->start; + ranges->mem_start -= bus->resource[1]->start; + ranges->mem_end -= bus->resource[1]->start; +} + +static void __init pci_fixup_ide_bases(struct pci_dev *d) +{ + int i; + + /* + * PCI IDE controllers use non-standard I/O port decoding, respect it. + */ + if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) + return; + printk("PCI: IDE base address fixup for %s\n", d->slot_name); + for(i=0; i<4; i++) { + struct resource *r = &d->resource[i]; + if ((r->start & ~0x80) == 0x374) { + r->start |= 2; + r->end = r->start; + } + } +} + + +/* Add future fixups here... */ +struct pci_fixup pcibios_fixups[] = { + { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases }, + { 0 } +}; + +void __init pcibios_init(void) +{ + static struct resource galio,galmem; + + /* Allocate the registers used by the Galileo */ + galio.flags = IORESOURCE_IO; + galio.name = "Galileo GT64011"; + galmem.flags = IORESOURCE_MEM|IORESOURCE_PREFETCH; + galmem.name = "Galileo GT64011 DRAM"; + + allocate_resource(&ioport_resource, &galio, 256, + GT64111_IO_BASE_ADDRESS,GT64111_IO_BASE_ADDRESS+256, 256, NULL, NULL); + allocate_resource(&iomem_resource, &galmem,PCI_DRAM_SIZE, + PHYSADDR(PCI_DRAM_BASE), PHYSADDR(PCI_DRAM_BASE)+PCI_DRAM_SIZE, + PCI_DRAM_SIZE, NULL, NULL); + + /* ok, do the scan man */ + pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL); + + pci_assign_unassigned_resources(); + pci_fixup_irqs(no_swizzle, map_od_irq); + +#ifdef TEST_DRAM + printk("Testing PCI DRAM - "); + if(test_dram(PCI_DRAM_BASE,PCI_DRAM_SIZE)) { + printk("Passed\n"); + }else { + printk("FAILED\n"); + } +#endif + +} + +char * __init pcibios_setup(char *str) +{ + return str; +} + + + +int pcibios_enable_device(struct pci_dev *dev) +{ + + u16 cmd, old_cmd; + int idx; + struct resource *r; + + pci_read_config_word(dev, PCI_COMMAND, &cmd); + old_cmd = cmd; + for (idx = 0; idx < 6; idx++) { + r = dev->resource + idx; + if (!r->start && r->end) { + printk(KERN_ERR + "PCI: Device %s not available because" + " of resource collisions\n", + dev->slot_name); + return -EINVAL; + } + if (r->flags & IORESOURCE_IO) + cmd |= PCI_COMMAND_IO; + if (r->flags & IORESOURCE_MEM) + cmd |= PCI_COMMAND_MEMORY; + } + if (cmd != old_cmd) { + printk("PCI: enabling device %s (%04x -> %04x)\n", + dev->slot_name, old_cmd, cmd); + pci_write_config_word(dev, PCI_COMMAND, cmd); + } + return 0; + +} + +/* We should do some optimisation work here I think. Ok for now though */ +void __init pcibios_fixup_bus(struct pci_bus *bus) +{ + +} + +void pcibios_align_resource(void *data, struct resource *res, + unsigned long size) +{ +} + +void __init pcibios_update_resource(struct pci_dev *dev, struct resource *root, + struct resource *res, int resource) +{ + + unsigned long where, size; + u32 reg; + + + printk("PCI: Assigning %3s %08lx to %s\n", + res->flags & IORESOURCE_IO ? "IO" : "MEM", + res->start, dev->name); + + where = PCI_BASE_ADDRESS_0 + resource * 4; + size = res->end - res->start; + + pci_read_config_dword(dev, where, ®); + reg = (reg & size) | (((u32) (res->start - root->start)) & ~size); + pci_write_config_dword(dev, where, reg); +} + + +void __init pcibios_update_irq(struct pci_dev *dev, int irq) +{ + printk("PCI: Assigning IRQ %02d to %s\n", irq, dev->name); + pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); +} + +/* + * If we set up a device for bus mastering, we need to check the latency + * timer as certain crappy BIOSes forget to set it properly. + */ +unsigned int pcibios_max_latency = 255; + +void pcibios_set_master(struct pci_dev *dev) +{ + u8 lat; + pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); + if (lat < 16) + lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; + else if (lat > pcibios_max_latency) + lat = pcibios_max_latency; + else + return; + printk("PCI: Setting latency timer of device %s to %d\n", dev->slot_name, lat); + pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); +} diff -urN linux-2.4.16/arch/sh/overdrive/gt64111.h linux/arch/sh/overdrive/gt64111.h --- linux-2.4.16/arch/sh/overdrive/gt64111.h Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/gt64111.h Sat Dec 1 21:53:52 2001 @@ -0,0 +1,109 @@ +#ifndef _GT64111_H_ +#define _GT64111_H_ + +#define MASTER_INTERFACE 0x0 +#define RAS10_LO_DEC_ADR 0x8 +#define RAS10_HI_DEC_ADR 0x10 +#define RAS32_LO_DEC_ADR 0x18 +#define RAS32_HI_DEC_ADR 0x20 +#define CS20_LO_DEC_ADR 0x28 +#define CS20_HI_DEC_ADR 0x30 +#define CS3_LO_DEC_ADR 0x38 +#define CS3_HI_DEC_ADR 0x40 +#define PCI_IO_LO_DEC_ADR 0x48 +#define PCI_IO_HI_DEC_ADR 0x50 +#define PCI_MEM0_LO_DEC_ADR 0x58 +#define PCI_MEM0_HI_DEC_ADR 0x60 +#define INTERNAL_SPACE_DEC 0x68 +#define BUS_ERR_ADR_LO_CPU 0x70 +#define READONLY0 0x78 +#define PCI_MEM1_LO_DEC_ADR 0x80 +#define PCI_MEM1_HI_DEC_ADR 0x88 +#define RAS0_LO_DEC_ADR 0x400 +#define RAS0_HI_DEC_ADR 0x404 +#define RAS1_LO_DEC_ADR 0x408 +#define RAS1_HI_DEC_ADR 0x40c +#define RAS2_LO_DEC_ADR 0x410 +#define RAS2_HI_DEC_ADR 0x414 +#define RAS3_LO_DEC_ADR 0x418 +#define RAS3_HI_DEC_ADR 0x41c +#define DEV_CS0_LO_DEC_ADR 0x420 +#define DEV_CS0_HI_DEC_ADR 0x424 +#define DEV_CS1_LO_DEC_ADR 0x428 +#define DEV_CS1_HI_DEC_ADR 0x42c +#define DEV_CS2_LO_DEC_ADR 0x430 +#define DEV_CS2_HI_DEC_ADR 0x434 +#define DEV_CS3_LO_DEC_ADR 0x438 +#define DEV_CS3_HI_DEC_ADR 0x43c +#define DEV_BOOTCS_LO_DEC_ADR 0x440 +#define DEV_BOOTCS_HI_DEC_ADR 0x444 +#define DEV_ADR_DEC_ERR 0x470 +#define DRAM_CFG 0x448 +#define DRAM_BANK0_PARMS 0x44c +#define DRAM_BANK1_PARMS 0x450 +#define DRAM_BANK2_PARMS 0x454 +#define DRAM_BANK3_PARMS 0x458 +#define DEV_BANK0_PARMS 0x45c +#define DEV_BANK1_PARMS 0x460 +#define DEV_BANK2_PARMS 0x464 +#define DEV_BANK3_PARMS 0x468 +#define DEV_BOOT_BANK_PARMS 0x46c +#define CH0_DMA_BYTECOUNT 0x800 +#define CH1_DMA_BYTECOUNT 0x804 +#define CH2_DMA_BYTECOUNT 0x808 +#define CH3_DMA_BYTECOUNT 0x80c +#define CH0_DMA_SRC_ADR 0x810 +#define CH1_DMA_SRC_ADR 0x814 +#define CH2_DMA_SRC_ADR 0x818 +#define CH3_DMA_SRC_ADR 0x81c +#define CH0_DMA_DST_ADR 0x820 +#define CH1_DMA_DST_ADR 0x824 +#define CH2_DMA_DST_ADR 0x828 +#define CH3_DMA_DST_ADR 0x82c +#define CH0_NEXT_REC_PTR 0x830 +#define CH1_NEXT_REC_PTR 0x834 +#define CH2_NEXT_REC_PTR 0x838 +#define CH3_NEXT_REC_PTR 0x83c +#define CH0_CTRL 0x840 +#define CH1_CTRL 0x844 +#define CH2_CTRL 0x848 +#define CH3_CTRL 0x84c +#define DMA_ARBITER 0x860 +#define TIMER0 0x850 +#define TIMER1 0x854 +#define TIMER2 0x858 +#define TIMER3 0x85c +#define TIMER_CTRL 0x864 +#define PCI_CMD 0xc00 +#define PCI_TIMEOUT 0xc04 +#define PCI_RAS10_BANK_SIZE 0xc08 +#define PCI_RAS32_BANK_SIZE 0xc0c +#define PCI_CS20_BANK_SIZE 0xc10 +#define PCI_CS3_BANK_SIZE 0xc14 +#define PCI_SERRMASK 0xc28 +#define PCI_INTACK 0xc34 +#define PCI_BAR_EN 0xc3c +#define PCI_CFG_ADR 0xcf8 +#define PCI_CFG_DATA 0xcfc +#define PCI_INTCAUSE 0xc18 +#define PCI_MAST_MASK 0xc1c +#define PCI_PCIMASK 0xc24 +#define BAR_ENABLE_ADR 0xc3c + +/* These are config registers, accessible via PCI space */ +#define PCI_CONFIG_RAS10_BASE_ADR 0x010 +#define PCI_CONFIG_RAS32_BASE_ADR 0x014 +#define PCI_CONFIG_CS20_BASE_ADR 0x018 +#define PCI_CONFIG_CS3_BASE_ADR 0x01c +#define PCI_CONFIG_INT_REG_MM_ADR 0x020 +#define PCI_CONFIG_INT_REG_IO_ADR 0x024 +#define PCI_CONFIG_BOARD_VENDOR 0x02c +#define PCI_CONFIG_ROM_ADR 0x030 +#define PCI_CONFIG_INT_PIN_LINE 0x03c + + + + + +#endif + diff -urN linux-2.4.16/arch/sh/overdrive/io.c linux/arch/sh/overdrive/io.c --- linux-2.4.16/arch/sh/overdrive/io.c Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/io.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2000 David J. Mckay (david.mckay@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * This file contains the I/O routines for use on the overdrive board + * + */ + +#include +#include +#include +#include +#include +#include + +#include "overdrive.h" + +/* + * readX/writeX() are used to access memory mapped devices. On some + * architectures the memory mapped IO stuff needs to be accessed + * differently. On the SuperH architecture, we just read/write the + * memory location directly. + */ + +#define dprintk(x...) + +/* Translates an IO address to where it is mapped in memory */ + +#define io_addr(x) (((unsigned)(x))|PCI_GTIO_BASE) + +unsigned char od_inb(unsigned long port) +{ +dprintk("od_inb(%x)\n", port); + return readb(io_addr(port)) & 0xff; +} + + +unsigned short od_inw(unsigned long port) +{ +dprintk("od_inw(%x)\n", port); + return readw(io_addr(port)) & 0xffff; +} + +unsigned int od_inl(unsigned long port) +{ +dprintk("od_inl(%x)\n", port); + return readl(io_addr(port)); +} + +void od_outb(unsigned char value, unsigned long port) +{ +dprintk("od_outb(%x, %x)\n", value, port); + writeb(value, io_addr(port)); +} + +void od_outw(unsigned short value, unsigned long port) +{ +dprintk("od_outw(%x, %x)\n", value, port); + writew(value, io_addr(port)); +} + +void od_outl(unsigned int value, unsigned long port) +{ +dprintk("od_outl(%x, %x)\n", value, port); + writel(value, io_addr(port)); +} + +/* This is horrible at the moment - needs more work to do something sensible */ +#define IO_DELAY() udelay(10) + +#define OUT_DELAY(x,type) \ +void od_out##x##_p(unsigned type value,unsigned long port){out##x(value,port);IO_DELAY();} + +#define IN_DELAY(x,type) \ +unsigned type od_in##x##_p(unsigned long port) {unsigned type tmp=in##x(port);IO_DELAY();return tmp;} + + +OUT_DELAY(b,char) +OUT_DELAY(w,short) +OUT_DELAY(l,int) + +IN_DELAY(b,char) +IN_DELAY(w,short) +IN_DELAY(l,int) + + +/* Now for the string version of these functions */ +void od_outsb(unsigned long port, const void *addr, unsigned long count) +{ + int i; + unsigned char *p = (unsigned char *) addr; + + for (i = 0; i < count; i++, p++) { + outb(*p, port); + } +} + + +void od_insb(unsigned long port, void *addr, unsigned long count) +{ + int i; + unsigned char *p = (unsigned char *) addr; + + for (i = 0; i < count; i++, p++) { + *p = inb(port); + } +} + +/* For the 16 and 32 bit string functions, we have to worry about alignment. + * The SH does not do unaligned accesses, so we have to read as bytes and + * then write as a word or dword. + * This can be optimised a lot more, especially in the case where the data + * is aligned + */ + +void od_outsw(unsigned long port, const void *addr, unsigned long count) +{ + int i; + unsigned short tmp; + unsigned char *p = (unsigned char *) addr; + + for (i = 0; i < count; i++, p += 2) { + tmp = (*p) | ((*(p + 1)) << 8); + outw(tmp, port); + } +} + + +void od_insw(unsigned long port, void *addr, unsigned long count) +{ + int i; + unsigned short tmp; + unsigned char *p = (unsigned char *) addr; + + for (i = 0; i < count; i++, p += 2) { + tmp = inw(port); + p[0] = tmp & 0xff; + p[1] = (tmp >> 8) & 0xff; + } +} + + +void od_outsl(unsigned long port, const void *addr, unsigned long count) +{ + int i; + unsigned tmp; + unsigned char *p = (unsigned char *) addr; + + for (i = 0; i < count; i++, p += 4) { + tmp = (*p) | ((*(p + 1)) << 8) | ((*(p + 2)) << 16) | + ((*(p + 3)) << 24); + outl(tmp, port); + } +} + + +void od_insl(unsigned long port, void *addr, unsigned long count) +{ + int i; + unsigned tmp; + unsigned char *p = (unsigned char *) addr; + + for (i = 0; i < count; i++, p += 4) { + tmp = inl(port); + p[0] = tmp & 0xff; + p[1] = (tmp >> 8) & 0xff; + p[2] = (tmp >> 16) & 0xff; + p[3] = (tmp >> 24) & 0xff; + + } +} diff -urN linux-2.4.16/arch/sh/overdrive/io_od.h linux/arch/sh/overdrive/io_od.h --- linux-2.4.16/arch/sh/overdrive/io_od.h Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/io_od.h Sat Dec 1 21:53:52 2001 @@ -0,0 +1,77 @@ +/* + * include/asm-sh/io_od.h + * + * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * IO functions for an STMicroelectronics Overdrive + */ + +#ifndef _ASM_SH_IO_OD_H +#define _ASM_SH_IO_OD_H + +#include + +extern unsigned char od_inb(unsigned long port); +extern unsigned short od_inw(unsigned long port); +extern unsigned int od_inl(unsigned long port); + +extern void od_outb(unsigned char value, unsigned long port); +extern void od_outw(unsigned short value, unsigned long port); +extern void od_outl(unsigned int value, unsigned long port); + +extern unsigned char od_inb_p(unsigned long port); +extern unsigned short od_inw_p(unsigned long port); +extern unsigned int od_inl_p(unsigned long port); +extern void od_outb_p(unsigned char value, unsigned long port); +extern void od_outw_p(unsigned short value, unsigned long port); +extern void od_outl_p(unsigned int value, unsigned long port); + +extern void od_insb(unsigned long port, void *addr, unsigned long count); +extern void od_insw(unsigned long port, void *addr, unsigned long count); +extern void od_insl(unsigned long port, void *addr, unsigned long count); +extern void od_outsb(unsigned long port, const void *addr, unsigned long count); +extern void od_outsw(unsigned long port, const void *addr, unsigned long count); +extern void od_outsl(unsigned long port, const void *addr, unsigned long count); + +extern unsigned long od_isa_port2addr(unsigned long offset); + +#ifdef __WANT_IO_DEF + +# define __inb od_inb +# define __inw od_inw +# define __inl od_inl +# define __outb od_outb +# define __outw od_outw +# define __outl od_outl + +# define __inb_p od_inb_p +# define __inw_p od_inw_p +# define __inl_p od_inl_p +# define __outb_p od_outb_p +# define __outw_p od_outw_p +# define __outl_p od_outl_p + +# define __insb od_insb +# define __insw od_insw +# define __insl od_insl +# define __outsb od_outsb +# define __outsw od_outsw +# define __outsl od_outsl + +# define __readb generic_readb +# define __readw generic_readw +# define __readl generic_readl +# define __writeb generic_writeb +# define __writew generic_writew +# define __writel generic_writel + +# define __isa_port2addr od_isa_port2addr +# define __ioremap generic_ioremap +# define __iounmap generic_iounmap + +#endif + +#endif /* _ASM_SH_IO_OD_H */ diff -urN linux-2.4.16/arch/sh/overdrive/irq.c linux/arch/sh/overdrive/irq.c --- linux-2.4.16/arch/sh/overdrive/irq.c Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/irq.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,192 @@ +/* + * Copyright (C) 2000 David J. Mckay (david.mckay@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Looks after interrupts on the overdrive board. + * + * Bases on the IPR irq system + */ + +#include +#include +#include + +#include +#include + +#include "overdrive.h" + +struct od_data { + int overdrive_irq; + int irq_mask; +}; + +#define NUM_EXTERNAL_IRQS 16 +#define EXTERNAL_IRQ_NOT_IN_USE (-1) +#define EXTERNAL_IRQ_NOT_ASSIGNED (-1) + +/* + * This table is used to determine what to program into the FPGA's CT register + * for the specified Linux IRQ. + * + * The irq_mask gives the interrupt number from the PCI board (PCI_Int(6:0)) + * but is one greater than that because the because the FPGA treats 0 + * as disabled, a value of 1 asserts PCI_Int0, and so on. + * + * The overdrive_irq specifies which of the eight interrupt sources generates + * that interrupt, and but is multiplied by four to give the bit offset into + * the CT register. + * + * The seven interrupts levels (SH4 IRL's) we have available here is hardwired + * by the EPLD. The assignments here of which PCI interrupt generates each + * level is arbitary. + */ +static struct od_data od_data_table[NUM_EXTERNAL_IRQS] = { + /* overdrive_irq , irq_mask */ + {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 0 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, 7}, /* 1 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, 6}, /* 2 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 3 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, 5}, /* 4 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 5 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 6 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, 4}, /* 7 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 8 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 9 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, 3}, /* 10 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, 2}, /* 11 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 12 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, 1}, /* 13 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 14 */ + {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE} /* 15 */ +}; + +static void set_od_data(int overdrive_irq, int irq) +{ + if (irq >= NUM_EXTERNAL_IRQS || irq < 0) + return; + od_data_table[irq].overdrive_irq = overdrive_irq << 2; +} + +static void enable_od_irq(unsigned int irq); +void disable_od_irq(unsigned int irq); + +/* shutdown is same as "disable" */ +#define shutdown_od_irq disable_od_irq + +static void mask_and_ack_od(unsigned int); +static void end_od_irq(unsigned int irq); + +static unsigned int startup_od_irq(unsigned int irq) +{ + enable_od_irq(irq); + return 0; /* never anything pending */ +} + +static struct hw_interrupt_type od_irq_type = { + "Overdrive-IRQ", + startup_od_irq, + shutdown_od_irq, + enable_od_irq, + disable_od_irq, + mask_and_ack_od, + end_od_irq +}; + +static void disable_od_irq(unsigned int irq) +{ + unsigned val, flags; + int overdrive_irq; + unsigned mask; + + /* Not a valid interrupt */ + if (irq < 0 || irq >= NUM_EXTERNAL_IRQS) + return; + + /* Is is necessary to use a cli here? Would a spinlock not be + * mroe efficient? + */ + save_and_cli(flags); + overdrive_irq = od_data_table[irq].overdrive_irq; + if (overdrive_irq != EXTERNAL_IRQ_NOT_ASSIGNED) { + mask = ~(0x7 << overdrive_irq); + val = ctrl_inl(OVERDRIVE_INT_CT); + val &= mask; + ctrl_outl(val, OVERDRIVE_INT_CT); + } + restore_flags(flags); +} + +static void enable_od_irq(unsigned int irq) +{ + unsigned val, flags; + int overdrive_irq; + unsigned mask; + + /* Not a valid interrupt */ + if (irq < 0 || irq >= NUM_EXTERNAL_IRQS) + return; + + /* Set priority in OD back to original value */ + save_and_cli(flags); + /* This one is not in use currently */ + overdrive_irq = od_data_table[irq].overdrive_irq; + if (overdrive_irq != EXTERNAL_IRQ_NOT_ASSIGNED) { + val = ctrl_inl(OVERDRIVE_INT_CT); + mask = ~(0x7 << overdrive_irq); + val &= mask; + mask = od_data_table[irq].irq_mask << overdrive_irq; + val |= mask; + ctrl_outl(val, OVERDRIVE_INT_CT); + } + restore_flags(flags); +} + + + +/* this functions sets the desired irq handler to be an overdrive type */ +static void __init make_od_irq(unsigned int irq) +{ + disable_irq_nosync(irq); + irq_desc[irq].handler = &od_irq_type; + disable_od_irq(irq); +} + + +static void mask_and_ack_od(unsigned int irq) +{ + disable_od_irq(irq); +} + +static void end_od_irq(unsigned int irq) +{ + enable_od_irq(irq); +} + +void __init init_overdrive_irq(void) +{ + int i; + + /* Disable all interrupts */ + ctrl_outl(0, OVERDRIVE_INT_CT); + + /* Update interrupt pin mode to use encoded interrupts */ + i = ctrl_inw(INTC_ICR); + i &= ~INTC_ICR_IRLM; + ctrl_outw(i, INTC_ICR); + + for (i = 0; i < NUM_EXTERNAL_IRQS; i++) { + if (od_data_table[i].irq_mask != EXTERNAL_IRQ_NOT_IN_USE) { + make_od_irq(i); + } else if (i != 15) { // Cannot use imask on level 15 + make_imask_irq(i); + } + } + + /* Set up the interrupts */ + set_od_data(OVERDRIVE_PCI_INTA, OVERDRIVE_PCI_IRQ1); + set_od_data(OVERDRIVE_PCI_INTB, OVERDRIVE_PCI_IRQ2); + set_od_data(OVERDRIVE_AUDIO_INT, OVERDRIVE_ESS_IRQ); +} diff -urN linux-2.4.16/arch/sh/overdrive/led.c linux/arch/sh/overdrive/led.c --- linux-2.4.16/arch/sh/overdrive/led.c Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/led.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,59 @@ +/* + * linux/arch/sh/overdrive/led.c + * + * Copyright (C) 1999 Stuart Menefy + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * This file contains an Overdrive specific LED feature. + */ + +#include +#include +#include +#include "overdrive.h" + +static void mach_led(int position, int value) +{ + unsigned long flags; + unsigned long reg; + + save_and_cli(flags); + + reg = readl(OVERDRIVE_CTRL); + if (value) { + reg |= (1<<3); + } else { + reg &= ~(1<<3); + } + writel(reg, OVERDRIVE_CTRL); + + restore_flags(flags); +} + +#ifdef CONFIG_HEARTBEAT + +#include + +/* acts like an actual heart beat -- ie thump-thump-pause... */ +void heartbeat_od(void) +{ + static unsigned cnt = 0, period = 0, dist = 0; + + if (cnt == 0 || cnt == dist) + mach_led( -1, 1); + else if (cnt == 7 || cnt == dist+7) + mach_led( -1, 0); + + if (++cnt > period) { + cnt = 0; + /* The hyperbolic function below modifies the heartbeat period + * length in dependency of the current (5min) load. It goes + * through the points f(0)=126, f(1)=86, f(5)=51, + * f(inf)->30. */ + period = ((672< + +#include +#include +#include + +#include +#include +#include + +void heartbeat_od(void); +void setup_od(void); +void init_overdrive_irq(void); +void galileo_pcibios_init(void); + +/* + * The Machine Vector + */ + +struct sh_machine_vector mv_od __initmv = { + mv_name: "SH7750 Overdrive", + + mv_nr_irqs: 48, + + mv_inb: od_inb, + mv_inw: od_inw, + mv_inl: od_inl, + mv_outb: od_outb, + mv_outw: od_outw, + mv_outl: od_outl, + + mv_inb_p: od_inb_p, + mv_inw_p: od_inw_p, + mv_inl_p: od_inl_p, + mv_outb_p: od_outb_p, + mv_outw_p: od_outw_p, + mv_outl_p: od_outl_p, + + mv_insb: od_insb, + mv_insw: od_insw, + mv_insl: od_insl, + mv_outsb: od_outsb, + mv_outsw: od_outsw, + mv_outsl: od_outsl, + + mv_readb: generic_readb, + mv_readw: generic_readw, + mv_readl: generic_readl, + mv_writeb: generic_writeb, + mv_writew: generic_writew, + mv_writel: generic_writel, + + mv_ioremap: generic_ioremap, + mv_iounmap: generic_iounmap, + + mv_isa_port2addr: generic_isa_port2addr, + + mv_init_arch: setup_od, +#ifdef CONFIG_PCI + mv_init_irq: init_overdrive_irq, +#endif +#ifdef CONFIG_HEARTBEAT + mv_heartbeat: heartbeat_od, +#endif + mv_rtc_gettimeofday: sh_rtc_gettimeofday, + mv_rtc_settimeofday: sh_rtc_settimeofday, +}; + +ALIAS_MV(od) diff -urN linux-2.4.16/arch/sh/overdrive/overdrive.h linux/arch/sh/overdrive/overdrive.h --- linux-2.4.16/arch/sh/overdrive/overdrive.h Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/overdrive.h Sat Dec 1 21:53:52 2001 @@ -0,0 +1,89 @@ +/* + * Copyright (C) 2000 David J. Mckay (david.mckay@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + */ + +#include + +#ifndef __OVERDRIVE_H__ +#define __OVERDRIVE_H__ + +#define OVERDRIVE_INT_CT 0xa3a00000 +#define OVERDRIVE_INT_DT 0xa3b00000 + +#define OVERDRIVE_CTRL 0xa3000000 + +/* Shoving all these bits into the same register is not a good idea. + * As soon as I get a spare moment, I'll change the FPGA and put each + * bit in a separate register + */ + +#define VALID_CTRL_BITS 0x1f + +#define ENABLE_RS232_MASK 0x1e +#define DISABLE_RS232_BIT 0x01 + +#define ENABLE_NMI_MASK 0x1d +#define DISABLE_NMI_BIT 0x02 + +#define RESET_PCI_MASK 0x1b +#define ENABLE_PCI_BIT 0x04 + +#define ENABLE_LED_MASK 0x17 +#define DISABLE_LED_BIT 0x08 + +#define RESET_FPGA_MASK 0x0f +#define ENABLE_FPGA_BIT 0x10 + + +#define FPGA_DCLK_ADDRESS 0xA3C00000 + +#define FPGA_DATA 0x01 /* W */ +#define FPGA_CONFDONE 0x02 /* R */ +#define FPGA_NOT_STATUS 0x04 /* R */ +#define FPGA_INITDONE 0x08 /* R */ + +#define FPGA_TIMEOUT 100000 + + +/* Interrupts for the overdrive. Note that these numbers have + * nothing to do with the actual IRQ numbers they appear on, + * this is all programmable. This is simply the position in the + * INT_CT register. + */ + +#define OVERDRIVE_PCI_INTA 0 +#define OVERDRIVE_PCI_INTB 1 +#define OVERDRIVE_PCI_INTC 2 +#define OVERDRIVE_PCI_INTD 3 +#define OVERDRIVE_GALILEO_INT 4 +#define OVERDRIVE_GALILEO_LOCAL_INT 5 +#define OVERDRIVE_AUDIO_INT 6 +#define OVERDRIVE_KEYBOARD_INT 7 + +/* Which Linux IRQ should we assign to each interrupt source? */ +#define OVERDRIVE_PCI_IRQ1 2 +#ifdef CONFIG_HACKED_NE2K +#define OVERDRIVE_PCI_IRQ2 7 +#else +#define OVERDRIVE_PCI_IRQ2 2 +#undef OVERDRIVE_PCI_INTB +#define OVERDRIVE_PCI_INTB OVERDRIVE_PCI_INTA + +#endif + +/* Put the ESS solo audio chip on IRQ 4 */ +#define OVERDRIVE_ESS_IRQ 4 + +/* Where the memory behind the PCI bus appears */ +#define PCI_DRAM_BASE 0xb7000000 +#define PCI_DRAM_SIZE (16*1024*1024) +#define PCI_DRAM_FINISH (PCI_DRAM_BASE+PCI_DRAM_SIZE-1) + +/* Where the IO region appears in the memory */ +#define PCI_GTIO_BASE 0xb8000000 + +#endif diff -urN linux-2.4.16/arch/sh/overdrive/overdrive.ttf linux/arch/sh/overdrive/overdrive.ttf --- linux-2.4.16/arch/sh/overdrive/overdrive.ttf Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/overdrive.ttf Sat Dec 1 21:53:52 2001 @@ -0,0 +1,770 @@ +255,255, 98,255, 51, 0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255, +160, 9, 52,129, 38,208, 4,154, 64, 19, 0, 89, 96, 10,100,129,137,134, 85, 6,154, 0, 25,104, 2, 77,160, 76,148, 1, 0, 0, 0, 0, 0, 6,202, 0, 25, 0, 89,100,170, 9, 52,129, 38, 80, 6,154, 68, 19,112, 2, 96, 10, 76,149,129, 50, 64, 6,200, 0,188,254, + 0, 21,160, 2, 84,128, 10, 80, 1, 42,128, 10, 80, 1, 42, 64, 7,180,128, 10, 80, 1, 42, 64, 5,168, 0, 61,160, 2, 0, 0, 0, 0, 0, 9, 80, 1, 46,128, 10,120, 1, 21,160, 2, 84,128, 10,208, 3, 42, 64, 5, 80, 1, 42,160, 2, 84,128, 11,112, 1,204,254, + 0, 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4,136, 0, 17,104, 2, 77,128, 96,145, 1, 34, 64, 6,200, 0, 17, 32, 3, 77,128, 8,144, 1, 0, 0, 0, 0,208, 4,200, 0, 25,120, 2, 77,162, 9,144, 1, 39,208, 4,156, 0, 17, 40, 3, 37,162, 12,148,172, 50, 80, 6,202, 0, 80,255, +255,255 diff -urN linux-2.4.16/arch/sh/overdrive/pcidma.c linux/arch/sh/overdrive/pcidma.c --- linux-2.4.16/arch/sh/overdrive/pcidma.c Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/pcidma.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2000 David J. Mckay (david.mckay@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Dynamic DMA mapping support. + * + * On the overdrive, we can only DMA from memory behind the PCI bus! + * this means that all DMA'able memory must come from there. + * this restriction will not apply to later boards. + */ + +#include +#include +#include +#include +#include + +void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, + dma_addr_t * dma_handle) +{ + void *ret; + int gfp = GFP_ATOMIC; + + printk("BUG: pci_alloc_consistent() called - not yet supported\n"); + /* We ALWAYS need DMA memory on the overdrive hardware, + * due to it's extreme wierdness + * Need to flush the cache here as well, since the memory + * can still be seen through the cache! + */ + gfp |= GFP_DMA; + ret = (void *) __get_free_pages(gfp, get_order(size)); + + if (ret != NULL) { + memset(ret, 0, size); + *dma_handle = virt_to_bus(ret); + } + return ret; +} + +void pci_free_consistent(struct pci_dev *hwdev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + free_pages((unsigned long) vaddr, get_order(size)); +} diff -urN linux-2.4.16/arch/sh/overdrive/setup.c linux/arch/sh/overdrive/setup.c --- linux-2.4.16/arch/sh/overdrive/setup.c Wed Dec 31 19:00:00 1969 +++ linux/arch/sh/overdrive/setup.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,32 @@ +/* + * arch/sh/overdrive/setup.c + * + * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * STMicroelectronics Overdrive Support. + */ + +#include +#include +#include +#include + +#include "overdrive.h" +#include "fpga.h" + +/* + * Initialize the board + */ +int __init setup_od(void) +{ +#ifdef CONFIG_PCI + init_overdrive_fpga(); + galileo_init(); +#endif + + /* Enable RS232 receive buffers */ + writel(0x1e, OVERDRIVE_CTRL); +} diff -urN linux-2.4.16/drivers/Makefile linux/drivers/Makefile --- linux-2.4.16/drivers/Makefile Sat Dec 1 21:52:51 2001 +++ linux/drivers/Makefile Sat Dec 1 21:53:52 2001 @@ -8,7 +8,7 @@ mod-subdirs := dio mtd sbus video macintosh usb input telephony sgi ide \ message/i2o message/fusion scsi md ieee1394 pnp isdn atm \ - fc4 net/hamradio i2c acpi bluetooth + fc4 net/hamradio i2c acpi bluetooth maple subdir-y := parport char block net sound misc media cdrom hotplug subdir-m := $(subdir-y) @@ -46,5 +46,6 @@ subdir-$(CONFIG_ACPI) += acpi subdir-$(CONFIG_BLUEZ) += bluetooth +subdir-$(CONFIG_MAPLE) += maple include $(TOPDIR)/Rules.make diff -urN linux-2.4.16/drivers/block/rd.c linux/drivers/block/rd.c --- linux-2.4.16/drivers/block/rd.c Sat Dec 1 21:52:46 2001 +++ linux/drivers/block/rd.c Sat Dec 1 21:53:52 2001 @@ -399,6 +399,9 @@ if (count > left) count = left; if (count == 0) return 0; copy_to_user(buf, (char *)initrd_start + *ppos, count); +#ifdef CONFIG_SUPERH + flush_cache_all(); +#endif *ppos += count; return count; } diff -urN linux-2.4.16/drivers/cdrom/Config.in linux/drivers/cdrom/Config.in --- linux-2.4.16/drivers/cdrom/Config.in Sat Dec 1 21:52:54 2001 +++ linux/drivers/cdrom/Config.in Sat Dec 1 21:53:52 2001 @@ -25,3 +25,4 @@ tristate ' ISP16/MAD16/Mozart soft configurable cdrom interface support' CONFIG_ISP16_CDI tristate ' Sony CDU31A/CDU33A CDROM support' CONFIG_CDU31A tristate ' Sony CDU535 CDROM support' CONFIG_CDU535 +tristate ' SEGA Dreamcast GD-ROM device CD-R support' CONFIG_SEGA_GDROM diff -urN linux-2.4.16/drivers/cdrom/Makefile linux/drivers/cdrom/Makefile --- linux-2.4.16/drivers/cdrom/Makefile Sat Dec 1 21:52:54 2001 +++ linux/drivers/cdrom/Makefile Sat Dec 1 21:53:52 2001 @@ -42,6 +42,7 @@ obj-$(CONFIG_SBPCD4) += sbpcd4.o cdrom.o obj-$(CONFIG_SJCD) += sjcd.o obj-$(CONFIG_CDU535) += sonycd535.o +obj-$(CONFIG_SEGA_GDROM) += gdrom.o cdrom.o # Hand off to Rules.make. diff -urN linux-2.4.16/drivers/cdrom/gdrom.c linux/drivers/cdrom/gdrom.c --- linux-2.4.16/drivers/cdrom/gdrom.c Wed Dec 31 19:00:00 1969 +++ linux/drivers/cdrom/gdrom.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,507 @@ +/* $Id: gdrom.c,v 1.5 2001/08/07 14:53:43 gniibe Exp $ + * + * SEGA Dreamcast GD-ROM Drive CD-R support + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Original code: NetBSD version: + * Copyright (c) 2001 Marcus Comstedt + * $NetBSD: gdrom.c,v 1.4 2001/04/24 19:43:25 marcus Exp $ + * + * First Linux implementation by BERO + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define GDROM_MAJOR 250 /* Experimental */ +#define MAJOR_NR GDROM_MAJOR + +#define DEVICE_NAME "GD-ROM" +#define DEVICE_REQUEST do_gdrom_request +#define DEVICE_NR(device) (MINOR(device)) +#define DEVICE_STR "gdrom" + +#include +#include + +#include +#include +#include + +static int gdrom_blocksize = 2048; +static int gdrom_hardsecsize = 2048; + +#define GDROM_SESSION_OFFSET 150 +#define GDROM_IRQ HW_EVENT_GDROM_CMD + +#define GDROM_REACTIVATE 0x5f74e4 +static void __init gdrom_start(void) +{ + unsigned long p; + + outl(0x1fffff, GDROM_REACTIVATE); + for (p = 0xa0000000; p < 0xa0200000; p += 4) + ctrl_inl(p); +} + +struct gd_toc { + unsigned int entry[99]; + unsigned int first, last; + unsigned int leadout; +}; + +struct gdrom_control { + int users; + int cmd; + int status; + void *buf; + int size; + struct completion *waiting; + struct gd_toc toc; +}; + +static struct gdrom_control gdrom_control[1]; + +#define GDROM_BASE 0x5f7000 + +#define GDROM_STATUS (GDROM_BASE+0x9c) +#define GDROM_COMMAND GDROM_STATUS +static inline int gdrom_get_status(void) +{ + return inb(GDROM_STATUS); +} + +#define GDROM_ALTSTATUS (GDROM_BASE+0x18) +static inline int gdrom_check_busy(void) +{ + return inb(GDROM_ALTSTATUS); +} + +#define GDROM_CNTLO (GDROM_BASE+0x90) +#define GDROM_CNTHI (GDROM_BASE+0x94) +static inline int gdrom_get_count(void) +{ + return (inb(GDROM_CNTHI)<<8)|inb(GDROM_CNTLO); +} + +#define GDROM_DATA (GDROM_BASE+0x80) +#define GDROM_FEATURE (GDROM_BASE+0x84) +#define GDROM_NSECTOR (GDROM_BASE+0x88) +#define GDROM_SECTOR (GDROM_BASE+0x8c) + +#define ERR_STAT 0x01 +#define DRQ_STAT 0x08 +#define BUSY_STAT 0x80 + +/* XXX: We should implement timeout */ + +static void +gdrom_intr(int irq, void *dev_id, struct pt_regs *reg) +{ + struct gdrom_control *ctrl = (struct gdrom_control *)dev_id; + int stat, count; + + if (ctrl->cmd == 0) { + printk(KERN_INFO "GDROM: spurious interrupt.\n"); + return; + } + + stat = gdrom_get_status(); + if ((stat & ERR_STAT) || (stat & DRQ_STAT) == 0) { + /* Command complete */ + if ((stat & ERR_STAT)) { + printk(KERN_ERR "GDROM ERR\n"); + ctrl->status = -EIO; + } else + ctrl->status = 0; + + ctrl->cmd = 0; + if (ctrl->waiting) { + struct completion *w = ctrl->waiting; + ctrl->waiting = NULL; + complete(w); + } + return; + } + + count = gdrom_get_count(); + if (count != 0) { + if (count > ctrl->size) { + printk(KERN_ERR "GD-ROM: Got larger result\n"); + count = ctrl->size; + } + + insw(GDROM_DATA, ctrl->buf, count/2); + ctrl->buf += count; + ctrl->size -= count; + } + + /* XXX: Don't busy loop... */ + while ((gdrom_check_busy() & 0x80)) + asm volatile(""); +} + +static int +gdrom_do_command(unsigned char *cmd, unsigned int count) +{ + unsigned long flags; + + /* XXX: Don't busy loop... */ + while ((gdrom_check_busy() & 0x88)) + asm volatile(""); + + outb(0, GDROM_FEATURE); + outb(0, GDROM_NSECTOR); + outb(0, GDROM_SECTOR); + outb(count&0xff, GDROM_CNTLO); + outb((count >> 8), GDROM_CNTHI); + + save_and_cli(flags); + outb(0xa0, GDROM_COMMAND); + udelay(1); + + /* XXX: Don't busy loop... */ + while ((gdrom_check_busy() & 0x88) != 8) + asm volatile(""); + + outsw(GDROM_DATA, cmd, 6); + restore_flags(flags); + return 0; +} + +static void +gdrom_command_sense(struct gdrom_control *ctrl) +{ + int sense_key, sense_specific; + unsigned short sense_data[5]; + unsigned char cmd[12]; + DECLARE_COMPLETION(wait); + + memset(cmd, 0, sizeof(cmd)); + cmd[0] = 0x13; + cmd[4] = sizeof(sense_data); + + ctrl->cmd = 1; + ctrl->waiting = &wait; + ctrl->buf = sense_data; + ctrl->size = sizeof(sense_data); + if (gdrom_do_command(cmd, sizeof(sense_data)) < 0) + return; + + wait_for_completion(&wait); + + sense_key = sense_data[1] & 0xf; + sense_specific = sense_data[4]; + if (sense_key == 11 && sense_specific == 0) + printk(KERN_INFO "GDROM: aborted(ignored).\n"); +} + +static int +gdrom_read_sectors(struct gdrom_control *ctrl, + unsigned char *buf, int sector, int count) +{ + unsigned char cmd[12]; + int block, nblocks; + DECLARE_COMPLETION(wait); + + if ((sector & 3) || (count & 3)) { + printk(KERN_ERR "GD-ROM: Wierd?? SEC=%04d, CNT=%03d\n", sector, count); + return -EIO; + } + + block = sector/4 + GDROM_SESSION_OFFSET; + nblocks = count/4; + + memset(cmd, 0, sizeof(cmd)); + cmd[0] = 0x30; + cmd[1] = 0x20; + cmd[2] = block>>16; + cmd[3] = block>>8; + cmd[4] = block; + cmd[8] = nblocks>>16; + cmd[9] = nblocks>>8; + cmd[10] = nblocks; + + ctrl->cmd = 1; + ctrl->waiting = &wait; + ctrl->buf = buf; + ctrl->size = count<<9; + if (gdrom_do_command(cmd, nblocks<<11) == 0) { + wait_for_completion(&wait); + if (ctrl->status == 0) { + if (ctrl->size == 0) + return count; + } + } + printk(KERN_ERR "GDROM: %d-byte not read\n", ctrl->size); + gdrom_command_sense(ctrl); + return -EIO; +} + +static int +gdrom_read_toc(struct gdrom_control *ctrl) +{ + unsigned char cmd[12]; + int stat; + DECLARE_COMPLETION(wait); + + memset(cmd, 0, sizeof(cmd)); + cmd[0] = 0x14; + cmd[3] = sizeof(struct gd_toc)>>8; + cmd[4] = sizeof(struct gd_toc)&0xff; + + ctrl->cmd = 1; + ctrl->waiting = &wait; + ctrl->buf = &ctrl->toc; + ctrl->size = sizeof(struct gd_toc); + if (gdrom_do_command(cmd, sizeof(struct gd_toc)) == 0) { + wait_for_completion(&wait); + stat = ctrl->status; + } else + stat = -EIO; + if (stat != 0) + gdrom_command_sense(ctrl); + return stat; +} + +static int +gdrom_mount_disk(struct gdrom_control *ctrl) +{ + unsigned char cmd[12]; + int stat; + DECLARE_COMPLETION(wait); + + memset(cmd, 0, sizeof(cmd)); + cmd[0] = 0x70; + cmd[1] = 0x1f; + + ctrl->cmd = 1; + ctrl->waiting = &wait; + ctrl->buf = NULL; + ctrl->size = 0; + if (gdrom_do_command(cmd, 0) == 0) { + wait_for_completion(&wait); + stat = ctrl->status; + } else + stat = -EIO; + if (stat != 0) + gdrom_command_sense(ctrl); + return stat; +} + +static void do_gdrom_request(request_queue_t *q) +{ + while (1) { + int ret = 0; + struct request *req = CURRENT; + struct gdrom_control *ctrl; + struct buffer_head *bh = req->bh; + + if (QUEUE_EMPTY || req->rq_status == RQ_INACTIVE) + break; + + if (req->cmd != READ) { + printk(KERN_ERR "GDROM: bad cmd %d\n", req->cmd); + end_request(0); + continue; + } + + if (DEVICE_NR((req->rq_dev)) != 0) { + printk(KERN_ERR "GD-ROM: No such device.\n"); + end_request(0); + continue; + } + + while (req->nr_sectors) { + int nsecs = 0; + + /* Umm... request may have been merged... */ + while (bh) { + if (bh->b_data != req->buffer + (nsecs*512)) + break; + nsecs += 4; + bh = bh->b_reqnext; + } + + ctrl = &gdrom_control[DEVICE_NR(req->rq_dev)]; + ret = gdrom_read_sectors(ctrl, req->buffer, + req->sector, nsecs); + if (ret != nsecs) + break; + + req->sector += nsecs; + req->nr_sectors -= nsecs; + if (bh) + req->buffer = bh->b_data; + ret = 0; + } + + if (ret != 0) + end_request(0); + else + end_request(1); + } +} + +#define TOC_LBA(n) ((n)&0xffffff00) +#define TOC_ADR(n) ((n)&0x0f) +#define TOC_CTRL(n) (((n)&0xf0)>>4) +#define TOC_TRACK(n) (((n)&0x0000ff00)>>8) + +static int gdrom_get_last_session(struct cdrom_device_info *cdi, + struct cdrom_multisession *ms_info) +{ + struct gdrom_control *ctrl; + int error, track; + + if (DEVICE_NR(cdi->dev) != 0) + return -ENODEV; + ctrl = &gdrom_control[DEVICE_NR(cdi->dev)]; + error = gdrom_read_toc(ctrl); + if (error) + return error; + + for (track = TOC_TRACK(ctrl->toc.last); + track >= TOC_TRACK(ctrl->toc.first); + --track) + if (TOC_CTRL(ctrl->toc.entry[track-1])) + break; + + if (track < TOC_TRACK(ctrl->toc.first) || track > 100) + return -ENXIO; + + ms_info->addr_format = CDROM_LBA; + ms_info->addr.lba = htonl(TOC_LBA(ctrl->toc.entry[track-1])) - + GDROM_SESSION_OFFSET; + ms_info->xa_flag = 1; + + return 0; +} + +static int gdrom_open(struct cdrom_device_info *cdi, int purpose) +{ + struct gdrom_control *ctrl; + int i; + int error = 0; + + if (DEVICE_NR(cdi->dev) != 0) + return -ENODEV; + ctrl = &gdrom_control[DEVICE_NR(cdi->dev)]; + + for (i = 0; i < 5; i++) + if ((error = gdrom_mount_disk(ctrl)) == 0) + break; + if (error) + return error; + + MOD_INC_USE_COUNT; + ctrl->users++; + return 0; +} + +static void gdrom_release(struct cdrom_device_info * cdi) +{ + struct gdrom_control *ctrl; + + if (DEVICE_NR(cdi->dev) != 0) + return; + ctrl = &gdrom_control[DEVICE_NR(cdi->dev)]; + ctrl->users--; + MOD_DEC_USE_COUNT; +} + +static struct cdrom_device_ops gdrom_dops = { + open: gdrom_open, + release: gdrom_release, + get_last_session: gdrom_get_last_session, + capability: CDC_MULTI_SESSION, +}; + +static struct cdrom_device_info gdrom_info = { + ops: &gdrom_dops, + speed: 2, + capacity: 1, + name: "gdrom", +}; + +/* + * This driver works with new merge interface, but if the merge occurs + * performance gets really worse. Hence, we disable the merge of requests. + */ +static int dont_merge_requests_fn(request_queue_t *q, struct request *req, + struct request *next, int max_segments) +{ + return 0; +} + +static int dont_bh_merge_fn(request_queue_t *q, struct request *req, + struct buffer_head *bh, int max_segments) +{ + return 0; +} + +static int __init gdrom_init(void) +{ + request_queue_t * q; + + if (request_irq(GDROM_IRQ, gdrom_intr, SA_INTERRUPT, + DEVICE_STR, gdrom_control)) { + printk(KERN_ERR "Unable to get IRQ%d for GD-ROM\n", GDROM_IRQ); + return -EBUSY; + } + + if (devfs_register_blkdev(MAJOR_NR, DEVICE_STR, &cdrom_fops) != 0) { + printk(KERN_ERR "GDROM: Unable to get major %d for GD-ROM\n", MAJOR_NR); + free_irq(GDROM_IRQ, NULL); + return -EIO; + } + + q = BLK_DEFAULT_QUEUE(MAJOR_NR); + blk_init_queue(q, DEVICE_REQUEST); + q->back_merge_fn = dont_bh_merge_fn; + q->front_merge_fn = dont_bh_merge_fn; + q->merge_requests_fn = dont_merge_requests_fn; + blksize_size[MAJOR_NR] = &gdrom_blocksize; + hardsect_size[MAJOR_NR] = &gdrom_hardsecsize; + read_ahead[MAJOR_NR] = 4; + + gdrom_info.dev = MKDEV(MAJOR_NR,0); + if (register_cdrom(&gdrom_info) != 0) { + printk(KERN_ERR "Cannot register SEGA GD-ROM!\n"); + free_irq(GDROM_IRQ, NULL); + if (devfs_unregister_blkdev(MAJOR_NR, DEVICE_STR) != 0) + printk(KERN_ERR "unregister_blkdev() failed\n"); + blk_cleanup_queue(BLK_DEFAULT_QUEUE(MAJOR_NR)); + return -EIO; + } + + gdrom_start(); + + printk(KERN_INFO "SEGA Dreamcast GD-ROM driver\n"); + return 0; +} + +static void __exit gdrom_exit(void) +{ + if (unregister_cdrom(&gdrom_info)) + printk(KERN_ERR "Can't unregister GD-ROM driver\n"); + if ((devfs_unregister_blkdev(MAJOR_NR, DEVICE_STR ) == -EINVAL)) + printk(KERN_ERR "Can't unregister GD-ROM\n" ); + free_irq(GDROM_IRQ, NULL); + blk_cleanup_queue(BLK_DEFAULT_QUEUE(MAJOR_NR)); +} + +module_init(gdrom_init); +module_exit(gdrom_exit); diff -urN linux-2.4.16/drivers/char/Makefile linux/drivers/char/Makefile --- linux-2.4.16/drivers/char/Makefile Sat Dec 1 21:52:46 2001 +++ linux/drivers/char/Makefile Sat Dec 1 21:53:52 2001 @@ -95,7 +95,7 @@ endif ifeq ($(CONFIG_SH_DREAMCAST),y) KEYMAP = defkeymap.o - KEYBD = + KEYBD = dc_keyb.o CONSOLE = console.o endif endif @@ -176,6 +176,9 @@ obj-y += joystick/js.o endif +obj-$(CONFIG_MAPLE_KEYBOARD) += maple_keyb.o +obj-$(CONFIG_MAPLE_MOUSE) += maplemouse.o + obj-$(CONFIG_BUSMOUSE) += busmouse.o obj-$(CONFIG_DTLK) += dtlk.o obj-$(CONFIG_R3964) += n_r3964.o diff -urN linux-2.4.16/drivers/char/dc_keyb.c linux/drivers/char/dc_keyb.c --- linux-2.4.16/drivers/char/dc_keyb.c Wed Dec 31 19:00:00 1969 +++ linux/drivers/char/dc_keyb.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,276 @@ +/* + * $Id: dc_keyb.c,v 1.1 2001/08/08 14:48:28 yaegashi Exp $ + * linux/drivers/char/dc_keyb.c + * taken from linux/drivers/char/pc_keyb.c + */ + +/* + * linux/drivers/char/pc_keyb.c + * + * Separation of the PC low-level part by Geert Uytterhoeven, May 1997 + * See keyboard.c for the whole history. + * + * Major cleanup by Martin Mares, May 1997 + * + * Combined the keyboard and PS/2 mouse handling into one file, + * because they share the same hardware. + * Johan Myreen 1998-10-08. + * + * Code fixes to handle mouse ACKs properly. + * C. Scott Ananian 1999-01-29. + * + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +/* Some configuration switches are present in the include file... */ + +#include + +/* Simple translation table for the SysRq keys */ + +#ifdef CONFIG_MAGIC_SYSRQ +unsigned char pckbd_sysrq_xlate[128] = + "\000\0331234567890-=\177\t" /* 0x00 - 0x0f */ + "qwertyuiop[]\r\000as" /* 0x10 - 0x1f */ + "dfghjkl;'`\000\\zxcv" /* 0x20 - 0x2f */ + "bnm,./\000*\000 \000\201\202\203\204\205" /* 0x30 - 0x3f */ + "\206\207\210\211\212\000\000789-456+1" /* 0x40 - 0x4f */ + "230\177\000\000\213\214\000\000\000\000\000\000\000\000\000\000" /* 0x50 - 0x5f */ + "\r\000/"; /* 0x60 - 0x6f */ +#endif + +/* + * Translation of escaped scancodes to keycodes. + * This is now user-settable. + * The keycodes 1-88,96-111,119 are fairly standard, and + * should probably not be changed - changing might confuse X. + * X also interprets scancode 0x5d (KEY_Begin). + * + * For 1-88 keycode equals scancode. + */ + +#define E0_KPENTER 96 +#define E0_RCTRL 97 +#define E0_KPSLASH 98 +#define E0_PRSCR 99 +#define E0_RALT 100 +#define E0_BREAK 101 /* (control-pause) */ +#define E0_HOME 102 +#define E0_UP 103 +#define E0_PGUP 104 +#define E0_LEFT 105 +#define E0_RIGHT 106 +#define E0_END 107 +#define E0_DOWN 108 +#define E0_PGDN 109 +#define E0_INS 110 +#define E0_DEL 111 + +#define E1_PAUSE 119 + +/* + * The keycodes below are randomly located in 89-95,112-118,120-127. + * They could be thrown away (and all occurrences below replaced by 0), + * but that would force many users to use the `setkeycodes' utility, where + * they needed not before. It does not matter that there are duplicates, as + * long as no duplication occurs for any single keyboard. + */ +#define SC_LIM 89 + +#define FOCUS_PF1 85 /* actual code! */ +#define FOCUS_PF2 89 +#define FOCUS_PF3 90 +#define FOCUS_PF4 91 +#define FOCUS_PF5 92 +#define FOCUS_PF6 93 +#define FOCUS_PF7 94 +#define FOCUS_PF8 95 +#define FOCUS_PF9 120 +#define FOCUS_PF10 121 +#define FOCUS_PF11 122 +#define FOCUS_PF12 123 + +#define JAP_86 124 +/* tfj@olivia.ping.dk: + * The four keys are located over the numeric keypad, and are + * labelled A1-A4. It's an rc930 keyboard, from + * Regnecentralen/RC International, Now ICL. + * Scancodes: 59, 5a, 5b, 5c. + */ +#define RGN1 124 +#define RGN2 125 +#define RGN3 126 +#define RGN4 127 + +static unsigned char high_keys[128 - SC_LIM] = { + RGN1, RGN2, RGN3, RGN4, 0, 0, 0, /* 0x59-0x5f */ + 0, 0, 0, 0, 0, 0, 0, 0, /* 0x60-0x67 */ + 0, 0, 0, 0, 0, FOCUS_PF11, 0, FOCUS_PF12, /* 0x68-0x6f */ + 0, 0, 0, FOCUS_PF2, FOCUS_PF9, 0, 0, FOCUS_PF3, /* 0x70-0x77 */ + FOCUS_PF4, FOCUS_PF5, FOCUS_PF6, FOCUS_PF7, /* 0x78-0x7b */ + FOCUS_PF8, JAP_86, FOCUS_PF10, 0 /* 0x7c-0x7f */ +}; + +/* BTC */ +#define E0_MACRO 112 +/* LK450 */ +#define E0_F13 113 +#define E0_F14 114 +#define E0_HELP 115 +#define E0_DO 116 +#define E0_F17 117 +#define E0_KPMINPLUS 118 +/* + * My OmniKey generates e0 4c for the "OMNI" key and the + * right alt key does nada. [kkoller@nyx10.cs.du.edu] + */ +#define E0_OK 124 +/* + * New microsoft keyboard is rumoured to have + * e0 5b (left window button), e0 5c (right window button), + * e0 5d (menu button). [or: LBANNER, RBANNER, RMENU] + * [or: Windows_L, Windows_R, TaskMan] + */ +#define E0_MSLW 125 +#define E0_MSRW 126 +#define E0_MSTM 127 + +static unsigned char e0_keys[128] = { + 0, 0, 0, 0, 0, 0, 0, 0, /* 0x00-0x07 */ + 0, 0, 0, 0, 0, 0, 0, 0, /* 0x08-0x0f */ + 0, 0, 0, 0, 0, 0, 0, 0, /* 0x10-0x17 */ + 0, 0, 0, 0, E0_KPENTER, E0_RCTRL, 0, 0, /* 0x18-0x1f */ + 0, 0, 0, 0, 0, 0, 0, 0, /* 0x20-0x27 */ + 0, 0, 0, 0, 0, 0, 0, 0, /* 0x28-0x2f */ + 0, 0, 0, 0, 0, E0_KPSLASH, 0, E0_PRSCR, /* 0x30-0x37 */ + E0_RALT, 0, 0, 0, 0, E0_F13, E0_F14, E0_HELP, /* 0x38-0x3f */ + E0_DO, E0_F17, 0, 0, 0, 0, E0_BREAK, E0_HOME, /* 0x40-0x47 */ + E0_UP, E0_PGUP, 0, E0_LEFT, E0_OK, E0_RIGHT, E0_KPMINPLUS, E0_END,/* 0x48-0x4f */ + E0_DOWN, E0_PGDN, E0_INS, E0_DEL, 0, 0, 0, 0, /* 0x50-0x57 */ + 0, 0, 0, E0_MSLW, E0_MSRW, E0_MSTM, 0, 0, /* 0x58-0x5f */ + 0, 0, 0, 0, 0, 0, 0, 0, /* 0x60-0x67 */ + 0, 0, 0, 0, 0, 0, 0, E0_MACRO, /* 0x68-0x6f */ + 0, 0, 0, 0, 0, 0, 0, 0, /* 0x70-0x77 */ + 0, 0, 0, 0, 0, 0, 0, 0 /* 0x78-0x7f */ +}; + +int kbd_translate(unsigned char scancode, unsigned char *keycode, + char raw_mode) +{ + static int prev_scancode; + + /* special prefix scancodes.. */ + if (scancode == 0xe0 || scancode == 0xe1) { + prev_scancode = scancode; + return 0; + } + + /* 0xFF is sent by a few keyboards, ignore it. 0x00 is error */ + if (scancode == 0x00 || scancode == 0xff) { + prev_scancode = 0; + return 0; + } + + scancode &= 0x7f; + + if (prev_scancode) { + /* + * usually it will be 0xe0, but a Pause key generates + * e1 1d 45 e1 9d c5 when pressed, and nothing when released + */ + if (prev_scancode != 0xe0) { + if (prev_scancode == 0xe1 && scancode == 0x1d) { + prev_scancode = 0x100; + return 0; + } else if (prev_scancode == 0x100 && scancode == 0x45) { + *keycode = E1_PAUSE; + prev_scancode = 0; + } else { +#ifdef KBD_REPORT_UNKN + if (!raw_mode) + printk(KERN_INFO "keyboard: unknown e1 escape sequence\n"); +#endif + prev_scancode = 0; + return 0; + } + } else { + prev_scancode = 0; + /* + * The keyboard maintains its own internal caps lock and + * num lock statuses. In caps lock mode E0 AA precedes make + * code and E0 2A follows break code. In num lock mode, + * E0 2A precedes make code and E0 AA follows break code. + * We do our own book-keeping, so we will just ignore these. + */ + /* + * For my keyboard there is no caps lock mode, but there are + * both Shift-L and Shift-R modes. The former mode generates + * E0 2A / E0 AA pairs, the latter E0 B6 / E0 36 pairs. + * So, we should also ignore the latter. - aeb@cwi.nl + */ + if (scancode == 0x2a || scancode == 0x36) + return 0; + + if (e0_keys[scancode]) + *keycode = e0_keys[scancode]; + else { +#ifdef KBD_REPORT_UNKN + if (!raw_mode) + printk(KERN_INFO "keyboard: unknown scancode e0 %02x\n", + scancode); +#endif + return 0; + } + } + } else if (scancode >= SC_LIM) { + /* This happens with the FOCUS 9000 keyboard + Its keys PF1..PF12 are reported to generate + 55 73 77 78 79 7a 7b 7c 74 7e 6d 6f + Moreover, unless repeated, they do not generate + key-down events, so we have to zero up_flag below */ + /* Also, Japanese 86/106 keyboards are reported to + generate 0x73 and 0x7d for \ - and \ | respectively. */ + /* Also, some Brazilian keyboard is reported to produce + 0x73 and 0x7e for \ ? and KP-dot, respectively. */ + + *keycode = high_keys[scancode - SC_LIM]; + + if (!*keycode) { + if (!raw_mode) { +#ifdef KBD_REPORT_UNKN + printk(KERN_INFO "keyboard: unrecognized scancode (%02x)" + " - ignored\n", scancode); +#endif + } + return 0; + } + } else + *keycode = scancode; + return 1; +} + diff -urN linux-2.4.16/drivers/char/joystick/Config.in linux/drivers/char/joystick/Config.in --- linux-2.4.16/drivers/char/joystick/Config.in Sat Dec 1 21:52:49 2001 +++ linux/drivers/char/joystick/Config.in Sat Dec 1 21:53:52 2001 @@ -46,6 +46,11 @@ if [ "$CONFIG_AMIGA" = "y" ]; then dep_tristate ' Amiga joysticks' CONFIG_INPUT_AMIJOY $CONFIG_INPUT fi + + if [ "$CONFIG_MAPLE" != "n" ]; then + comment 'Dreamcast Maple Bus controllers' + dep_tristate ' Maple Bus controllers' CONFIG_INPUT_MAPLE_CONTROL $CONFIG_INPUT + fi else comment 'Input core support is needed for joysticks' fi diff -urN linux-2.4.16/drivers/char/joystick/Makefile linux/drivers/char/joystick/Makefile --- linux-2.4.16/drivers/char/joystick/Makefile Sat Dec 1 21:52:49 2001 +++ linux/drivers/char/joystick/Makefile Sat Dec 1 21:53:52 2001 @@ -65,6 +65,8 @@ obj-$(CONFIG_INPUT_AMIJOY) += amijoy.o +obj-$(CONFIG_INPUT_MAPLE_CONTROL)+= maplecontrol.o + # The global Rules.make. include $(TOPDIR)/Rules.make diff -urN linux-2.4.16/drivers/char/joystick/maplecontrol.c linux/drivers/char/joystick/maplecontrol.c --- linux-2.4.16/drivers/char/joystick/maplecontrol.c Wed Dec 31 19:00:00 1969 +++ linux/drivers/char/joystick/maplecontrol.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,191 @@ +/* + * $Id: dcpad.c,v 1.1 2001/04/01 15:02:17 yaegashi Exp $ + * SEGA Dreamcast controller driver + * Based on drivers/usb/iforce.c + */ + +#include +#include +#include +#include +#include +#include +#include + +MODULE_AUTHOR("YAEGASHI Takeshi "); +MODULE_DESCRIPTION("SEGA Dreamcast controller driver"); + +struct dc_pad { + struct input_dev dev; + int open; +}; + + +static void dc_pad_callback(struct mapleq *mq) +{ + unsigned short buttons; + struct maple_device *mapledev = mq->dev; + struct dc_pad *pad = mapledev->private_data; + struct input_dev *dev = &pad->dev; + unsigned char *res = mq->recvbuf; + + buttons = ~*(unsigned short *)(res+8); + + input_report_abs(dev, ABS_HAT0Y, + (buttons&0x0010?-1:0)+(buttons&0x0020?+1:0)); + input_report_abs(dev, ABS_HAT0X, + (buttons&0x0040?-1:0)+(buttons&0x0080?+1:0)); + input_report_abs(dev, ABS_HAT1Y, + (buttons&0x1000?-1:0)+(buttons&0x2000?+1:0)); + input_report_abs(dev, ABS_HAT1X, + (buttons&0x4000?-1:0)+(buttons&0x8000?+1:0)); + + input_report_key(dev, BTN_C, buttons&0x0001); + input_report_key(dev, BTN_B, buttons&0x0002); + input_report_key(dev, BTN_A, buttons&0x0004); + input_report_key(dev, BTN_START, buttons&0x0008); + input_report_key(dev, BTN_Z, buttons&0x0100); + input_report_key(dev, BTN_Y, buttons&0x0200); + input_report_key(dev, BTN_X, buttons&0x0400); + input_report_key(dev, BTN_SELECT, buttons&0x0800); + + input_report_abs(dev, ABS_GAS, res[10]); + input_report_abs(dev, ABS_BRAKE, res[11]); + input_report_abs(dev, ABS_X, res[12]); + input_report_abs(dev, ABS_Y, res[13]); + input_report_abs(dev, ABS_RX, res[14]); + input_report_abs(dev, ABS_RY, res[15]); +} + + +static int dc_pad_open(struct input_dev *dev) +{ + struct dc_pad *pad = dev->private; + pad->open++; + return 0; +} + + +static void dc_pad_close(struct input_dev *dev) +{ + struct dc_pad *pad = dev->private; + pad->open--; +} + + +static int dc_pad_connect(struct maple_device *dev) +{ + int i; + unsigned long data = be32_to_cpu(dev->devinfo.function_data[0]); + struct dc_pad *pad; + + const short btn_bit[32] = { + BTN_C, BTN_B, BTN_A, BTN_START, -1, -1, -1, -1, + BTN_Z, BTN_Y, BTN_X, BTN_SELECT, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + }; + + const short abs_bit[32] = { + -1, -1, -1, -1, ABS_HAT0Y, ABS_HAT0Y, ABS_HAT0X, ABS_HAT0X, + -1, -1, -1, -1, ABS_HAT1Y, ABS_HAT1Y, ABS_HAT1X, ABS_HAT1X, + ABS_GAS, ABS_BRAKE, ABS_X, ABS_Y, ABS_RX, ABS_RY, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + }; + + if (!(pad = kmalloc(sizeof(struct dc_pad), GFP_KERNEL))) + return -1; + memset(pad, 0, sizeof(struct dc_pad)); + + dev->private_data = pad; + + for (i=0; i<32; i++) + if (data&(1<=0) + pad->dev.keybit[LONG(BTN_JOYSTICK)] |= BIT(btn_bit[i]); + + if (pad->dev.keybit[LONG(BTN_JOYSTICK)]) + pad->dev.evbit[0] |= BIT(EV_KEY); + + for (i=0; i<32; i++) + if (data&(1<=0) + pad->dev.absbit[0] |= BIT(abs_bit[i]); + + if (pad->dev.absbit[0]) + pad->dev.evbit[0] |= BIT(EV_ABS); + + for (i=ABS_X; i<=ABS_BRAKE; i++) { + pad->dev.absmax[i] = 255; + pad->dev.absmin[i] = 0; + pad->dev.absfuzz[i] = 0; + pad->dev.absflat[i] = 0; + } + + for (i=ABS_HAT0X; i<=ABS_HAT3Y; i++) { + pad->dev.absmax[i] = 1; + pad->dev.absmin[i] = -1; + pad->dev.absfuzz[i] = 0; + pad->dev.absflat[i] = 0; + } + + pad->dev.private = pad; + pad->dev.open = dc_pad_open; + pad->dev.close = dc_pad_close; + pad->dev.event = NULL; + + pad->dev.name = dev->product_name; + pad->dev.idbus = BUS_MAPLE; + + input_register_device(&pad->dev); + + maple_getcond_callback(dev, dc_pad_callback, 1, MAPLE_FUNC_CONTROLLER); + + printk(KERN_INFO "input%d: controller(0x%lx): %s\n", + pad->dev.number, data, pad->dev.name); + + MOD_INC_USE_COUNT; + + return 0; +} + + +static void dc_pad_disconnect(struct maple_device *dev) +{ + struct dc_pad *pad = dev->private_data; + + input_unregister_device(&pad->dev); + + kfree(pad); + + MOD_DEC_USE_COUNT; +} + + +static struct maple_driver dc_pad_driver = { + function: MAPLE_FUNC_CONTROLLER, + name: "Dreamcast controller", + connect: dc_pad_connect, + disconnect: dc_pad_disconnect, +}; + + +static int __init dc_pad_init(void) +{ + maple_register_driver(&dc_pad_driver); + return 0; +} + + +static void __exit dc_pad_exit(void) +{ + maple_unregister_driver(&dc_pad_driver); +} + + +module_init(dc_pad_init); +module_exit(dc_pad_exit); + +/* + * Local variables: + * c-basic-offset: 8 + * End: + */ diff -urN linux-2.4.16/drivers/char/maple_keyb.c linux/drivers/char/maple_keyb.c --- linux-2.4.16/drivers/char/maple_keyb.c Wed Dec 31 19:00:00 1969 +++ linux/drivers/char/maple_keyb.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,190 @@ +/* + * $Id: dckbd.c,v 1.1 2001/04/01 15:02:17 yaegashi Exp $ + * SEGA Dreamcast keyboard driver + * Based on drivers/usb/usbkbd.c + */ + +#include +#include +#include +#include +#include +#include +#include + +MODULE_AUTHOR("YAEGASHI Takeshi "); +MODULE_DESCRIPTION("SEGA Dreamcast keyboard driver"); + +static unsigned char dc_kbd_keycode[256] = { + 0, 0, 0, 0, 30, 48, 46, 32, 18, 33, 34, 35, 23, 36, 37, 38, + 50, 49, 24, 25, 16, 19, 31, 20, 22, 47, 17, 45, 21, 44, 2, 3, + 4, 5, 6, 7, 8, 9, 10, 11, 28, 1, 14, 15, 57, 12, 13, 26, + 27, 43, 84, 39, 40, 41, 51, 52, 53, 58, 59, 60, 61, 62, 63, 64, + 65, 66, 67, 68, 87, 88, 99, 70,119,110,102,104,111,107,109,106, + 105,108,103, 69, 98, 55, 74, 78, 96, 79, 80, 81, 75, 76, 77, 71, + 72, 73, 82, 83, 86,127,116,117, 85, 89, 90, 91, 92, 93, 94, 95, + 120,121,122,123,134,138,130,132,128,129,131,137,133,135,136,113, + 115,114, 0, 0, 0,124, 0,181,182,183,184,185,186,187,188,189, + 190,191,192,193,194,195,196,197,198, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 29, 42, 56,125, 97, 54,100,126,164,166,165,163,161,115,114,113, + 150,158,159,128,136,177,178,176,142,152,173,140 +}; + + +struct dc_kbd { + struct input_dev dev; + unsigned char new[8]; + unsigned char old[8]; + int open; +}; + + +static void dc_scan_kbd(struct dc_kbd *kbd) +{ + int i; + struct input_dev *dev = &kbd->dev; + + for(i=0; i<8; i++) + input_report_key(dev, + dc_kbd_keycode[i+224], + (kbd->new[0]>>i)&1); + + for(i=2; i<8; i++) { + + if(kbd->old[i]>3&&memscan(kbd->new+2, kbd->old[i], 6)==NULL) { + if(dc_kbd_keycode[kbd->old[i]]) + input_report_key(dev, + dc_kbd_keycode[kbd->old[i]], + 0); + else + printk("Unknown key (scancode %#x) released.", + kbd->old[i]); + } + + if(kbd->new[i]>3&&memscan(kbd->old+2, kbd->new[i], 6)!=NULL) { + if(dc_kbd_keycode[kbd->new[i]]) + input_report_key(dev, + dc_kbd_keycode[kbd->new[i]], + 1); + else + printk("Unknown key (scancode %#x) pressed.", + kbd->new[i]); + } + } + + memcpy(kbd->old, kbd->new, 8); +} + + +static void dc_kbd_callback(struct mapleq *mq) +{ + struct maple_device *mapledev = mq->dev; + struct dc_kbd *kbd = mapledev->private_data; + unsigned long *buf = mq->recvbuf; + + if (buf[1] == mapledev->function) { + memcpy(kbd->new, buf+2, 8); + dc_scan_kbd(kbd); + } +} + + +static int dc_kbd_open(struct input_dev *dev) +{ + struct dc_kbd *kbd = dev->private; + kbd->open++; + return 0; +} + + +static void dc_kbd_close(struct input_dev *dev) +{ + struct dc_kbd *kbd = dev->private; + kbd->open--; +} + + +static int dc_kbd_connect(struct maple_device *dev) +{ + int i; + unsigned long data = be32_to_cpu(dev->devinfo.function_data[0]); + struct dc_kbd *kbd; + + if (!(kbd = kmalloc(sizeof(struct dc_kbd), GFP_KERNEL))) + return -1; + memset(kbd, 0, sizeof(struct dc_kbd)); + + dev->private_data = kbd; + + kbd->dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP); + + for (i=0; i<255; i++) + set_bit(dc_kbd_keycode[i], kbd->dev.keybit); + clear_bit(0, kbd->dev.keybit); + + kbd->dev.private = kbd; + kbd->dev.open = dc_kbd_open; + kbd->dev.close = dc_kbd_close; + kbd->dev.event = NULL; + + kbd->dev.name = dev->product_name; + kbd->dev.idbus = BUS_MAPLE; + + input_register_device(&kbd->dev); + + maple_getcond_callback(dev, dc_kbd_callback, 1, MAPLE_FUNC_KEYBOARD); + + printk(KERN_INFO "input%d: keyboard(0x%lx): %s\n", + kbd->dev.number, data, kbd->dev.name); + + MOD_INC_USE_COUNT; + + return 0; +} + + +static void dc_kbd_disconnect(struct maple_device *dev) +{ + struct dc_kbd *kbd = dev->private_data; + + input_unregister_device(&kbd->dev); + + kfree(kbd); + + MOD_DEC_USE_COUNT; +} + + +static struct maple_driver dc_kbd_driver = { + function: MAPLE_FUNC_KEYBOARD, + name: "Dreamcast keyboard", + connect: dc_kbd_connect, + disconnect: dc_kbd_disconnect, +}; + + +static int __init dc_kbd_init(void) +{ + maple_register_driver(&dc_kbd_driver); + return 0; +} + + +static void __exit dc_kbd_exit(void) +{ + maple_unregister_driver(&dc_kbd_driver); +} + + +module_init(dc_kbd_init); +module_exit(dc_kbd_exit); + +/* + * Local variables: + * c-basic-offset: 8 + * End: + */ diff -urN linux-2.4.16/drivers/char/maplemouse.c linux/drivers/char/maplemouse.c --- linux-2.4.16/drivers/char/maplemouse.c Wed Dec 31 19:00:00 1969 +++ linux/drivers/char/maplemouse.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,137 @@ +/* + * $Id: dcmouse.c,v 1.1 2001/04/01 15:02:17 yaegashi Exp $ + * SEGA Dreamcast mouse driver + * Based on drivers/usb/usbmouse.c + */ + +#include +#include +#include +#include +#include +#include +#include + +MODULE_AUTHOR("YAEGASHI Takeshi "); +MODULE_DESCRIPTION("SEGA Dreamcast mouse driver"); + +struct dc_mouse { + struct input_dev dev; + int open; +}; + + +static void dc_mouse_callback(struct mapleq *mq) +{ + int buttons, relx, rely, relz; + struct maple_device *mapledev = mq->dev; + struct dc_mouse *mouse = mapledev->private_data; + struct input_dev *dev = &mouse->dev; + unsigned char *res = mq->recvbuf; + + buttons = ~res[8]; + relx=*(unsigned short *)(res+12)-512; + rely=*(unsigned short *)(res+14)-512; + relz=*(unsigned short *)(res+16)-512; + + input_report_key(dev, BTN_LEFT, buttons&4); + input_report_key(dev, BTN_MIDDLE, buttons&9); + input_report_key(dev, BTN_RIGHT, buttons&2); + input_report_rel(dev, REL_X, relx); + input_report_rel(dev, REL_Y, rely); + input_report_rel(dev, REL_WHEEL, relz); +} + + +static int dc_mouse_open(struct input_dev *dev) +{ + struct dc_mouse *mouse = dev->private; + mouse->open++; + return 0; +} + + +static void dc_mouse_close(struct input_dev *dev) +{ + struct dc_mouse *mouse = dev->private; + mouse->open--; +} + + +static int dc_mouse_connect(struct maple_device *dev) +{ + unsigned long data = be32_to_cpu(dev->devinfo.function_data[0]); + struct dc_mouse *mouse; + + if (!(mouse = kmalloc(sizeof(struct dc_mouse), GFP_KERNEL))) + return -1; + memset(mouse, 0, sizeof(struct dc_mouse)); + + dev->private_data = mouse; + + mouse->dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REL); + mouse->dev.keybit[LONG(BTN_MOUSE)] = BIT(BTN_LEFT) | BIT(BTN_RIGHT) | BIT(BTN_MIDDLE); + mouse->dev.relbit[0] = BIT(REL_X) | BIT(REL_Y) | BIT(REL_WHEEL); + + mouse->dev.private = mouse; + mouse->dev.open = dc_mouse_open; + mouse->dev.close = dc_mouse_close; + mouse->dev.event = NULL; + + mouse->dev.name = dev->product_name; + mouse->dev.idbus = BUS_MAPLE; + + input_register_device(&mouse->dev); + + maple_getcond_callback(dev, dc_mouse_callback, 1, MAPLE_FUNC_MOUSE); + + printk(KERN_INFO "input%d: mouse(0x%lx): %s\n", + mouse->dev.number, data, mouse->dev.name); + + MOD_INC_USE_COUNT; + + return 0; +} + + +static void dc_mouse_disconnect(struct maple_device *dev) +{ + struct dc_mouse *mouse = dev->private_data; + + input_unregister_device(&mouse->dev); + + kfree(mouse); + + MOD_DEC_USE_COUNT; +} + + +static struct maple_driver dc_mouse_driver = { + function: MAPLE_FUNC_MOUSE, + name: "Dreamcast mouse", + connect: dc_mouse_connect, + disconnect: dc_mouse_disconnect, +}; + + +static int __init dc_mouse_init(void) +{ + maple_register_driver(&dc_mouse_driver); + return 0; +} + + +static void __exit dc_mouse_exit(void) +{ + maple_unregister_driver(&dc_mouse_driver); +} + + +module_init(dc_mouse_init); +module_exit(dc_mouse_exit); + +/* + * Local variables: + * c-basic-offset: 8 + * End: + */ diff -urN linux-2.4.16/drivers/char/shwdt.c linux/drivers/char/shwdt.c --- linux-2.4.16/drivers/char/shwdt.c Sat Dec 1 21:52:49 2001 +++ linux/drivers/char/shwdt.c Sat Dec 1 21:53:52 2001 @@ -10,7 +10,6 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ - #include #include #include @@ -177,7 +176,7 @@ * sh_wdt_read - Read from Device * * @file: file handle of device - * @char: buffer to write to + * @buf: buffer to write to * @count: length of buffer * @ppos: offset * @@ -193,7 +192,7 @@ * sh_wdt_write - Write to Device * * @file: file handle of device - * @char: buffer to write + * @buf: buffer to write * @count: length of buffer * @ppos: offset * @@ -269,7 +268,7 @@ static int sh_wdt_notify_sys(struct notifier_block *this, unsigned long code, void *unused) { - if (code == SYS_DOWN || SYS_HALT) { + if (code == SYS_DOWN || code == SYS_HALT) { sh_wdt_stop(); } diff -urN linux-2.4.16/drivers/maple/Config.in linux/drivers/maple/Config.in --- linux-2.4.16/drivers/maple/Config.in Wed Dec 31 19:00:00 1969 +++ linux/drivers/maple/Config.in Sat Dec 1 21:53:52 2001 @@ -0,0 +1,10 @@ +# +# Sega Dreamcast Maple Bus device configuration +# + +mainmenu_option next_comment +comment 'Maple Bus support' + +tristate 'Maple Bus support' CONFIG_MAPLE + +endmenu diff -urN linux-2.4.16/drivers/maple/Makefile linux/drivers/maple/Makefile --- linux-2.4.16/drivers/maple/Makefile Wed Dec 31 19:00:00 1969 +++ linux/drivers/maple/Makefile Sat Dec 1 21:53:52 2001 @@ -0,0 +1,15 @@ +# $Id: Makefile,v 1.1 2001/04/01 15:02:17 yaegashi Exp $ +# Makefile for Maple Bus drivers + +O_TARGET := maplebus.o + +export-objs := maple.o + +obj-y := +obj-m := +obj-n := +obj- := + +obj-$(CONFIG_MAPLE) += maple.o + +include $(TOPDIR)/Rules.make diff -urN linux-2.4.16/drivers/maple/maple.c linux/drivers/maple/maple.c --- linux-2.4.16/drivers/maple/maple.c Wed Dec 31 19:00:00 1969 +++ linux/drivers/maple/maple.c Sat Dec 1 21:53:52 2001 @@ -0,0 +1,552 @@ +/* + * $Id: maple.c,v 1.1 2001/04/01 15:02:17 yaegashi Exp $ + * Maple Bus device driver + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#define DPRINTK(format, args...) printk(KERN_DEBUG format,##args) + +#define MAPLE_PORTS 4 +#define MAPLE_SCANHZ (HZ/100) +#define MAPLE_PNP_INTERVAL HZ + +#define MAPLE_MAXPACKETS 8 +#define MAPLE_DMA_ORDER 14 /* 16K bytes */ +#define MAPLE_DMA_SIZE (1< PAGE_SHIFT) ? MAPLE_DMA_ORDER-PAGE_SHIFT : 0) + +static LIST_HEAD(maple_dev_list); +static LIST_HEAD(maple_driver_list); +static LIST_HEAD(maple_waitq); +static LIST_HEAD(maple_sentq); +static DECLARE_WAIT_QUEUE_HEAD(kmapled_wait); +static DECLARE_COMPLETION(kmapled_exited); +static int kmapled_pid = 0; + +struct timer_list maple_timer; + +unsigned long *maple_sendbuf, *maple_sendptr, *maple_lastptr; +unsigned long maple_pnp_time; + +static struct maple_driver maple_dummy_driver = { + function: 0, + name: "Dummy", +}; + +static void maple_dump_devinfo(struct maple_devinfo *devinfo) +{ + DPRINTK(" function: 0x%08x\n", be32_to_cpu(devinfo->function)); + DPRINTK(" data[0]: 0x%08x\n", be32_to_cpu(devinfo->function_data[0])); + DPRINTK(" data[1]: 0x%08x\n", be32_to_cpu(devinfo->function_data[1])); + DPRINTK(" data[2]: 0x%08x\n", be32_to_cpu(devinfo->function_data[2])); + DPRINTK(" area code: %d\n", devinfo->area_code); + DPRINTK(" direction: %d\n", devinfo->connector_direction); + DPRINTK(" name: \"%-30.30s\"\n", devinfo->product_name); + DPRINTK(" license: \"%-60.60s\"\n", devinfo->product_license); + DPRINTK(" stanby power: %d\n", le16_to_cpu(devinfo->standby_power)); + DPRINTK(" max power: %d\n", le16_to_cpu(devinfo->max_power)); +} + + +void maple_register_driver(struct maple_driver *driver) +{ + struct list_head *lh = (void *)driver; + list_add(lh, &maple_driver_list); + + MOD_INC_USE_COUNT; + + printk(KERN_INFO "maple: registered driver: %s (function 0x%lx)\n", + driver->name, driver->function); +} + + +void maple_unregister_driver(struct maple_driver *driver) +{ + struct list_head *lh = (void *)driver; + list_del(lh); + + MOD_DEC_USE_COUNT; + + printk(KERN_INFO "maple: unregistered driver: %s (function 0x%lx)\n", + driver->name, driver->function); +} + + +static struct mapleq *maple_allocq(struct maple_device *dev) +{ + unsigned long buf; + struct mapleq *mq; + + mq = kmalloc(sizeof(*mq), GFP_KERNEL); + if (!mq) + return NULL; + + mq->dev = dev; + buf = (unsigned long)mq->buf; + buf = (buf + 31) & ~31; + mq->recvbuf = (void *)P2SEGADDR(buf); + + return mq; +} + + +static void maple_freeq(struct mapleq *mq) +{ + if (!mq) + return; + + kfree(mq); +} + + +static struct maple_device *maple_alloc_dev(int port, int unit) +{ + struct maple_device *dev; + + dev = kmalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return NULL; + + memset(dev, 0, sizeof(*dev)); + + dev->port = port; + dev->unit = unit; + dev->mq = maple_allocq(dev); + + if (!dev->mq) { + kfree(dev); + return NULL; + } + + return dev; +} + + +static void maple_free_dev(struct maple_device *dev) +{ + if (!dev) + return; + + if (dev->mq) + maple_freeq(dev->mq); + + kfree(dev); +} + + +static void maple_register_dev(struct maple_device *dev) +{ + struct list_head *lh = (void *)dev; + list_add_tail(lh, &maple_dev_list); +} + + +static void maple_unregister_dev(struct maple_device *dev) +{ + struct list_head *lh = (void *)dev; + list_del(lh); +} + + +void maple_getcond_callback(struct maple_device *dev, + void (*callback)(struct mapleq *mq), + unsigned long interval, unsigned long function) +{ + dev->callback = callback; + dev->interval = interval; + dev->function = cpu_to_be32(function); + dev->when = 0; +} + + +int maple_add_packet(struct mapleq *mq) +{ + unsigned long flags; + + save_and_cli(flags); + list_add((struct list_head *)mq, &maple_waitq); + restore_flags(flags); + + return 0; +} + + +int maple_del_packet(struct mapleq *mq) +{ + struct list_head *lh; + unsigned long flags; + + save_and_cli(flags); + + list_for_each(lh, &maple_sentq) { + if (mq == (struct mapleq *)lh) { + restore_flags(flags); + return -1; + } + } + + list_for_each(lh, &maple_waitq) { + if (mq == (struct mapleq *)lh) + list_del(lh); + } + + restore_flags(flags); + + return 0; +} + + +static int maple_dma_done(void) +{ + return (ctrl_inl(MAPLE_STATE) & 1) == 0; +} + + +static void maple_attach_driver(struct maple_device *dev) +{ + struct list_head *lh; + struct maple_driver *driver; + unsigned long function; + char *p, *recvbuf = dev->mq->recvbuf; + + memcpy(&dev->devinfo, recvbuf+4, sizeof(dev->devinfo)); + + memcpy(dev->product_name, dev->devinfo.product_name, 30); + memcpy(dev->product_license, dev->devinfo.product_license, 60); + dev->product_name[30] = 0; + dev->product_license[60] = 0; + + for (p=dev->product_name+29; dev->product_name<=p; p--) + if (*p==' ') *p = 0; else break; + + for (p=dev->product_license+59; dev->product_license<=p; p--) + if (*p==' ') *p = 0; else break; + + function = be32_to_cpu(dev->devinfo.function); + + printk(KERN_INFO "maple(%d,%d): Connected(function 0x%lx)\n", + dev->port, dev->unit, function); + + list_for_each(lh, &maple_driver_list) { + driver = (struct maple_driver *)lh; + if (function & driver->function) { + if (!driver->connect(dev)) { + dev->driver = driver; + break; + } + } + } + + if (dev->driver==NULL) { + printk(KERN_INFO "maple(%d,%d): No proper driver.\n", + dev->port, dev->unit); + maple_dump_devinfo(&dev->devinfo); + dev->driver = &maple_dummy_driver; + } + +} + + +static void maple_detach_driver(struct maple_device *dev) +{ + printk(KERN_INFO "maple(%d,%d): Disconnected\n", + dev->port, dev->unit); + + dev->driver->disconnect(dev); + dev->driver = NULL; +} + + +static void maple_dma_irq(void) +{ + struct mapleq *mq; + struct maple_device *dev; + struct list_head *lh, tmph; + char *recvbuf; + int code, need_wakeup = 0; + + if (list_empty(&maple_sentq) || !maple_dma_done()) return; + + list_for_each(lh, &maple_sentq) { + mq = (struct mapleq *)lh; + dev = mq->dev; + tmph = *lh; + lh = &tmph; + + recvbuf = mq->recvbuf; + code = recvbuf[0]; + + switch (code) { + case MAPLE_RESPONSE_NONE: + case MAPLE_RESPONSE_DEVINFO: + maple_getcond_callback(dev, NULL, 0, 0); + dev->event = code; + need_wakeup = 1; + break; + + case MAPLE_RESPONSE_DATATRF: + if (dev->callback) + dev->callback(mq); + break; + + default: + break; + } + + } + + INIT_LIST_HEAD(&maple_sentq); + + if (need_wakeup) + wake_up(&kmapled_wait); +} + + +static void maple_build_block(struct mapleq *mq) +{ + int port, unit, from, to, len; + unsigned long *lsendbuf = mq->sendbuf; + + port = mq->dev->port & 3; + unit = mq->dev->unit; + len = mq->length; + + from = port<<6; + to = (port<<6) | (unit>0 ? (1<<(unit-1))&0x1f : 0x20); + + *maple_lastptr &= 0x7fffffff; + maple_lastptr = maple_sendptr; + + *maple_sendptr++ = (port<<16) | len | 0x80000000; + *maple_sendptr++ = PHYSADDR(mq->recvbuf); + *maple_sendptr++ = mq->command | (to<<8) | (from<<16) | (len<<24); + + while (len-->0) { + *maple_sendptr++ = *lsendbuf++; + } +} + + +void maple_send(void) +{ + int i; + int maple_packets; + struct mapleq *mq; + struct list_head *lh, tmph; + + if (!list_empty(&maple_sentq)) + return; + + if (list_empty(&maple_waitq) || !maple_dma_done()) + return; + + maple_packets = 0; + maple_sendptr = maple_lastptr = maple_sendbuf; + + list_for_each(lh, &maple_waitq) { + mq = (struct mapleq *)lh; + tmph = *lh; + list_del(lh); + list_add(lh, &maple_sentq); + maple_build_block(mq); + lh = &tmph; + if (maple_packets++ > MAPLE_MAXPACKETS) + break; + } + + if (maple_packets>0) { + for (i=0; i<(1<event) + continue; + if (dev->interval>0) { + if (jiffies>dev->when) { + dev->when = jiffies + dev->interval; + dev->mq->command = MAPLE_COMMAND_GETCOND; + dev->mq->sendbuf = &dev->function; + dev->mq->length = 1; + maple_add_packet(dev->mq); + } + } + else { + if (jiffies>=maple_pnp_time) { + dev->mq->command = MAPLE_COMMAND_DEVINFO; + dev->mq->length = 0; + maple_add_packet(dev->mq); + } + } + } + + if (jiffies>=maple_pnp_time) + maple_pnp_time = jiffies + MAPLE_PNP_INTERVAL; + + /* Scan list and build sending block */ + maple_send(); + + /* Schedule next timer event */ + mod_timer(&maple_timer, jiffies + MAPLE_SCANHZ); +} + + +static void maple_pnp_events(void) +{ + struct maple_device *dev; + struct list_head *lh; + + list_for_each(lh, &maple_dev_list) { + + dev = (struct maple_device *)lh; + + switch(dev->event) { + case MAPLE_RESPONSE_NONE: + if (dev->driver) + maple_detach_driver(dev); + break; + + case MAPLE_RESPONSE_DEVINFO: + if (!dev->driver) + maple_attach_driver(dev); + break; + } + + dev->event = 0; + + } +} + + +static int kmapled_thread(void *hoge) +{ + lock_kernel(); + + daemonize(); + + strcpy(current->comm, "kmapled"); + + do { + maple_pnp_events(); + interruptible_sleep_on(&kmapled_wait); + } while(!signal_pending(current)); + + unlock_kernel(); + + complete_and_exit(&kmapled_exited, 0); +} + + +static int __init maple_init(void) +{ + struct maple_device *dev; + int i; + + printk(KERN_INFO "SEGA Dreamcast MAPLE Bus drivers\n"); + + /* Allocate DMA buffer */ + maple_sendbuf = (void *)__get_dma_pages(GFP_KERNEL, MAPLE_DMA_PAGES); + if (maple_sendbuf == NULL) + return -ENOMEM; + memset(maple_sendbuf, 0, MAPLE_DMA_SIZE); + + /* Register dummy maple driver */ + maple_register_driver(&maple_dummy_driver); + + /* Register basic port devices */ + for (i=0; i #include #include +#include extern int parse_redboot_partitions(struct mtd_info *master, struct mtd_partition **pparts); @@ -57,20 +58,38 @@ write32: soleng_write32, }; +#ifdef CONFIG_MTD_SUPERH_RESERVE +static struct mtd_partition superh_se_partitions[] = { + /* Reserved for boot code, read-only */ + { + name: "flash_boot", + offset: 0x00000000, + size: CONFIG_MTD_SUPERH_RESERVE, + mask_flags: MTD_WRITEABLE, + }, + /* All else is writable (e.g. JFFS) */ + { + name: "Flash FS", + offset: MTDPART_OFS_NXTBLK, + size: MTDPART_SIZ_FULL, + } +}; +#endif /* CONFIG_MTD_SUPERH_RESERVE */ + static int __init init_soleng_maps(void) { - int nr_parts; + int nr_parts = 0; /* First probe at offset 0 */ soleng_flash_map.map_priv_1 = P2SEGADDR(0); - soleng_eprom_map.map_priv_1 = P1SEGADDR(0x400000); + soleng_eprom_map.map_priv_1 = P1SEGADDR(0x01000000); - printk(KERN_NOTICE "Probing for flash chips at 0x000000:\n"); + printk(KERN_NOTICE "Probing for flash chips at 0x00000000:\n"); flash_mtd = do_map_probe("cfi_probe", &soleng_flash_map); if (!flash_mtd) { /* Not there. Try swapping */ - printk(KERN_NOTICE "Probing for flash chips at 0x400000:\n"); - soleng_flash_map.map_priv_1 = P2SEGADDR(0x400000); + printk(KERN_NOTICE "Probing for flash chips at 0x01000000:\n"); + soleng_flash_map.map_priv_1 = P2SEGADDR(0x01000000); soleng_eprom_map.map_priv_1 = P1SEGADDR(0); flash_mtd = do_map_probe("cfi_probe", &soleng_flash_map); if (!flash_mtd) { @@ -90,9 +109,23 @@ add_mtd_device(eprom_mtd); } +#ifdef CONFIG_MTD_REDBOOT_PARTS nr_parts = parse_redboot_partitions(flash_mtd, &parsed_parts); + if (nr_parts > 0) + printk(KERN_NOTICE "Found RedBoot partition table.\n"); + else if (nr_parts < 0) + printk(KERN_NOTICE "Error looking for RedBoot partitions.\n"); +#endif /* CONFIG_MTD_REDBOOT_PARTS */ +#if CONFIG_MTD_SUPERH_RESERVE + if (nr_parts == 0) { + printk(KERN_NOTICE "Using configured partition at 0x%08x.\n", + CONFIG_MTD_SUPERH_RESERVE); + parsed_parts = superh_se_partitions; + nr_parts = sizeof(superh_se_partitions)/sizeof(*parsed_parts); + } +#endif /* CONFIG_MTD_SUPERH_RESERVE */ - if (nr_parts) + if (nr_parts > 0) add_mtd_partitions(flash_mtd, parsed_parts, nr_parts); else add_mtd_device(flash_mtd); diff -urN linux-2.4.16/drivers/mtd/mtdpart.c linux/drivers/mtd/mtdpart.c --- linux-2.4.16/drivers/mtd/mtdpart.c Sat Dec 1 21:53:04 2001 +++ linux/drivers/mtd/mtdpart.c Sat Dec 1 21:53:52 2001 @@ -5,7 +5,7 @@ * * This code is GPL * - * $Id: mtdpart.c,v 1.23 2001/10/02 15:05:11 dwmw2 Exp $ + * $Id: mtdpart.c,v 1.24 2001/11/07 01:20:58 jsiegel Exp $ */ #include @@ -225,6 +225,15 @@ if (slave->offset == MTDPART_OFS_APPEND) slave->offset = cur_offset; + if (slave->offset == MTDPART_OFS_NXTBLK) { + u_int32_t emask = master->erasesize-1; + slave->offset = (cur_offset + emask) & ~emask; + if (slave->offset != cur_offset) { + printk(KERN_NOTICE "Moving partition %d: " + "0x%08x -> 0x%08x\n", i, + cur_offset, slave->offset); + } + } if (slave->mtd.size == MTDPART_SIZ_FULL) slave->mtd.size = master->size - slave->offset; cur_offset = slave->offset + slave->mtd.size; diff -urN linux-2.4.16/drivers/net/8139too.c linux/drivers/net/8139too.c --- linux-2.4.16/drivers/net/8139too.c Sat Dec 1 21:52:45 2001 +++ linux/drivers/net/8139too.c Sat Dec 1 21:53:52 2001 @@ -109,9 +109,17 @@ #include #include #include + #include #include +#ifdef CONFIG_8139TOO_DREAMCAST +#define CONFIG_8139TOO_BUF16K 1 +#define USE_NO_DMAMAP 1 +#else +#define USE_NO_DMAMAP 0 +#endif + #define RTL8139_DRIVER_NAME DRV_NAME " Fast Ethernet driver " DRV_VERSION #define PFX DRV_NAME ": " @@ -160,7 +168,11 @@ static int multicast_filter_limit = 32; /* Size of the in-memory receive ring. */ +#ifdef CONFIG_8139TOO_BUF16K +#define RX_BUF_LEN_IDX 1 /* 0==8K, 1==16K, 2==32K, 3==64K */ +#else #define RX_BUF_LEN_IDX 2 /* 0==8K, 1==16K, 2==32K, 3==64K */ +#endif #define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX) #define RX_BUF_PAD 16 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ @@ -212,6 +224,7 @@ ADDTRON8139, DFE538TX, DFE690TXD, + SEGABBA, RTL8129, } board_t; @@ -229,6 +242,7 @@ { "Addtron Technolgy 8139 10/100BaseTX", RTL8139_CAPS }, { "D-Link DFE-538TX (RealTek RTL8139)", RTL8139_CAPS }, { "D-Link DFE-690TXD (RealTek RTL8139)", RTL8139_CAPS }, + { "SEGA Broadband Adapter", RTL8139_CAPS }, { "RealTek RTL8129", RTL8129_CAPS }, }; @@ -242,6 +256,7 @@ {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ADDTRON8139 }, {0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DFE538TX }, {0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DFE690TXD }, + {0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SEGABBA }, #ifdef CONFIG_8139TOO_8129 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 }, @@ -654,10 +669,17 @@ PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK; +#ifdef CONFIG_8139TOO_BUF16K +static const unsigned int rtl8139_rx_config = + RxCfgRcv16K | RxNoWrap | + (RX_FIFO_THRESH << RxCfgFIFOShift) | + (RX_DMA_BURST << RxCfgDMAShift); +#else static const unsigned int rtl8139_rx_config = RxCfgRcv32K | RxNoWrap | (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift); +#endif static const unsigned int rtl8139_tx_config = (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift); @@ -1335,6 +1357,7 @@ tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; RTL_W32 (RxConfig, tp->rx_config); + tp->rx_config = 0; /* Check this value: the documentation for IFG contradicts ifself. */ RTL_W32 (TxConfig, rtl8139_tx_config); diff -urN linux-2.4.16/drivers/net/Config.in linux/drivers/net/Config.in --- linux-2.4.16/drivers/net/Config.in Sat Dec 1 21:52:41 2001 +++ linux/drivers/net/Config.in Sat Dec 1 21:53:52 2001 @@ -139,6 +139,7 @@ if [ "$CONFIG_OBSOLETE" = "y" ]; then tristate ' SK_G16 support' CONFIG_SK_G16 fi + tristate ' CS89x0 support' CONFIG_CS89x0 fi if [ "$CONFIG_MCA" = "y" ]; then tristate ' SKnet MCA support' CONFIG_SKMC @@ -181,6 +182,7 @@ dep_mbool ' Use PIO instead of MMIO' CONFIG_8139TOO_PIO $CONFIG_8139TOO dep_mbool ' Support for automatic channel equalization (EXPERIMENTAL)' CONFIG_8139TOO_TUNE_TWISTER $CONFIG_8139TOO $CONFIG_EXPERIMENTAL dep_mbool ' Support for older RTL-8129/8130 boards' CONFIG_8139TOO_8129 $CONFIG_8139TOO + dep_mbool ' Support for Dreamcast Broad Band Adaptor' CONFIG_8139TOO_DREAMCAST $CONFIG_8139TOO dep_tristate ' SiS 900/7016 PCI Fast Ethernet Adapter support' CONFIG_SIS900 $CONFIG_PCI dep_tristate ' SMC EtherPower II' CONFIG_EPIC100 $CONFIG_PCI dep_tristate ' Sundance Alta support' CONFIG_SUNDANCE $CONFIG_PCI diff -urN linux-2.4.16/drivers/pci/pci.ids linux/drivers/pci/pci.ids --- linux-2.4.16/drivers/pci/pci.ids Sat Dec 1 21:52:54 2001 +++ linux/drivers/pci/pci.ids Sat Dec 1 21:53:52 2001 @@ -963,11 +963,12 @@ 1000 QuickStep 1000 3000 QuickStep 3000 1049 Fountain Technologies, Inc. -104a SGS Thomson Microelectronics +104a STMicroelectronics 0008 STG 2000X 0009 STG 1764X 1746 STG 1764X 3520 MPEG-II decoder card + 2774 STE10/100A 104b BusLogic 0140 BT-946C (old) [multimaster 01] 1040 BT-946C (BA80C30) [MultiMaster 10] @@ -2640,6 +2641,7 @@ 11aa Actel 11ab Galileo Technology Ltd. 0146 GT-64010 + 4146 GT-64111 4801 GT-48001 f003 GT-64010 Primary Image Piranha Image Generator 11ac Canon Information Systems Research Aust. @@ -2794,6 +2796,7 @@ 11d9 TEC Corporation 11da Novell 11db Sega Enterprises Ltd + 1234 Broadband Adapter 11dc Questra Corporation 11dd Crosfield Electronics Limited 11de Zoran Corporation diff -urN linux-2.4.16/include/asm-sh/hitachi_se.h linux/include/asm-sh/hitachi_se.h --- linux-2.4.16/include/asm-sh/hitachi_se.h Sat Dec 1 21:52:38 2001 +++ linux/include/asm-sh/hitachi_se.h Sat Dec 1 21:53:52 2001 @@ -36,7 +36,7 @@ #define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */ #define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */ #define PA_LED 0xb0c00000 /* LED */ -#define PA_BCR 0xb1400000 /* FPGA */ +#define PA_BCR 0xb1400000 /* FPGA on the MS7750SE01 */ #define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ #define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ diff -urN linux-2.4.16/include/asm-sh/mmzone.h linux/include/asm-sh/mmzone.h --- linux-2.4.16/include/asm-sh/mmzone.h Wed Dec 31 19:00:00 1969 +++ linux/include/asm-sh/mmzone.h Sat Dec 1 21:53:52 2001 @@ -0,0 +1,61 @@ +/* + * linux/include/asm-sh/mmzone.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_SH_MMZONE_H +#define __ASM_SH_MMZONE_H + +#include + +/* Currently, just for HP690 */ +#define PHYSADDR_TO_NID(phys) ((((phys) - __MEMORY_START) >= 0x01000000)?1:0) +#define NR_NODES 2 + +extern pg_data_t discontig_page_data[NR_NODES]; +extern bootmem_data_t discontig_node_bdata[NR_NODES]; + +#ifdef CONFIG_DISCONTIGMEM +/* + * Following are macros that each numa implmentation must define. + */ + +/* + * Given a kernel address, find the home node of the underlying memory. + */ +#define KVADDR_TO_NID(kaddr) PHYSADDR_TO_NID(__pa(kaddr)) + +/* + * Return a pointer to the node data for node n. + */ +#define NODE_DATA(nid) (&discontig_page_data[nid]) + +/* + * NODE_MEM_MAP gives the kaddr for the mem_map of the node. + */ +#define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map) + +#define phys_to_page(phys) \ +({ unsigned int node = PHYSADDR_TO_NID(phys); \ + NODE_MEM_MAP(node) \ + + (((phys) - NODE_DATA(node)->node_start_paddr) >> PAGE_SHIFT); }) + +static inline int is_valid_page(struct page *page) +{ + unsigned int i; + + for (i = 0; i < NR_NODES; i++) { + if (page >= NODE_MEM_MAP(i) && + page < NODE_MEM_MAP(i) + NODE_DATA(i)->node_size) + return 1; + } + return 0; +} + +#define VALID_PAGE(page) is_valid_page(page) +#define page_to_phys(page) PHYSADDR(page_address(page)) + +#endif /* CONFIG_DISCONTIGMEM */ +#endif diff -urN linux-2.4.16/include/asm-sh/pci.h linux/include/asm-sh/pci.h --- linux-2.4.16/include/asm-sh/pci.h Sat Dec 1 21:52:38 2001 +++ linux/include/asm-sh/pci.h Sat Dec 1 21:53:52 2001 @@ -196,6 +196,11 @@ return 1; } +/* Not supporting more than 32-bit PCI bus addresses now, but + * must satisfy references to this function. Change if needed. + */ +#define pci_dac_dma_supported(pci_dev, mask) (0) + /* Return the index of the PCI controller for device PDEV. */ #define pci_controller_num(PDEV) (0) diff -urN linux-2.4.16/include/asm-sh/stat.h linux/include/asm-sh/stat.h --- linux-2.4.16/include/asm-sh/stat.h Sat Dec 1 21:52:38 2001 +++ linux/include/asm-sh/stat.h Sat Dec 1 21:53:52 2001 @@ -42,8 +42,16 @@ * insane amounts of padding around dev_t's. */ struct stat64 { +#if defined(__BIG_ENDIAN__) + unsigned char __pad0b[6]; unsigned short st_dev; - unsigned char __pad0[10]; +#elif defined(__LITTLE_ENDIAN__) + unsigned short st_dev; + unsigned char __pad0b[6]; +#else +#error Must know endian to build stat64 structure! +#endif + unsigned char __pad0[4]; unsigned long st_ino; unsigned int st_mode; @@ -52,14 +60,25 @@ unsigned long st_uid; unsigned long st_gid; +#if defined(__BIG_ENDIAN__) + unsigned char __pad3b[6]; + unsigned short st_rdev; +#else /* Must be little */ unsigned short st_rdev; - unsigned char __pad3[10]; + unsigned char __pad3b[6]; +#endif + unsigned char __pad3[4]; long long st_size; unsigned long st_blksize; +#if defined(__BIG_ENDIAN__) + unsigned long __pad4; /* Future possible st_blocks hi bits */ + unsigned long st_blocks; /* Number 512-byte blocks allocated. */ +#else /* Must be little */ unsigned long st_blocks; /* Number 512-byte blocks allocated. */ - unsigned long __pad4; /* future possible st_blocks high bits */ + unsigned long __pad4; /* Future possible st_blocks hi bits */ +#endif unsigned long st_atime; unsigned long __pad5; diff -urN linux-2.4.16/include/asm-sh/uaccess.h linux/include/asm-sh/uaccess.h --- linux-2.4.16/include/asm-sh/uaccess.h Sat Dec 1 21:52:38 2001 +++ linux/include/asm-sh/uaccess.h Sat Dec 1 21:53:52 2001 @@ -1,4 +1,4 @@ -/* $Id: uaccess.h,v 1.13 2001/10/01 02:22:01 gniibe Exp $ +/* $Id: uaccess.h,v 1.14 2001/11/03 00:45:43 jzs Exp $ * * User space memory access functions * @@ -216,6 +216,7 @@ : "r" (val), "m" (__m(addr)), "i" (-EFAULT) \ : "memory"); }) #else +#define __put_user_u64(val,addr,retval) \ ({ \ __asm__ __volatile__( \ "1:\n\t" \ diff -urN linux-2.4.16/include/linux/highmem.h linux/include/linux/highmem.h --- linux-2.4.16/include/linux/highmem.h Sat Dec 1 21:52:31 2001 +++ linux/include/linux/highmem.h Sat Dec 1 21:53:52 2001 @@ -78,6 +78,9 @@ BUG(); kaddr = kmap(page); memset(kaddr + offset, 0, size); +#ifdef CONFIG_SUPERH + flush_dcache_page(page); +#endif flush_page_to_ram(page); kunmap(page); } diff -urN linux-2.4.16/include/linux/input.h linux/include/linux/input.h --- linux-2.4.16/include/linux/input.h Sat Dec 1 21:52:30 2001 +++ linux/include/linux/input.h Sat Dec 1 21:53:52 2001 @@ -478,6 +478,7 @@ #define BUS_AMIGA 0x16 #define BUS_ADB 0x17 #define BUS_I2C 0x18 +#define BUS_MAPLE 0x19 /* * Structures used in ioctls to upload effects to a device diff -urN linux-2.4.16/include/linux/maple.h linux/include/linux/maple.h --- linux-2.4.16/include/linux/maple.h Wed Dec 31 19:00:00 1969 +++ linux/include/linux/maple.h Sat Dec 1 21:53:52 2001 @@ -0,0 +1,131 @@ +#ifndef __MAPLE_H +#define __MAPLE_H +/* + * $Id: maple.h,v 1.3 2001/05/04 10:45:51 yaegashi Exp $ + * MAPLE Bus device drivers + * + * Register definitions are taken from Marcus Comstedt's + * Dreamcast software (See http://mc.pp.se/dc/). + * Copyright (C) 2000 Marcus Comstedt + */ + +#include +#include +#include + + +/* Maple Bus registers */ + +#define MAPLE_BASE 0xa05f6c00 +#define MAPLE_DMAADDR (MAPLE_BASE+0x04) +#define MAPLE_RESET2 (MAPLE_BASE+0x10) +#define MAPLE_ENABLE (MAPLE_BASE+0x14) +#define MAPLE_STATE (MAPLE_BASE+0x18) +#define MAPLE_SPEED (MAPLE_BASE+0x80) +#define MAPLE_RESET (MAPLE_BASE+0x8c) + +#define MAPLE_MAGIC 0x6155404f +#define MAPLE_2MBPS 0 +#define MAPLE_TIMEOUT(n) ((n)<<16) + + +/* Maple Bus command and response codes */ + +#define MAPLE_RESPONSE_FILEERR -5 +#define MAPLE_RESPONSE_AGAIN -4 /* request should be retransmitted */ +#define MAPLE_RESPONSE_BADCMD -3 +#define MAPLE_RESPONSE_BADFUNC -2 +#define MAPLE_RESPONSE_NONE -1 /* unit didn't respond at all */ +#define MAPLE_COMMAND_DEVINFO 1 +#define MAPLE_COMMAND_ALLINFO 2 +#define MAPLE_COMMAND_RESET 3 +#define MAPLE_COMMAND_KILL 4 +#define MAPLE_RESPONSE_DEVINFO 5 +#define MAPLE_RESPONSE_ALLINFO 6 +#define MAPLE_RESPONSE_OK 7 +#define MAPLE_RESPONSE_DATATRF 8 +#define MAPLE_COMMAND_GETCOND 9 +#define MAPLE_COMMAND_GETMINFO 10 +#define MAPLE_COMMAND_BREAD 11 +#define MAPLE_COMMAND_BWRITE 12 +#define MAPLE_COMMAND_SETCOND 14 + + +/* Function codes */ + +#define MAPLE_FUNC_CONTROLLER 0x001 +#define MAPLE_FUNC_MEMCARD 0x002 +#define MAPLE_FUNC_LCD 0x004 +#define MAPLE_FUNC_CLOCK 0x008 +#define MAPLE_FUNC_MICROPHONE 0x010 +#define MAPLE_FUNC_ARGUN 0x020 +#define MAPLE_FUNC_KEYBOARD 0x040 +#define MAPLE_FUNC_LIGHTGUN 0x080 +#define MAPLE_FUNC_PURUPURU 0x100 +#define MAPLE_FUNC_MOUSE 0x200 + + +struct maple_devinfo { + unsigned long function; /* big endian! */ + unsigned long function_data[3]; /* big endian! */ + unsigned char area_code; + unsigned char connector_direction; + char product_name[30]; + char product_license[60]; + unsigned short standby_power; /* little endian */ + unsigned short max_power; /* little endian */ +}; + + +struct maple_driver; +struct maple_device; + +struct mapleq { + struct list_head list; + struct maple_device *dev; + void *sendbuf, *recvbuf; + unsigned char command, length; + unsigned char buf[1024+32]; +}; + + +struct maple_device { + struct list_head list; + struct maple_driver *driver; + struct mapleq *mq; + void *private_data; + void (*callback)(struct mapleq *mq); + unsigned long when, interval, function; + int event; + struct maple_devinfo devinfo; + unsigned char port, unit; + char product_name[32]; + char product_license[64]; +}; + + +struct maple_driver { + struct list_head list; + unsigned long function; + const char *name; + int (*connect)(struct maple_device *dev); + void (*disconnect)(struct maple_device *dev); +}; + + +int maple_add_packet(struct mapleq *mq); +int maple_del_packet(struct mapleq *mq); + +void maple_register_driver(struct maple_driver *driver); +void maple_unregister_driver(struct maple_driver *driver); + +void maple_getcond_callback(struct maple_device *dev, + void (*callback)(struct mapleq *mq), + unsigned long interval, unsigned long function); + +/* + * Local variables: + * c-basic-offset: 8 + * End: + */ +#endif diff -urN linux-2.4.16/include/linux/mtd/partitions.h linux/include/linux/mtd/partitions.h --- linux-2.4.16/include/linux/mtd/partitions.h Sat Dec 1 21:52:30 2001 +++ linux/include/linux/mtd/partitions.h Sat Dec 1 21:53:52 2001 @@ -5,7 +5,7 @@ * * This code is GPL * - * $Id: partitions.h,v 1.6 2001/03/17 17:10:21 dwmw2 Exp $ + * $Id: partitions.h,v 1.7 2001/11/07 01:20:59 jsiegel Exp $ */ #ifndef MTD_PARTITIONS_H @@ -26,14 +26,14 @@ * will extend to the end of the master MTD device. * offset: absolute starting position within the master MTD device; if * defined as MTDPART_OFS_APPEND, the partition will start where the - * previous one ended. + * previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block. * mask_flags: contains flags that have to be masked (removed) from the * master MTD flag set for the corresponding MTD partition. * For example, to force a read-only partition, simply adding * MTD_WRITEABLE to the mask_flags will do the trick. * * Note: writeable partitions require their size and offset be - * erasesize aligned. + * erasesize aligned (e.g. use MTDPART_OFS_NEXTBLK). */ struct mtd_partition { @@ -43,6 +43,7 @@ u_int32_t mask_flags; /* master MTD flags to mask out for this partition */ }; +#define MTDPART_OFS_NXTBLK (-2) #define MTDPART_OFS_APPEND (-1) #define MTDPART_SIZ_FULL (0) diff -urN linux-2.4.16/kernel/ptrace.c linux/kernel/ptrace.c --- linux-2.4.16/kernel/ptrace.c Sat Dec 1 21:52:30 2001 +++ linux/kernel/ptrace.c Sat Dec 1 21:53:52 2001 @@ -164,6 +164,9 @@ if (write) { maddr = kmap(page); memcpy(maddr + (addr & ~PAGE_MASK), buf, len); +#ifdef CONFIG_SUPERH + flush_dcache_page(page); +#endif flush_page_to_ram(page); flush_icache_page(vma, page); kunmap(page); diff -urN linux-2.4.16/mm/memory.c linux/mm/memory.c --- linux-2.4.16/mm/memory.c Sat Dec 1 21:52:30 2001 +++ linux/mm/memory.c Sat Dec 1 21:53:53 2001 @@ -878,7 +878,9 @@ pte_t *page_table) { flush_page_to_ram(new_page); +#ifndef CONFIG_SUPERH /* Skip for VIPT cache to improve performace */ flush_cache_page(vma, address); +#endif establish_pte(vma, address, page_table, pte_mkwrite(pte_mkdirty(mk_pte(new_page, vma->vm_page_prot)))); }